1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Samsung's ExynosAuto v9 SoC device tree source 4 * 5 * Copyright (c) 2021 Samsung Electronics Co., Ltd. 6 * 7 */ 8 9#include <dt-bindings/clock/samsung,exynosautov9.h> 10#include <dt-bindings/interrupt-controller/arm-gic.h> 11#include <dt-bindings/soc/samsung,boot-mode.h> 12#include <dt-bindings/soc/samsung,exynos-usi.h> 13 14/ { 15 compatible = "samsung,exynosautov9"; 16 #address-cells = <2>; 17 #size-cells = <1>; 18 19 interrupt-parent = <&gic>; 20 21 aliases { 22 pinctrl0 = &pinctrl_alive; 23 pinctrl1 = &pinctrl_aud; 24 pinctrl2 = &pinctrl_fsys0; 25 pinctrl3 = &pinctrl_fsys1; 26 pinctrl4 = &pinctrl_fsys2; 27 pinctrl5 = &pinctrl_peric0; 28 pinctrl6 = &pinctrl_peric1; 29 }; 30 31 arm-pmu { 32 compatible = "arm,cortex-a76-pmu"; 33 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 34 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 35 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 36 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 37 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 38 <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 39 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 40 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 41 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>, 42 <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; 43 }; 44 45 cpus { 46 #address-cells = <1>; 47 #size-cells = <0>; 48 49 cpu-map { 50 cluster0 { 51 core0 { 52 cpu = <&cpu0>; 53 }; 54 core1 { 55 cpu = <&cpu1>; 56 }; 57 core2 { 58 cpu = <&cpu2>; 59 }; 60 core3 { 61 cpu = <&cpu3>; 62 }; 63 }; 64 65 cluster1 { 66 core0 { 67 cpu = <&cpu4>; 68 }; 69 core1 { 70 cpu = <&cpu5>; 71 }; 72 core2 { 73 cpu = <&cpu6>; 74 }; 75 core3 { 76 cpu = <&cpu7>; 77 }; 78 }; 79 }; 80 81 cpu0: cpu@0 { 82 device_type = "cpu"; 83 compatible = "arm,cortex-a76"; 84 reg = <0x0>; 85 enable-method = "psci"; 86 }; 87 88 cpu1: cpu@100 { 89 device_type = "cpu"; 90 compatible = "arm,cortex-a76"; 91 reg = <0x100>; 92 enable-method = "psci"; 93 }; 94 95 cpu2: cpu@200 { 96 device_type = "cpu"; 97 compatible = "arm,cortex-a76"; 98 reg = <0x200>; 99 enable-method = "psci"; 100 }; 101 102 cpu3: cpu@300 { 103 device_type = "cpu"; 104 compatible = "arm,cortex-a76"; 105 reg = <0x300>; 106 enable-method = "psci"; 107 }; 108 109 cpu4: cpu@10000 { 110 device_type = "cpu"; 111 compatible = "arm,cortex-a76"; 112 reg = <0x10000>; 113 enable-method = "psci"; 114 }; 115 116 cpu5: cpu@10100 { 117 device_type = "cpu"; 118 compatible = "arm,cortex-a76"; 119 reg = <0x10100>; 120 enable-method = "psci"; 121 }; 122 123 cpu6: cpu@10200 { 124 device_type = "cpu"; 125 compatible = "arm,cortex-a76"; 126 reg = <0x10200>; 127 enable-method = "psci"; 128 }; 129 130 cpu7: cpu@10300 { 131 device_type = "cpu"; 132 compatible = "arm,cortex-a76"; 133 reg = <0x10300>; 134 enable-method = "psci"; 135 }; 136 }; 137 138 psci { 139 compatible = "arm,psci-1.0"; 140 method = "smc"; 141 cpu_suspend = <0xc4000001>; 142 cpu_off = <0x84000002>; 143 cpu_on = <0xc4000003>; 144 }; 145 146 timer { 147 compatible = "arm,armv8-timer"; 148 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 149 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 150 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 151 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 152 }; 153 154 fixed-rate-clocks { 155 xtcxo: clock { 156 compatible = "fixed-clock"; 157 #clock-cells = <0>; 158 clock-output-names = "oscclk"; 159 }; 160 }; 161 162 soc: soc@0 { 163 compatible = "simple-bus"; 164 #address-cells = <1>; 165 #size-cells = <1>; 166 ranges = <0x0 0x0 0x0 0x20000000>; 167 168 chipid@10000000 { 169 compatible = "samsung,exynos850-chipid"; 170 reg = <0x10000000 0x24>; 171 }; 172 173 cmu_peris: clock-controller@10020000 { 174 compatible = "samsung,exynosautov9-cmu-peris"; 175 reg = <0x10020000 0x8000>; 176 #clock-cells = <1>; 177 178 clocks = <&xtcxo>, 179 <&cmu_top DOUT_CLKCMU_PERIS_BUS>; 180 clock-names = "oscclk", 181 "dout_clkcmu_peris_bus"; 182 }; 183 184 cmu_peric0: clock-controller@10200000 { 185 compatible = "samsung,exynosautov9-cmu-peric0"; 186 reg = <0x10200000 0x8000>; 187 #clock-cells = <1>; 188 189 clocks = <&xtcxo>, 190 <&cmu_top DOUT_CLKCMU_PERIC0_BUS>, 191 <&cmu_top DOUT_CLKCMU_PERIC0_IP>; 192 clock-names = "oscclk", 193 "dout_clkcmu_peric0_bus", 194 "dout_clkcmu_peric0_ip"; 195 }; 196 197 cmu_peric1: clock-controller@10800000 { 198 compatible = "samsung,exynosautov9-cmu-peric1"; 199 reg = <0x10800000 0x8000>; 200 #clock-cells = <1>; 201 202 clocks = <&xtcxo>, 203 <&cmu_top DOUT_CLKCMU_PERIC1_BUS>, 204 <&cmu_top DOUT_CLKCMU_PERIC1_IP>; 205 clock-names = "oscclk", 206 "dout_clkcmu_peric1_bus", 207 "dout_clkcmu_peric1_ip"; 208 }; 209 210 cmu_fsys2: clock-controller@17c00000 { 211 compatible = "samsung,exynosautov9-cmu-fsys2"; 212 reg = <0x17c00000 0x8000>; 213 #clock-cells = <1>; 214 215 clocks = <&xtcxo>, 216 <&cmu_top DOUT_CLKCMU_FSYS2_BUS>, 217 <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>, 218 <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>; 219 clock-names = "oscclk", 220 "dout_clkcmu_fsys2_bus", 221 "dout_fsys2_clkcmu_ufs_embd", 222 "dout_fsys2_clkcmu_ethernet"; 223 }; 224 225 cmu_core: clock-controller@1b030000 { 226 compatible = "samsung,exynosautov9-cmu-core"; 227 reg = <0x1b030000 0x8000>; 228 #clock-cells = <1>; 229 230 clocks = <&xtcxo>, 231 <&cmu_top DOUT_CLKCMU_CORE_BUS>; 232 clock-names = "oscclk", 233 "dout_clkcmu_core_bus"; 234 }; 235 236 cmu_busmc: clock-controller@1b200000 { 237 compatible = "samsung,exynosautov9-cmu-busmc"; 238 reg = <0x1b200000 0x8000>; 239 #clock-cells = <1>; 240 241 clocks = <&xtcxo>, 242 <&cmu_top DOUT_CLKCMU_BUSMC_BUS>; 243 clock-names = "oscclk", 244 "dout_clkcmu_busmc_bus"; 245 }; 246 247 cmu_top: clock-controller@1b240000 { 248 compatible = "samsung,exynosautov9-cmu-top"; 249 reg = <0x1b240000 0x8000>; 250 #clock-cells = <1>; 251 252 clocks = <&xtcxo>; 253 clock-names = "oscclk"; 254 }; 255 256 gic: interrupt-controller@10101000 { 257 compatible = "arm,gic-400"; 258 #interrupt-cells = <3>; 259 #address-cells = <0>; 260 interrupt-controller; 261 reg = <0x10101000 0x1000>, 262 <0x10102000 0x2000>, 263 <0x10104000 0x2000>, 264 <0x10106000 0x2000>; 265 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | 266 IRQ_TYPE_LEVEL_HIGH)>; 267 }; 268 269 pdma0: dma-controller@1b2e0000 { 270 compatible = "arm,pl330", "arm,primecell"; 271 reg = <0x1b2e0000 0x1000>; 272 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 273 clocks = <&cmu_busmc CLK_GOUT_BUSMC_PDMA0_PCLK>; 274 clock-names = "apb_pclk"; 275 arm,pl330-broken-no-flushp; 276 #dma-cells = <1>; 277 }; 278 279 pinctrl_alive: pinctrl@10450000 { 280 compatible = "samsung,exynosautov9-pinctrl"; 281 reg = <0x10450000 0x1000>; 282 283 wakeup-interrupt-controller { 284 compatible = "samsung,exynosautov9-wakeup-eint"; 285 }; 286 }; 287 288 pinctrl_aud: pinctrl@19c60000{ 289 compatible = "samsung,exynosautov9-pinctrl"; 290 reg = <0x19c60000 0x1000>; 291 }; 292 293 pinctrl_fsys0: pinctrl@17740000 { 294 compatible = "samsung,exynosautov9-pinctrl"; 295 reg = <0x17740000 0x1000>; 296 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 297 }; 298 299 pinctrl_fsys1: pinctrl@17060000 { 300 compatible = "samsung,exynosautov9-pinctrl"; 301 reg = <0x17060000 0x1000>; 302 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 303 }; 304 305 pinctrl_fsys2: pinctrl@17c30000 { 306 compatible = "samsung,exynosautov9-pinctrl"; 307 reg = <0x17c30000 0x1000>; 308 interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>; 309 }; 310 311 pinctrl_peric0: pinctrl@10230000 { 312 compatible = "samsung,exynosautov9-pinctrl"; 313 reg = <0x10230000 0x1000>; 314 interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>; 315 }; 316 317 pinctrl_peric1: pinctrl@10830000 { 318 compatible = "samsung,exynosautov9-pinctrl"; 319 reg = <0x10830000 0x1000>; 320 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 321 }; 322 323 pmu_system_controller: system-controller@10460000 { 324 compatible = "samsung,exynos7-pmu", "syscon"; 325 reg = <0x10460000 0x10000>; 326 327 reboot: syscon-reboot { 328 compatible = "syscon-reboot"; 329 regmap = <&pmu_system_controller>; 330 offset = <0x3a00>; /* SYSTEM_CONFIGURATION */ 331 value = <0x2>; 332 mask = <0x2>; 333 }; 334 335 reboot-mode { 336 compatible = "syscon-reboot-mode"; 337 offset = <0x810>; /* SYSIP_DAT0 */ 338 mode-bootloader = <EXYNOSAUTOV9_BOOT_BOOTLOADER>; 339 mode-fastboot = <EXYNOSAUTOV9_BOOT_FASTBOOT>; 340 mode-recovery = <EXYNOSAUTOV9_BOOT_RECOVERY>; 341 }; 342 }; 343 344 syscon_fsys2: syscon@17c20000 { 345 compatible = "samsung,exynosautov9-sysreg", "syscon"; 346 reg = <0x17c20000 0x1000>; 347 }; 348 349 syscon_peric0: syscon@10220000 { 350 compatible = "samsung,exynosautov9-sysreg", "syscon"; 351 reg = <0x10220000 0x2000>; 352 }; 353 354 syscon_peric1: syscon@10820000 { 355 compatible = "samsung,exynosautov9-sysreg", "syscon"; 356 reg = <0x10820000 0x2000>; 357 }; 358 359 usi_0: usi@103000c0 { 360 compatible = "samsung,exynosautov9-usi", 361 "samsung,exynos850-usi"; 362 reg = <0x103000c0 0x20>; 363 samsung,sysreg = <&syscon_peric0 0x1000>; 364 samsung,mode = <USI_V2_UART>; 365 #address-cells = <1>; 366 #size-cells = <1>; 367 ranges; 368 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>, 369 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>; 370 clock-names = "pclk", "ipclk"; 371 status = "disabled"; 372 373 serial_0: serial@10300000 { 374 compatible = "samsung,exynosautov9-uart", 375 "samsung,exynos850-uart"; 376 reg = <0x10300000 0xc0>; 377 interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; 378 pinctrl-names = "default"; 379 pinctrl-0 = <&uart0_bus>; 380 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>, 381 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>; 382 clock-names = "uart", "clk_uart_baud0"; 383 samsung,uart-fifosize = <256>; 384 status = "disabled"; 385 }; 386 387 spi_0: spi@10300000 { 388 compatible = "samsung,exynosautov9-spi"; 389 reg = <0x10300000 0x30>; 390 interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; 391 pinctrl-names = "default"; 392 pinctrl-0 = <&spi0_bus &spi0_cs_func>; 393 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>, 394 <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>, 395 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>; 396 clock-names = "spi", "spi_busclk0", "spi_ioclk"; 397 samsung,spi-src-clk = <0>; 398 dmas = <&pdma0 1>, <&pdma0 0>; 399 dma-names = "tx", "rx"; 400 num-cs = <1>; 401 #address-cells = <1>; 402 #size-cells = <0>; 403 status = "disabled"; 404 }; 405 406 hsi2c_0: i2c@10300000 { 407 compatible = "samsung,exynosautov9-hsi2c"; 408 reg = <0x10300000 0xc0>; 409 interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; 410 pinctrl-names = "default"; 411 pinctrl-0 = <&hsi2c0_bus>; 412 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>, 413 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>; 414 clock-names = "hsi2c", "hsi2c_pclk"; 415 #address-cells = <1>; 416 #size-cells = <0>; 417 status = "disabled"; 418 }; 419 }; 420 421 usi_i2c_0: usi@103100c0 { 422 compatible = "samsung,exynosautov9-usi", 423 "samsung,exynos850-usi"; 424 reg = <0x103100c0 0x20>; 425 samsung,sysreg = <&syscon_peric0 0x1004>; 426 samsung,mode = <USI_V2_I2C>; 427 #address-cells = <1>; 428 #size-cells = <1>; 429 ranges; 430 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>, 431 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>; 432 clock-names = "pclk", "ipclk"; 433 status = "disabled"; 434 435 hsi2c_1: i2c@10310000 { 436 compatible = "samsung,exynosautov9-hsi2c"; 437 reg = <0x10310000 0xc0>; 438 interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>; 439 pinctrl-names = "default"; 440 pinctrl-0 = <&hsi2c1_bus>; 441 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>, 442 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>; 443 clock-names = "hsi2c", "hsi2c_pclk"; 444 #address-cells = <1>; 445 #size-cells = <0>; 446 status = "disabled"; 447 }; 448 }; 449 450 usi_1: usi@103200c0 { 451 compatible = "samsung,exynosautov9-usi", 452 "samsung,exynos850-usi"; 453 reg = <0x103200c0 0x20>; 454 samsung,sysreg = <&syscon_peric0 0x1008>; 455 samsung,mode = <USI_V2_UART>; 456 #address-cells = <1>; 457 #size-cells = <1>; 458 ranges; 459 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>, 460 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>; 461 clock-names = "pclk", "ipclk"; 462 status = "disabled"; 463 464 serial_1: serial@10320000 { 465 compatible = "samsung,exynosautov9-uart", 466 "samsung,exynos850-uart"; 467 reg = <0x10320000 0xc0>; 468 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>; 469 pinctrl-names = "default"; 470 pinctrl-0 = <&uart1_bus>; 471 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>, 472 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>; 473 clock-names = "uart", "clk_uart_baud0"; 474 samsung,uart-fifosize = <256>; 475 status = "disabled"; 476 }; 477 478 spi_1: spi@10320000 { 479 compatible = "samsung,exynosautov9-spi"; 480 reg = <0x10320000 0x30>; 481 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>; 482 pinctrl-names = "default"; 483 pinctrl-0 = <&spi1_bus &spi1_cs_func>; 484 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>, 485 <&cmu_peric0 CLK_DOUT_PERIC0_USI01_USI>, 486 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>; 487 clock-names = "spi", "spi_busclk0", "spi_ioclk"; 488 samsung,spi-src-clk = <0>; 489 dmas = <&pdma0 3>, <&pdma0 2>; 490 dma-names = "tx", "rx"; 491 num-cs = <1>; 492 #address-cells = <1>; 493 #size-cells = <0>; 494 status = "disabled"; 495 }; 496 497 hsi2c_2: i2c@10320000 { 498 compatible = "samsung,exynosautov9-hsi2c"; 499 reg = <0x10320000 0xc0>; 500 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>; 501 pinctrl-names = "default"; 502 pinctrl-0 = <&hsi2c2_bus>; 503 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>, 504 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>; 505 clock-names = "hsi2c", "hsi2c_pclk"; 506 #address-cells = <1>; 507 #size-cells = <0>; 508 status = "disabled"; 509 }; 510 }; 511 512 usi_i2c_1: usi@103300c0 { 513 compatible = "samsung,exynosautov9-usi", 514 "samsung,exynos850-usi"; 515 reg = <0x103300c0 0x20>; 516 samsung,sysreg = <&syscon_peric0 0x100c>; 517 samsung,mode = <USI_V2_I2C>; 518 #address-cells = <1>; 519 #size-cells = <1>; 520 ranges; 521 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>, 522 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>; 523 clock-names = "pclk", "ipclk"; 524 status = "disabled"; 525 526 hsi2c_3: i2c@10330000 { 527 compatible = "samsung,exynosautov9-hsi2c"; 528 reg = <0x10330000 0xc0>; 529 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>; 530 pinctrl-names = "default"; 531 pinctrl-0 = <&hsi2c3_bus>; 532 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>, 533 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>; 534 clock-names = "hsi2c", "hsi2c_pclk"; 535 #address-cells = <1>; 536 #size-cells = <0>; 537 status = "disabled"; 538 }; 539 }; 540 541 usi_2: usi@103400c0 { 542 compatible = "samsung,exynosautov9-usi", 543 "samsung,exynos850-usi"; 544 reg = <0x103400c0 0x20>; 545 samsung,sysreg = <&syscon_peric0 0x1010>; 546 samsung,mode = <USI_V2_UART>; 547 #address-cells = <1>; 548 #size-cells = <1>; 549 ranges; 550 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>, 551 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>; 552 clock-names = "pclk", "ipclk"; 553 status = "disabled"; 554 555 serial_2: serial@10340000 { 556 compatible = "samsung,exynosautov9-uart", 557 "samsung,exynos850-uart"; 558 reg = <0x10340000 0xc0>; 559 interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>; 560 pinctrl-names = "default"; 561 pinctrl-0 = <&uart2_bus>; 562 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>, 563 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>; 564 clock-names = "uart", "clk_uart_baud0"; 565 samsung,uart-fifosize = <64>; 566 status = "disabled"; 567 }; 568 569 spi_2: spi@10340000 { 570 compatible = "samsung,exynosautov9-spi"; 571 reg = <0x10340000 0x30>; 572 interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>; 573 pinctrl-names = "default"; 574 pinctrl-0 = <&spi2_bus &spi2_cs_func>; 575 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>, 576 <&cmu_peric0 CLK_DOUT_PERIC0_USI02_USI>, 577 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>; 578 clock-names = "spi", "spi_busclk0", "spi_ioclk"; 579 samsung,spi-src-clk = <0>; 580 dmas = <&pdma0 5>, <&pdma0 4>; 581 dma-names = "tx", "rx"; 582 num-cs = <1>; 583 #address-cells = <1>; 584 #size-cells = <0>; 585 status = "disabled"; 586 }; 587 588 hsi2c_4: i2c@10340000 { 589 compatible = "samsung,exynosautov9-hsi2c"; 590 reg = <0x10340000 0xc0>; 591 interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>; 592 pinctrl-names = "default"; 593 pinctrl-0 = <&hsi2c4_bus>; 594 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>, 595 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>; 596 clock-names = "hsi2c", "hsi2c_pclk"; 597 #address-cells = <1>; 598 #size-cells = <0>; 599 status = "disabled"; 600 }; 601 }; 602 603 usi_i2c_2: usi@103500c0 { 604 compatible = "samsung,exynosautov9-usi", 605 "samsung,exynos850-usi"; 606 reg = <0x103500c0 0x20>; 607 samsung,sysreg = <&syscon_peric0 0x1014>; 608 samsung,mode = <USI_V2_I2C>; 609 #address-cells = <1>; 610 #size-cells = <1>; 611 ranges; 612 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>, 613 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>; 614 clock-names = "pclk", "ipclk"; 615 status = "disabled"; 616 617 hsi2c_5: i2c@10350000 { 618 compatible = "samsung,exynosautov9-hsi2c"; 619 reg = <0x10350000 0xc0>; 620 interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>; 621 pinctrl-names = "default"; 622 pinctrl-0 = <&hsi2c5_bus>; 623 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>, 624 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>; 625 clock-names = "hsi2c", "hsi2c_pclk"; 626 #address-cells = <1>; 627 #size-cells = <0>; 628 status = "disabled"; 629 }; 630 }; 631 632 usi_3: usi@103600c0 { 633 compatible = "samsung,exynosautov9-usi", 634 "samsung,exynos850-usi"; 635 reg = <0x103600c0 0x20>; 636 samsung,sysreg = <&syscon_peric0 0x1018>; 637 samsung,mode = <USI_V2_UART>; 638 #address-cells = <1>; 639 #size-cells = <1>; 640 ranges; 641 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>, 642 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>; 643 clock-names = "pclk", "ipclk"; 644 status = "disabled"; 645 646 serial_3: serial@10360000 { 647 compatible = "samsung,exynosautov9-uart", 648 "samsung,exynos850-uart"; 649 reg = <0x10360000 0xc0>; 650 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>; 651 pinctrl-names = "default"; 652 pinctrl-0 = <&uart3_bus>; 653 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>, 654 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>; 655 clock-names = "uart", "clk_uart_baud0"; 656 samsung,uart-fifosize = <64>; 657 status = "disabled"; 658 }; 659 660 spi_3: spi@10360000 { 661 compatible = "samsung,exynosautov9-spi"; 662 reg = <0x10360000 0x30>; 663 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>; 664 pinctrl-names = "default"; 665 pinctrl-0 = <&spi3_bus &spi3_cs_func>; 666 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>, 667 <&cmu_peric0 CLK_DOUT_PERIC0_USI03_USI>, 668 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>; 669 clock-names = "spi", "spi_busclk0", "spi_ioclk"; 670 samsung,spi-src-clk = <0>; 671 dmas = <&pdma0 7>, <&pdma0 6>; 672 dma-names = "tx", "rx"; 673 num-cs = <1>; 674 #address-cells = <1>; 675 #size-cells = <0>; 676 status = "disabled"; 677 }; 678 679 hsi2c_6: i2c@10360000 { 680 compatible = "samsung,exynosautov9-hsi2c"; 681 reg = <0x10360000 0xc0>; 682 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>; 683 pinctrl-names = "default"; 684 pinctrl-0 = <&hsi2c6_bus>; 685 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>, 686 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>; 687 clock-names = "hsi2c", "hsi2c_pclk"; 688 #address-cells = <1>; 689 #size-cells = <0>; 690 status = "disabled"; 691 }; 692 }; 693 694 usi_i2c_3: usi@103700c0 { 695 compatible = "samsung,exynosautov9-usi", 696 "samsung,exynos850-usi"; 697 reg = <0x103700c0 0x20>; 698 samsung,sysreg = <&syscon_peric0 0x101c>; 699 samsung,mode = <USI_V2_I2C>; 700 #address-cells = <1>; 701 #size-cells = <1>; 702 ranges; 703 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>, 704 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>; 705 clock-names = "pclk", "ipclk"; 706 status = "disabled"; 707 708 hsi2c_7: i2c@10370000 { 709 compatible = "samsung,exynosautov9-hsi2c"; 710 reg = <0x10370000 0xc0>; 711 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>; 712 pinctrl-names = "default"; 713 pinctrl-0 = <&hsi2c7_bus>; 714 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>, 715 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>; 716 clock-names = "hsi2c", "hsi2c_pclk"; 717 #address-cells = <1>; 718 #size-cells = <0>; 719 status = "disabled"; 720 }; 721 }; 722 723 usi_4: usi@103800c0 { 724 compatible = "samsung,exynosautov9-usi", 725 "samsung,exynos850-usi"; 726 reg = <0x103800c0 0x20>; 727 samsung,sysreg = <&syscon_peric0 0x1020>; 728 samsung,mode = <USI_V2_UART>; 729 #address-cells = <1>; 730 #size-cells = <1>; 731 ranges; 732 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>, 733 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>; 734 clock-names = "pclk", "ipclk"; 735 status = "disabled"; 736 737 serial_4: serial@10380000 { 738 compatible = "samsung,exynosautov9-uart", 739 "samsung,exynos850-uart"; 740 reg = <0x10380000 0xc0>; 741 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 742 pinctrl-names = "default"; 743 pinctrl-0 = <&uart4_bus>; 744 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>, 745 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>; 746 clock-names = "uart", "clk_uart_baud0"; 747 samsung,uart-fifosize = <64>; 748 status = "disabled"; 749 }; 750 751 spi_4: spi@10380000 { 752 compatible = "samsung,exynosautov9-spi"; 753 reg = <0x10380000 0x30>; 754 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 755 pinctrl-names = "default"; 756 pinctrl-0 = <&spi4_bus &spi4_cs_func>; 757 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>, 758 <&cmu_peric0 CLK_DOUT_PERIC0_USI04_USI>, 759 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>; 760 clock-names = "spi", "spi_busclk0", "spi_ioclk"; 761 samsung,spi-src-clk = <0>; 762 dmas = <&pdma0 9>, <&pdma0 8>; 763 dma-names = "tx", "rx"; 764 num-cs = <1>; 765 #address-cells = <1>; 766 #size-cells = <0>; 767 status = "disabled"; 768 }; 769 770 hsi2c_8: i2c@10380000 { 771 compatible = "samsung,exynosautov9-hsi2c"; 772 reg = <0x10380000 0xc0>; 773 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 774 pinctrl-names = "default"; 775 pinctrl-0 = <&hsi2c8_bus>; 776 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>, 777 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>; 778 clock-names = "hsi2c", "hsi2c_pclk"; 779 #address-cells = <1>; 780 #size-cells = <0>; 781 status = "disabled"; 782 }; 783 }; 784 785 usi_i2c_4: usi@103900c0 { 786 compatible = "samsung,exynosautov9-usi", 787 "samsung,exynos850-usi"; 788 reg = <0x103900c0 0x20>; 789 samsung,sysreg = <&syscon_peric0 0x1024>; 790 samsung,mode = <USI_V2_I2C>; 791 #address-cells = <1>; 792 #size-cells = <1>; 793 ranges; 794 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>, 795 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>; 796 clock-names = "pclk", "ipclk"; 797 status = "disabled"; 798 799 hsi2c_9: i2c@10390000 { 800 compatible = "samsung,exynosautov9-hsi2c"; 801 reg = <0x10390000 0xc0>; 802 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 803 pinctrl-names = "default"; 804 pinctrl-0 = <&hsi2c9_bus>; 805 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>, 806 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>; 807 clock-names = "hsi2c", "hsi2c_pclk"; 808 #address-cells = <1>; 809 #size-cells = <0>; 810 status = "disabled"; 811 }; 812 }; 813 814 usi_5: usi@103a00c0 { 815 compatible = "samsung,exynosautov9-usi", 816 "samsung,exynos850-usi"; 817 reg = <0x103a00c0 0x20>; 818 samsung,sysreg = <&syscon_peric0 0x1028>; 819 samsung,mode = <USI_V2_UART>; 820 #address-cells = <1>; 821 #size-cells = <1>; 822 ranges; 823 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>, 824 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>; 825 clock-names = "pclk", "ipclk"; 826 status = "disabled"; 827 828 serial_5: serial@103a0000 { 829 compatible = "samsung,exynosautov9-uart", 830 "samsung,exynos850-uart"; 831 reg = <0x103a0000 0xc0>; 832 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 833 pinctrl-names = "default"; 834 pinctrl-0 = <&uart5_bus>; 835 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>, 836 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>; 837 clock-names = "uart", "clk_uart_baud0"; 838 samsung,uart-fifosize = <64>; 839 status = "disabled"; 840 }; 841 842 spi_5: spi@103a0000 { 843 compatible = "samsung,exynosautov9-spi"; 844 reg = <0x103a0000 0x30>; 845 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 846 pinctrl-names = "default"; 847 pinctrl-0 = <&spi5_bus &spi5_cs_func>; 848 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>, 849 <&cmu_peric0 CLK_DOUT_PERIC0_USI05_USI>, 850 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>; 851 clock-names = "spi", "spi_busclk0", "spi_ioclk"; 852 samsung,spi-src-clk = <0>; 853 dmas = <&pdma0 11>, <&pdma0 10>; 854 dma-names = "tx", "rx"; 855 num-cs = <1>; 856 #address-cells = <1>; 857 #size-cells = <0>; 858 status = "disabled"; 859 }; 860 861 hsi2c_10: i2c@103a0000 { 862 compatible = "samsung,exynosautov9-hsi2c"; 863 reg = <0x103a0000 0xc0>; 864 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 865 pinctrl-names = "default"; 866 pinctrl-0 = <&hsi2c10_bus>; 867 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>, 868 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>; 869 clock-names = "hsi2c", "hsi2c_pclk"; 870 #address-cells = <1>; 871 #size-cells = <0>; 872 status = "disabled"; 873 }; 874 }; 875 876 usi_i2c_5: usi@103b00c0 { 877 compatible = "samsung,exynosautov9-usi", 878 "samsung,exynos850-usi"; 879 reg = <0x103b00c0 0x20>; 880 samsung,sysreg = <&syscon_peric0 0x102c>; 881 samsung,mode = <USI_V2_I2C>; 882 #address-cells = <1>; 883 #size-cells = <1>; 884 ranges; 885 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>, 886 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>; 887 clock-names = "pclk", "ipclk"; 888 status = "disabled"; 889 890 hsi2c_11: i2c@103b0000 { 891 compatible = "samsung,exynosautov9-hsi2c"; 892 reg = <0x103b0000 0xc0>; 893 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 894 pinctrl-names = "default"; 895 pinctrl-0 = <&hsi2c11_bus>; 896 clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>, 897 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>; 898 clock-names = "hsi2c", "hsi2c_pclk"; 899 #address-cells = <1>; 900 #size-cells = <0>; 901 status = "disabled"; 902 }; 903 }; 904 905 usi_6: usi@109000c0 { 906 compatible = "samsung,exynosautov9-usi", 907 "samsung,exynos850-usi"; 908 reg = <0x109000c0 0x20>; 909 samsung,sysreg = <&syscon_peric1 0x1000>; 910 samsung,mode = <USI_V2_UART>; 911 #address-cells = <1>; 912 #size-cells = <1>; 913 ranges; 914 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>, 915 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>; 916 clock-names = "pclk", "ipclk"; 917 status = "disabled"; 918 919 serial_6: serial@10900000 { 920 compatible = "samsung,exynosautov9-uart", 921 "samsung,exynos850-uart"; 922 reg = <0x10900000 0xc0>; 923 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 924 pinctrl-names = "default"; 925 pinctrl-0 = <&uart6_bus>; 926 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>, 927 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>; 928 clock-names = "uart", "clk_uart_baud0"; 929 samsung,uart-fifosize = <256>; 930 status = "disabled"; 931 }; 932 933 spi_6: spi@10900000 { 934 compatible = "samsung,exynosautov9-spi"; 935 reg = <0x10900000 0x30>; 936 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 937 pinctrl-names = "default"; 938 pinctrl-0 = <&spi6_bus &spi6_cs_func>; 939 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>, 940 <&cmu_peric1 CLK_DOUT_PERIC1_USI06_USI>, 941 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>; 942 clock-names = "spi", "spi_busclk0", "spi_ioclk"; 943 samsung,spi-src-clk = <0>; 944 dmas = <&pdma0 13>, <&pdma0 12>; 945 dma-names = "tx", "rx"; 946 num-cs = <1>; 947 #address-cells = <1>; 948 #size-cells = <0>; 949 status = "disabled"; 950 }; 951 952 hsi2c_12: i2c@10900000 { 953 compatible = "samsung,exynosautov9-hsi2c"; 954 reg = <0x10900000 0xc0>; 955 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 956 pinctrl-names = "default"; 957 pinctrl-0 = <&hsi2c12_bus>; 958 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>, 959 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>; 960 clock-names = "hsi2c", "hsi2c_pclk"; 961 #address-cells = <1>; 962 #size-cells = <0>; 963 status = "disabled"; 964 }; 965 }; 966 967 usi_i2c_6: usi@109100c0 { 968 compatible = "samsung,exynosautov9-usi", 969 "samsung,exynos850-usi"; 970 reg = <0x109100c0 0x20>; 971 samsung,sysreg = <&syscon_peric1 0x1004>; 972 samsung,mode = <USI_V2_I2C>; 973 #address-cells = <1>; 974 #size-cells = <1>; 975 ranges; 976 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>, 977 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>; 978 clock-names = "pclk", "ipclk"; 979 status = "disabled"; 980 981 hsi2c_13: i2c@10910000 { 982 compatible = "samsung,exynosautov9-hsi2c"; 983 reg = <0x10910000 0xc0>; 984 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 985 pinctrl-names = "default"; 986 pinctrl-0 = <&hsi2c13_bus>; 987 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>, 988 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>; 989 clock-names = "hsi2c", "hsi2c_pclk"; 990 #address-cells = <1>; 991 #size-cells = <0>; 992 status = "disabled"; 993 }; 994 }; 995 996 usi_7: usi@109200c0 { 997 compatible = "samsung,exynosautov9-usi", 998 "samsung,exynos850-usi"; 999 reg = <0x109200c0 0x20>; 1000 samsung,sysreg = <&syscon_peric1 0x1008>; 1001 samsung,mode = <USI_V2_UART>; 1002 #address-cells = <1>; 1003 #size-cells = <1>; 1004 ranges; 1005 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>, 1006 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>; 1007 clock-names = "pclk", "ipclk"; 1008 status = "disabled"; 1009 1010 serial_7: serial@10920000 { 1011 compatible = "samsung,exynosautov9-uart", 1012 "samsung,exynos850-uart"; 1013 reg = <0x10920000 0xc0>; 1014 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1015 pinctrl-names = "default"; 1016 pinctrl-0 = <&uart7_bus>; 1017 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>, 1018 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>; 1019 clock-names = "uart", "clk_uart_baud0"; 1020 samsung,uart-fifosize = <64>; 1021 status = "disabled"; 1022 }; 1023 1024 spi_7: spi@10920000 { 1025 compatible = "samsung,exynosautov9-spi"; 1026 reg = <0x10920000 0x30>; 1027 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1028 pinctrl-names = "default"; 1029 pinctrl-0 = <&spi7_bus &spi7_cs_func>; 1030 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>, 1031 <&cmu_peric1 CLK_DOUT_PERIC1_USI07_USI>, 1032 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>; 1033 clock-names = "spi", "spi_busclk0", "spi_ioclk"; 1034 samsung,spi-src-clk = <0>; 1035 dmas = <&pdma0 15>, <&pdma0 14>; 1036 dma-names = "tx", "rx"; 1037 num-cs = <1>; 1038 #address-cells = <1>; 1039 #size-cells = <0>; 1040 status = "disabled"; 1041 }; 1042 1043 hsi2c_14: i2c@10920000 { 1044 compatible = "samsung,exynosautov9-hsi2c"; 1045 reg = <0x10920000 0xc0>; 1046 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1047 pinctrl-names = "default"; 1048 pinctrl-0 = <&hsi2c14_bus>; 1049 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>, 1050 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>; 1051 clock-names = "hsi2c", "hsi2c_pclk"; 1052 #address-cells = <1>; 1053 #size-cells = <0>; 1054 status = "disabled"; 1055 }; 1056 }; 1057 1058 usi_i2c_7: usi@109300c0 { 1059 compatible = "samsung,exynosautov9-usi", 1060 "samsung,exynos850-usi"; 1061 reg = <0x109300c0 0x20>; 1062 samsung,sysreg = <&syscon_peric1 0x100c>; 1063 samsung,mode = <USI_V2_I2C>; 1064 #address-cells = <1>; 1065 #size-cells = <1>; 1066 ranges; 1067 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>, 1068 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>; 1069 clock-names = "pclk", "ipclk"; 1070 status = "disabled"; 1071 1072 hsi2c_15: i2c@10930000 { 1073 compatible = "samsung,exynosautov9-hsi2c"; 1074 reg = <0x10930000 0xc0>; 1075 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1076 pinctrl-names = "default"; 1077 pinctrl-0 = <&hsi2c15_bus>; 1078 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>, 1079 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>; 1080 clock-names = "hsi2c", "hsi2c_pclk"; 1081 #address-cells = <1>; 1082 #size-cells = <0>; 1083 status = "disabled"; 1084 }; 1085 }; 1086 1087 usi_8: usi@109400c0 { 1088 compatible = "samsung,exynosautov9-usi", 1089 "samsung,exynos850-usi"; 1090 reg = <0x109400c0 0x20>; 1091 samsung,sysreg = <&syscon_peric1 0x1010>; 1092 samsung,mode = <USI_V2_UART>; 1093 #address-cells = <1>; 1094 #size-cells = <1>; 1095 ranges; 1096 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>, 1097 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>; 1098 clock-names = "pclk", "ipclk"; 1099 status = "disabled"; 1100 1101 serial_8: serial@10940000 { 1102 compatible = "samsung,exynosautov9-uart", 1103 "samsung,exynos850-uart"; 1104 reg = <0x10940000 0xc0>; 1105 interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>; 1106 pinctrl-names = "default"; 1107 pinctrl-0 = <&uart8_bus>; 1108 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>, 1109 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>; 1110 clock-names = "uart", "clk_uart_baud0"; 1111 samsung,uart-fifosize = <64>; 1112 status = "disabled"; 1113 }; 1114 1115 spi_8: spi@10940000 { 1116 compatible = "samsung,exynosautov9-spi"; 1117 reg = <0x10940000 0x30>; 1118 interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>; 1119 pinctrl-names = "default"; 1120 pinctrl-0 = <&spi8_bus &spi8_cs_func>; 1121 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>, 1122 <&cmu_peric1 CLK_DOUT_PERIC1_USI08_USI>, 1123 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>; 1124 clock-names = "spi", "spi_busclk0", "spi_ioclk"; 1125 samsung,spi-src-clk = <0>; 1126 dmas = <&pdma0 17>, <&pdma0 16>; 1127 dma-names = "tx", "rx"; 1128 num-cs = <1>; 1129 #address-cells = <1>; 1130 #size-cells = <0>; 1131 status = "disabled"; 1132 }; 1133 1134 hsi2c_16: i2c@10940000 { 1135 compatible = "samsung,exynosautov9-hsi2c"; 1136 reg = <0x10940000 0xc0>; 1137 interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>; 1138 pinctrl-names = "default"; 1139 pinctrl-0 = <&hsi2c16_bus>; 1140 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>, 1141 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>; 1142 clock-names = "hsi2c", "hsi2c_pclk"; 1143 #address-cells = <1>; 1144 #size-cells = <0>; 1145 status = "disabled"; 1146 }; 1147 }; 1148 1149 usi_i2c_8: usi@109500c0 { 1150 compatible = "samsung,exynosautov9-usi", 1151 "samsung,exynos850-usi"; 1152 reg = <0x109500c0 0x20>; 1153 samsung,sysreg = <&syscon_peric1 0x1014>; 1154 samsung,mode = <USI_V2_I2C>; 1155 #address-cells = <1>; 1156 #size-cells = <1>; 1157 ranges; 1158 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>, 1159 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>; 1160 clock-names = "pclk", "ipclk"; 1161 status = "disabled"; 1162 1163 hsi2c_17: i2c@10950000 { 1164 compatible = "samsung,exynosautov9-hsi2c"; 1165 reg = <0x10950000 0xc0>; 1166 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1167 pinctrl-names = "default"; 1168 pinctrl-0 = <&hsi2c17_bus>; 1169 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>, 1170 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>; 1171 clock-names = "hsi2c", "hsi2c_pclk"; 1172 #address-cells = <1>; 1173 #size-cells = <0>; 1174 status = "disabled"; 1175 }; 1176 }; 1177 1178 usi_9: usi@109600c0 { 1179 compatible = "samsung,exynosautov9-usi", 1180 "samsung,exynos850-usi"; 1181 reg = <0x109600c0 0x20>; 1182 samsung,sysreg = <&syscon_peric1 0x1018>; 1183 samsung,mode = <USI_V2_UART>; 1184 #address-cells = <1>; 1185 #size-cells = <1>; 1186 ranges; 1187 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>, 1188 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>; 1189 clock-names = "pclk", "ipclk"; 1190 status = "disabled"; 1191 1192 serial_9: serial@10960000 { 1193 compatible = "samsung,exynosautov9-uart", 1194 "samsung,exynos850-uart"; 1195 reg = <0x10960000 0xc0>; 1196 interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>; 1197 pinctrl-names = "default"; 1198 pinctrl-0 = <&uart9_bus>; 1199 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>, 1200 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>; 1201 clock-names = "uart", "clk_uart_baud0"; 1202 samsung,uart-fifosize = <64>; 1203 status = "disabled"; 1204 }; 1205 1206 spi_9: spi@10960000 { 1207 compatible = "samsung,exynosautov9-spi"; 1208 reg = <0x10960000 0x30>; 1209 interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>; 1210 pinctrl-names = "default"; 1211 pinctrl-0 = <&spi9_bus &spi9_cs_func>; 1212 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>, 1213 <&cmu_peric1 CLK_DOUT_PERIC1_USI09_USI>, 1214 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>; 1215 clock-names = "spi", "spi_busclk0", "spi_ioclk"; 1216 samsung,spi-src-clk = <0>; 1217 dmas = <&pdma0 19>, <&pdma0 18>; 1218 dma-names = "tx", "rx"; 1219 num-cs = <1>; 1220 #address-cells = <1>; 1221 #size-cells = <0>; 1222 status = "disabled"; 1223 }; 1224 1225 hsi2c_18: i2c@10960000 { 1226 compatible = "samsung,exynosautov9-hsi2c"; 1227 reg = <0x10960000 0xc0>; 1228 interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>; 1229 pinctrl-names = "default"; 1230 pinctrl-0 = <&hsi2c18_bus>; 1231 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>, 1232 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>; 1233 clock-names = "hsi2c", "hsi2c_pclk"; 1234 #address-cells = <1>; 1235 #size-cells = <0>; 1236 status = "disabled"; 1237 }; 1238 }; 1239 1240 usi_i2c_9: usi@109700c0 { 1241 compatible = "samsung,exynosautov9-usi", 1242 "samsung,exynos850-usi"; 1243 reg = <0x109700c0 0x20>; 1244 samsung,sysreg = <&syscon_peric1 0x101c>; 1245 samsung,mode = <USI_V2_I2C>; 1246 #address-cells = <1>; 1247 #size-cells = <1>; 1248 ranges; 1249 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>, 1250 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>; 1251 clock-names = "pclk", "ipclk"; 1252 status = "disabled"; 1253 1254 hsi2c_19: i2c@10970000 { 1255 compatible = "samsung,exynosautov9-hsi2c"; 1256 reg = <0x10970000 0xc0>; 1257 interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>; 1258 pinctrl-names = "default"; 1259 pinctrl-0 = <&hsi2c19_bus>; 1260 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>, 1261 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>; 1262 clock-names = "hsi2c", "hsi2c_pclk"; 1263 #address-cells = <1>; 1264 #size-cells = <0>; 1265 status = "disabled"; 1266 }; 1267 }; 1268 1269 usi_10: usi@109800c0 { 1270 compatible = "samsung,exynosautov9-usi", 1271 "samsung,exynos850-usi"; 1272 reg = <0x109800c0 0x20>; 1273 samsung,sysreg = <&syscon_peric1 0x1020>; 1274 samsung,mode = <USI_V2_UART>; 1275 #address-cells = <1>; 1276 #size-cells = <1>; 1277 ranges; 1278 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>, 1279 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>; 1280 clock-names = "pclk", "ipclk"; 1281 status = "disabled"; 1282 1283 serial_10: serial@10980000 { 1284 compatible = "samsung,exynosautov9-uart", 1285 "samsung,exynos850-uart"; 1286 reg = <0x10980000 0xc0>; 1287 interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>; 1288 pinctrl-names = "default"; 1289 pinctrl-0 = <&uart10_bus>; 1290 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>, 1291 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>; 1292 clock-names = "uart", "clk_uart_baud0"; 1293 samsung,uart-fifosize = <64>; 1294 status = "disabled"; 1295 }; 1296 1297 spi_10: spi@10980000 { 1298 compatible = "samsung,exynosautov9-spi"; 1299 reg = <0x10980000 0x30>; 1300 interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>; 1301 pinctrl-names = "default"; 1302 pinctrl-0 = <&spi10_bus &spi10_cs_func>; 1303 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>, 1304 <&cmu_peric1 CLK_DOUT_PERIC1_USI10_USI>, 1305 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>; 1306 clock-names = "spi", "spi_busclk0", "spi_ioclk"; 1307 samsung,spi-src-clk = <0>; 1308 dmas = <&pdma0 21>, <&pdma0 20>; 1309 dma-names = "tx", "rx"; 1310 num-cs = <1>; 1311 #address-cells = <1>; 1312 #size-cells = <0>; 1313 status = "disabled"; 1314 }; 1315 1316 hsi2c_20: i2c@10980000 { 1317 compatible = "samsung,exynosautov9-hsi2c"; 1318 reg = <0x10980000 0xc0>; 1319 interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>; 1320 pinctrl-names = "default"; 1321 pinctrl-0 = <&hsi2c20_bus>; 1322 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>, 1323 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>; 1324 clock-names = "hsi2c", "hsi2c_pclk"; 1325 #address-cells = <1>; 1326 #size-cells = <0>; 1327 status = "disabled"; 1328 }; 1329 }; 1330 1331 usi_i2c_10: usi@109900c0 { 1332 compatible = "samsung,exynosautov9-usi", 1333 "samsung,exynos850-usi"; 1334 reg = <0x109900c0 0x20>; 1335 samsung,sysreg = <&syscon_peric1 0x1024>; 1336 samsung,mode = <USI_V2_I2C>; 1337 #address-cells = <1>; 1338 #size-cells = <1>; 1339 ranges; 1340 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>, 1341 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>; 1342 clock-names = "pclk", "ipclk"; 1343 status = "disabled"; 1344 1345 hsi2c_21: i2c@10990000 { 1346 compatible = "samsung,exynosautov9-hsi2c"; 1347 reg = <0x10990000 0xc0>; 1348 interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>; 1349 pinctrl-names = "default"; 1350 pinctrl-0 = <&hsi2c21_bus>; 1351 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>, 1352 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>; 1353 clock-names = "hsi2c", "hsi2c_pclk"; 1354 #address-cells = <1>; 1355 #size-cells = <0>; 1356 status = "disabled"; 1357 }; 1358 }; 1359 1360 usi_11: usi@109a00c0 { 1361 compatible = "samsung,exynosautov9-usi", 1362 "samsung,exynos850-usi"; 1363 reg = <0x109a00c0 0x20>; 1364 samsung,sysreg = <&syscon_peric1 0x1028>; 1365 samsung,mode = <USI_V2_UART>; 1366 #address-cells = <1>; 1367 #size-cells = <1>; 1368 ranges; 1369 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>, 1370 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>; 1371 clock-names = "pclk", "ipclk"; 1372 status = "disabled"; 1373 1374 serial_11: serial@109a0000 { 1375 compatible = "samsung,exynosautov9-uart", 1376 "samsung,exynos850-uart"; 1377 reg = <0x109a0000 0xc0>; 1378 interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; 1379 pinctrl-names = "default"; 1380 pinctrl-0 = <&uart11_bus>; 1381 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>, 1382 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>; 1383 clock-names = "uart", "clk_uart_baud0"; 1384 samsung,uart-fifosize = <64>; 1385 status = "disabled"; 1386 }; 1387 1388 spi_11: spi@109a0000 { 1389 compatible = "samsung,exynosautov9-spi"; 1390 reg = <0x109a0000 0x30>; 1391 interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; 1392 pinctrl-names = "default"; 1393 pinctrl-0 = <&spi11_bus &spi11_cs_func>; 1394 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>, 1395 <&cmu_peric1 CLK_DOUT_PERIC1_USI11_USI>, 1396 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>; 1397 clock-names = "spi", "spi_busclk0", "spi_ioclk"; 1398 samsung,spi-src-clk = <0>; 1399 num-cs = <1>; 1400 #address-cells = <1>; 1401 #size-cells = <0>; 1402 status = "disabled"; 1403 }; 1404 1405 hsi2c_22: i2c@109a0000 { 1406 compatible = "samsung,exynosautov9-hsi2c"; 1407 reg = <0x109a0000 0xc0>; 1408 pinctrl-names = "default"; 1409 pinctrl-0 = <&hsi2c22_bus>; 1410 interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; 1411 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>, 1412 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>; 1413 clock-names = "hsi2c", "hsi2c_pclk"; 1414 #address-cells = <1>; 1415 #size-cells = <0>; 1416 status = "disabled"; 1417 }; 1418 }; 1419 1420 usi_i2c_11: usi@109b00c0 { 1421 compatible = "samsung,exynosautov9-usi", 1422 "samsung,exynos850-usi"; 1423 reg = <0x109b00c0 0x20>; 1424 samsung,sysreg = <&syscon_peric1 0x102c>; 1425 samsung,mode = <USI_V2_I2C>; 1426 #address-cells = <1>; 1427 #size-cells = <1>; 1428 ranges; 1429 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>, 1430 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>; 1431 clock-names = "pclk", "ipclk"; 1432 status = "disabled"; 1433 1434 hsi2c_23: i2c@109b0000 { 1435 compatible = "samsung,exynosautov9-hsi2c"; 1436 reg = <0x109b0000 0xc0>; 1437 interrupts = <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>; 1438 pinctrl-names = "default"; 1439 pinctrl-0 = <&hsi2c23_bus>; 1440 clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>, 1441 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>; 1442 clock-names = "hsi2c", "hsi2c_pclk"; 1443 #address-cells = <1>; 1444 #size-cells = <0>; 1445 status = "disabled"; 1446 }; 1447 }; 1448 1449 ufs_0_phy: phy@17e04000 { 1450 compatible = "samsung,exynosautov9-ufs-phy"; 1451 reg = <0x17e04000 0xc00>; 1452 reg-names = "phy-pma"; 1453 samsung,pmu-syscon = <&pmu_system_controller>; 1454 #phy-cells = <0>; 1455 clocks = <&xtcxo>; 1456 clock-names = "ref_clk"; 1457 status = "disabled"; 1458 }; 1459 1460 ufs_0: ufs@17e00000 { 1461 compatible = "samsung,exynosautov9-ufs"; 1462 1463 reg = <0x17e00000 0x100>, 1464 <0x17e01100 0x410>, 1465 <0x17e80000 0x8000>, 1466 <0x17dc0000 0x2200>; 1467 reg-names = "hci", "vs_hci", "unipro", "ufsp"; 1468 interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; 1469 clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD0_ACLK>, 1470 <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD0_UNIPRO>; 1471 clock-names = "core_clk", "sclk_unipro_main"; 1472 freq-table-hz = <0 0>, <0 0>; 1473 pinctrl-names = "default"; 1474 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; 1475 phys = <&ufs_0_phy>; 1476 phy-names = "ufs-phy"; 1477 samsung,sysreg = <&syscon_fsys2 0x710>; 1478 status = "disabled"; 1479 }; 1480 1481 ufs_1_phy: phy@17f04000 { 1482 compatible = "samsung,exynosautov9-ufs-phy"; 1483 reg = <0x17f04000 0xc00>; 1484 reg-names = "phy-pma"; 1485 samsung,pmu-syscon = <&pmu_system_controller 0x72c>; 1486 #phy-cells = <0>; 1487 clocks = <&xtcxo>; 1488 clock-names = "ref_clk"; 1489 status = "disabled"; 1490 }; 1491 1492 ufs_1: ufs@17f00000 { 1493 compatible = "samsung,exynosautov9-ufs"; 1494 1495 reg = <0x17f00000 0x100>, 1496 <0x17f01100 0x410>, 1497 <0x17f80000 0x8000>, 1498 <0x17de0000 0x2200>; 1499 reg-names = "hci", "vs_hci", "unipro", "ufsp"; 1500 interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>; 1501 clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_ACLK>, 1502 <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_UNIPRO>; 1503 clock-names = "core_clk", "sclk_unipro_main"; 1504 freq-table-hz = <0 0>, <0 0>; 1505 pinctrl-names = "default"; 1506 pinctrl-0 = <&ufs_rst_n_1 &ufs_refclk_out_1>; 1507 phys = <&ufs_1_phy>; 1508 phy-names = "ufs-phy"; 1509 samsung,sysreg = <&syscon_fsys2 0x714>; 1510 status = "disabled"; 1511 }; 1512 1513 watchdog_cl0: watchdog@10050000 { 1514 compatible = "samsung,exynosautov9-wdt"; 1515 reg = <0x10050000 0x100>; 1516 interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>; 1517 clocks = <&cmu_peris CLK_GOUT_WDT_CLUSTER0>, <&xtcxo>; 1518 clock-names = "watchdog", "watchdog_src"; 1519 samsung,syscon-phandle = <&pmu_system_controller>; 1520 samsung,cluster-index = <0>; 1521 }; 1522 1523 watchdog_cl1: watchdog@10060000 { 1524 compatible = "samsung,exynosautov9-wdt"; 1525 reg = <0x10060000 0x100>; 1526 interrupts = <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>; 1527 clocks = <&cmu_peris CLK_GOUT_WDT_CLUSTER1>, <&xtcxo>; 1528 clock-names = "watchdog", "watchdog_src"; 1529 samsung,syscon-phandle = <&pmu_system_controller>; 1530 samsung,cluster-index = <1>; 1531 }; 1532 }; 1533}; 1534 1535#include "exynosautov9-pinctrl.dtsi" 1536