1*96fb1ebdSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2*96fb1ebdSEmmanuel Vadot#include <dt-bindings/interrupt-controller/arm-gic.h> 3*96fb1ebdSEmmanuel Vadot#include <dt-bindings/interrupt-controller/irq.h> 4*96fb1ebdSEmmanuel Vadot 5*96fb1ebdSEmmanuel Vadot/ { 6*96fb1ebdSEmmanuel Vadot compatible = "bst,c1200"; 7*96fb1ebdSEmmanuel Vadot #address-cells = <2>; 8*96fb1ebdSEmmanuel Vadot #size-cells = <2>; 9*96fb1ebdSEmmanuel Vadot 10*96fb1ebdSEmmanuel Vadot cpus { 11*96fb1ebdSEmmanuel Vadot #address-cells = <1>; 12*96fb1ebdSEmmanuel Vadot #size-cells = <0>; 13*96fb1ebdSEmmanuel Vadot 14*96fb1ebdSEmmanuel Vadot cpu@0 { 15*96fb1ebdSEmmanuel Vadot device_type = "cpu"; 16*96fb1ebdSEmmanuel Vadot compatible = "arm,cortex-a78"; 17*96fb1ebdSEmmanuel Vadot reg = <0x0>; 18*96fb1ebdSEmmanuel Vadot enable-method = "psci"; 19*96fb1ebdSEmmanuel Vadot next-level-cache = <&l2_cache>; 20*96fb1ebdSEmmanuel Vadot }; 21*96fb1ebdSEmmanuel Vadot 22*96fb1ebdSEmmanuel Vadot cpu@1 { 23*96fb1ebdSEmmanuel Vadot device_type = "cpu"; 24*96fb1ebdSEmmanuel Vadot compatible = "arm,cortex-a78"; 25*96fb1ebdSEmmanuel Vadot reg = <0x100>; 26*96fb1ebdSEmmanuel Vadot enable-method = "psci"; 27*96fb1ebdSEmmanuel Vadot next-level-cache = <&l2_cache>; 28*96fb1ebdSEmmanuel Vadot }; 29*96fb1ebdSEmmanuel Vadot 30*96fb1ebdSEmmanuel Vadot cpu@2 { 31*96fb1ebdSEmmanuel Vadot device_type = "cpu"; 32*96fb1ebdSEmmanuel Vadot compatible = "arm,cortex-a78"; 33*96fb1ebdSEmmanuel Vadot reg = <0x200>; 34*96fb1ebdSEmmanuel Vadot enable-method = "psci"; 35*96fb1ebdSEmmanuel Vadot next-level-cache = <&l2_cache>; 36*96fb1ebdSEmmanuel Vadot }; 37*96fb1ebdSEmmanuel Vadot 38*96fb1ebdSEmmanuel Vadot cpu@3 { 39*96fb1ebdSEmmanuel Vadot device_type = "cpu"; 40*96fb1ebdSEmmanuel Vadot compatible = "arm,cortex-a78"; 41*96fb1ebdSEmmanuel Vadot reg = <0x300>; 42*96fb1ebdSEmmanuel Vadot enable-method = "psci"; 43*96fb1ebdSEmmanuel Vadot next-level-cache = <&l2_cache>; 44*96fb1ebdSEmmanuel Vadot }; 45*96fb1ebdSEmmanuel Vadot 46*96fb1ebdSEmmanuel Vadot l2_cache: l2-cache { 47*96fb1ebdSEmmanuel Vadot compatible = "cache"; 48*96fb1ebdSEmmanuel Vadot cache-level = <2>; 49*96fb1ebdSEmmanuel Vadot cache-unified; 50*96fb1ebdSEmmanuel Vadot }; 51*96fb1ebdSEmmanuel Vadot }; 52*96fb1ebdSEmmanuel Vadot 53*96fb1ebdSEmmanuel Vadot psci { 54*96fb1ebdSEmmanuel Vadot compatible = "arm,psci-1.0"; 55*96fb1ebdSEmmanuel Vadot method = "smc"; 56*96fb1ebdSEmmanuel Vadot }; 57*96fb1ebdSEmmanuel Vadot 58*96fb1ebdSEmmanuel Vadot soc { 59*96fb1ebdSEmmanuel Vadot compatible = "simple-bus"; 60*96fb1ebdSEmmanuel Vadot ranges; 61*96fb1ebdSEmmanuel Vadot #address-cells = <2>; 62*96fb1ebdSEmmanuel Vadot #size-cells = <2>; 63*96fb1ebdSEmmanuel Vadot interrupt-parent = <&gic>; 64*96fb1ebdSEmmanuel Vadot 65*96fb1ebdSEmmanuel Vadot uart0: serial@20008000 { 66*96fb1ebdSEmmanuel Vadot compatible = "snps,dw-apb-uart"; 67*96fb1ebdSEmmanuel Vadot reg = <0x0 0x20008000 0x0 0x1000>; 68*96fb1ebdSEmmanuel Vadot clock-frequency = <25000000>; 69*96fb1ebdSEmmanuel Vadot interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; 70*96fb1ebdSEmmanuel Vadot reg-shift = <2>; 71*96fb1ebdSEmmanuel Vadot reg-io-width = <4>; 72*96fb1ebdSEmmanuel Vadot status = "disabled"; 73*96fb1ebdSEmmanuel Vadot }; 74*96fb1ebdSEmmanuel Vadot 75*96fb1ebdSEmmanuel Vadot gic: interrupt-controller@32800000 { 76*96fb1ebdSEmmanuel Vadot compatible = "arm,gic-v3"; 77*96fb1ebdSEmmanuel Vadot reg = <0x0 0x32800000 0x0 0x10000>, 78*96fb1ebdSEmmanuel Vadot <0x0 0x32880000 0x0 0x100000>; 79*96fb1ebdSEmmanuel Vadot ranges; 80*96fb1ebdSEmmanuel Vadot #address-cells = <2>; 81*96fb1ebdSEmmanuel Vadot #size-cells = <2>; 82*96fb1ebdSEmmanuel Vadot #interrupt-cells = <3>; 83*96fb1ebdSEmmanuel Vadot interrupt-controller; 84*96fb1ebdSEmmanuel Vadot interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>; 85*96fb1ebdSEmmanuel Vadot }; 86*96fb1ebdSEmmanuel Vadot }; 87*96fb1ebdSEmmanuel Vadot 88*96fb1ebdSEmmanuel Vadot timer { 89*96fb1ebdSEmmanuel Vadot compatible = "arm,armv8-timer"; 90*96fb1ebdSEmmanuel Vadot always-on; 91*96fb1ebdSEmmanuel Vadot interrupt-parent = <&gic>; 92*96fb1ebdSEmmanuel Vadot interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 93*96fb1ebdSEmmanuel Vadot <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 94*96fb1ebdSEmmanuel Vadot <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 95*96fb1ebdSEmmanuel Vadot <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; 96*96fb1ebdSEmmanuel Vadot }; 97*96fb1ebdSEmmanuel Vadot}; 98