xref: /freebsd/sys/contrib/device-tree/src/arm64/broadcom/stingray/bcm958742k.dts (revision f81cdf24ba5436367377f7c8e8f51f6df2a75ca7)
1/*
2 *  BSD LICENSE
3 *
4 *  Copyright(c) 2016-2017 Broadcom.  All rights reserved.
5 *
6 *  Redistribution and use in source and binary forms, with or without
7 *  modification, are permitted provided that the following conditions
8 *  are met:
9 *
10 *    * Redistributions of source code must retain the above copyright
11 *      notice, this list of conditions and the following disclaimer.
12 *    * Redistributions in binary form must reproduce the above copyright
13 *      notice, this list of conditions and the following disclaimer in
14 *      the documentation and/or other materials provided with the
15 *      distribution.
16 *    * Neither the name of Broadcom nor the names of its
17 *      contributors may be used to endorse or promote products derived
18 *      from this software without specific prior written permission.
19 *
20 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/dts-v1/;
34
35#include "bcm958742-base.dtsi"
36
37/ {
38	compatible = "brcm,bcm958742k", "brcm,stingray";
39	model = "Stingray Combo SVK (BCM958742K)";
40};
41
42&gphy0 {
43	enet-phy-lane-swap;
44};
45
46&sdio0 {
47	mmc-ddr-1_8v;
48};
49
50&uart2 {
51	status = "okay";
52};
53
54&uart3 {
55	status = "okay";
56};
57
58&ssp0 {
59	pinctrl-0 = <&spi0_pins>;
60	pinctrl-names = "default";
61	cs-gpios = <&gpio_hsls 34 0>;
62	status = "okay";
63
64	flash@0 {
65		compatible = "jedec,spi-nor";
66		reg = <0>;
67		spi-max-frequency = <20000000>;
68		#address-cells = <1>;
69		#size-cells = <1>;
70	};
71};
72
73&ssp1 {
74	pinctrl-0 = <&spi1_pins>;
75	pinctrl-names = "default";
76	cs-gpios = <&gpio_hsls 96 0>;
77	status = "okay";
78
79	flash@0 {
80		compatible = "jedec,spi-nor";
81		reg = <0>;
82		spi-max-frequency = <20000000>;
83		#address-cells = <1>;
84		#size-cells = <1>;
85	};
86};
87