1*c66ec88fSEmmanuel Vadot/* 2*c66ec88fSEmmanuel Vadot * ARM Ltd. 3*c66ec88fSEmmanuel Vadot * 4*c66ec88fSEmmanuel Vadot * ARMv8 Foundation model DTS (GICv3 configuration) 5*c66ec88fSEmmanuel Vadot */ 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadot/ { 8*c66ec88fSEmmanuel Vadot gic: interrupt-controller@2f000000 { 9*c66ec88fSEmmanuel Vadot compatible = "arm,gic-v3"; 10*c66ec88fSEmmanuel Vadot #interrupt-cells = <3>; 11*c66ec88fSEmmanuel Vadot #address-cells = <1>; 12*c66ec88fSEmmanuel Vadot #size-cells = <1>; 13*c66ec88fSEmmanuel Vadot ranges = <0x0 0x0 0x2f000000 0x100000>; 14*c66ec88fSEmmanuel Vadot interrupt-controller; 15*c66ec88fSEmmanuel Vadot reg = <0x0 0x2f000000 0x0 0x10000>, 16*c66ec88fSEmmanuel Vadot <0x0 0x2f100000 0x0 0x200000>, 17*c66ec88fSEmmanuel Vadot <0x0 0x2c000000 0x0 0x2000>, 18*c66ec88fSEmmanuel Vadot <0x0 0x2c010000 0x0 0x2000>, 19*c66ec88fSEmmanuel Vadot <0x0 0x2c02f000 0x0 0x2000>; 20*c66ec88fSEmmanuel Vadot interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 21*c66ec88fSEmmanuel Vadot 22*c66ec88fSEmmanuel Vadot its: msi-controller@2f020000 { 23*c66ec88fSEmmanuel Vadot compatible = "arm,gic-v3-its"; 24*c66ec88fSEmmanuel Vadot msi-controller; 25*c66ec88fSEmmanuel Vadot #msi-cells = <1>; 26*c66ec88fSEmmanuel Vadot reg = <0x20000 0x20000>; 27*c66ec88fSEmmanuel Vadot }; 28*c66ec88fSEmmanuel Vadot }; 29*c66ec88fSEmmanuel Vadot}; 30