xref: /freebsd/sys/contrib/device-tree/src/arm64/apple/t7000.dtsi (revision 5f62a964e9f8abc6a05d8338273fadd154f0a206)
1*5f62a964SEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0+ OR MIT
2*5f62a964SEmmanuel Vadot/*
3*5f62a964SEmmanuel Vadot * Apple T7000 "A8" SoC
4*5f62a964SEmmanuel Vadot *
5*5f62a964SEmmanuel Vadot * Other names: H7P, "Fiji"
6*5f62a964SEmmanuel Vadot *
7*5f62a964SEmmanuel Vadot * Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
8*5f62a964SEmmanuel Vadot * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts.
9*5f62a964SEmmanuel Vadot */
10*5f62a964SEmmanuel Vadot
11*5f62a964SEmmanuel Vadot#include <dt-bindings/gpio/gpio.h>
12*5f62a964SEmmanuel Vadot#include <dt-bindings/interrupt-controller/apple-aic.h>
13*5f62a964SEmmanuel Vadot#include <dt-bindings/interrupt-controller/irq.h>
14*5f62a964SEmmanuel Vadot#include <dt-bindings/pinctrl/apple.h>
15*5f62a964SEmmanuel Vadot
16*5f62a964SEmmanuel Vadot/ {
17*5f62a964SEmmanuel Vadot	interrupt-parent = <&aic>;
18*5f62a964SEmmanuel Vadot	#address-cells = <2>;
19*5f62a964SEmmanuel Vadot	#size-cells = <2>;
20*5f62a964SEmmanuel Vadot
21*5f62a964SEmmanuel Vadot	clkref: clock-ref {
22*5f62a964SEmmanuel Vadot		compatible = "fixed-clock";
23*5f62a964SEmmanuel Vadot		#clock-cells = <0>;
24*5f62a964SEmmanuel Vadot		clock-frequency = <24000000>;
25*5f62a964SEmmanuel Vadot		clock-output-names = "clkref";
26*5f62a964SEmmanuel Vadot	};
27*5f62a964SEmmanuel Vadot
28*5f62a964SEmmanuel Vadot	cpus {
29*5f62a964SEmmanuel Vadot		#address-cells = <2>;
30*5f62a964SEmmanuel Vadot		#size-cells = <0>;
31*5f62a964SEmmanuel Vadot
32*5f62a964SEmmanuel Vadot		cpu0: cpu@0 {
33*5f62a964SEmmanuel Vadot			compatible = "apple,typhoon";
34*5f62a964SEmmanuel Vadot			reg = <0x0 0x0>;
35*5f62a964SEmmanuel Vadot			cpu-release-addr = <0 0>; /* To be filled in by loader */
36*5f62a964SEmmanuel Vadot			enable-method = "spin-table";
37*5f62a964SEmmanuel Vadot			device_type = "cpu";
38*5f62a964SEmmanuel Vadot		};
39*5f62a964SEmmanuel Vadot
40*5f62a964SEmmanuel Vadot		cpu1: cpu@1 {
41*5f62a964SEmmanuel Vadot			compatible = "apple,typhoon";
42*5f62a964SEmmanuel Vadot			reg = <0x0 0x1>;
43*5f62a964SEmmanuel Vadot			cpu-release-addr = <0 0>; /* To be filled in by loader */
44*5f62a964SEmmanuel Vadot			enable-method = "spin-table";
45*5f62a964SEmmanuel Vadot			device_type = "cpu";
46*5f62a964SEmmanuel Vadot		};
47*5f62a964SEmmanuel Vadot	};
48*5f62a964SEmmanuel Vadot
49*5f62a964SEmmanuel Vadot	soc {
50*5f62a964SEmmanuel Vadot		compatible = "simple-bus";
51*5f62a964SEmmanuel Vadot		#address-cells = <2>;
52*5f62a964SEmmanuel Vadot		#size-cells = <2>;
53*5f62a964SEmmanuel Vadot		nonposted-mmio;
54*5f62a964SEmmanuel Vadot		ranges;
55*5f62a964SEmmanuel Vadot
56*5f62a964SEmmanuel Vadot		serial0: serial@20a0c0000 {
57*5f62a964SEmmanuel Vadot			compatible = "apple,s5l-uart";
58*5f62a964SEmmanuel Vadot			reg = <0x2 0x0a0c0000 0x0 0x4000>;
59*5f62a964SEmmanuel Vadot			reg-io-width = <4>;
60*5f62a964SEmmanuel Vadot			interrupt-parent = <&aic>;
61*5f62a964SEmmanuel Vadot			interrupts = <AIC_IRQ 158 IRQ_TYPE_LEVEL_HIGH>;
62*5f62a964SEmmanuel Vadot			/* Use the bootloader-enabled clocks for now. */
63*5f62a964SEmmanuel Vadot			clocks = <&clkref>, <&clkref>;
64*5f62a964SEmmanuel Vadot			clock-names = "uart", "clk_uart_baud0";
65*5f62a964SEmmanuel Vadot			status = "disabled";
66*5f62a964SEmmanuel Vadot		};
67*5f62a964SEmmanuel Vadot
68*5f62a964SEmmanuel Vadot		serial6: serial@20a0d8000 {
69*5f62a964SEmmanuel Vadot			compatible = "apple,s5l-uart";
70*5f62a964SEmmanuel Vadot			reg = <0x2 0x0a0d8000 0x0 0x4000>;
71*5f62a964SEmmanuel Vadot			reg-io-width = <4>;
72*5f62a964SEmmanuel Vadot			interrupt-parent = <&aic>;
73*5f62a964SEmmanuel Vadot			interrupts = <AIC_IRQ 164 IRQ_TYPE_LEVEL_HIGH>;
74*5f62a964SEmmanuel Vadot			/* Use the bootloader-enabled clocks for now. */
75*5f62a964SEmmanuel Vadot			clocks = <&clkref>, <&clkref>;
76*5f62a964SEmmanuel Vadot			clock-names = "uart", "clk_uart_baud0";
77*5f62a964SEmmanuel Vadot			status = "disabled";
78*5f62a964SEmmanuel Vadot		};
79*5f62a964SEmmanuel Vadot
80*5f62a964SEmmanuel Vadot		wdt: watchdog@20e027000 {
81*5f62a964SEmmanuel Vadot			compatible = "apple,t7000-wdt", "apple,wdt";
82*5f62a964SEmmanuel Vadot			reg = <0x2 0x0e027000 0x0 0x1000>;
83*5f62a964SEmmanuel Vadot			clocks = <&clkref>;
84*5f62a964SEmmanuel Vadot			interrupt-parent = <&aic>;
85*5f62a964SEmmanuel Vadot			interrupts = <AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH>;
86*5f62a964SEmmanuel Vadot		};
87*5f62a964SEmmanuel Vadot
88*5f62a964SEmmanuel Vadot		aic: interrupt-controller@20e100000 {
89*5f62a964SEmmanuel Vadot			compatible = "apple,t7000-aic", "apple,aic";
90*5f62a964SEmmanuel Vadot			reg = <0x2 0x0e100000 0x0 0x100000>;
91*5f62a964SEmmanuel Vadot			#interrupt-cells = <3>;
92*5f62a964SEmmanuel Vadot			interrupt-controller;
93*5f62a964SEmmanuel Vadot		};
94*5f62a964SEmmanuel Vadot
95*5f62a964SEmmanuel Vadot		pinctrl: pinctrl@20e300000 {
96*5f62a964SEmmanuel Vadot			compatible = "apple,t7000-pinctrl", "apple,pinctrl";
97*5f62a964SEmmanuel Vadot			reg = <0x2 0x0e300000 0x0 0x100000>;
98*5f62a964SEmmanuel Vadot
99*5f62a964SEmmanuel Vadot			gpio-controller;
100*5f62a964SEmmanuel Vadot			#gpio-cells = <2>;
101*5f62a964SEmmanuel Vadot			gpio-ranges = <&pinctrl 0 0 208>;
102*5f62a964SEmmanuel Vadot			apple,npins = <208>;
103*5f62a964SEmmanuel Vadot
104*5f62a964SEmmanuel Vadot			interrupt-controller;
105*5f62a964SEmmanuel Vadot			#interrupt-cells = <2>;
106*5f62a964SEmmanuel Vadot			interrupt-parent = <&aic>;
107*5f62a964SEmmanuel Vadot			interrupts = <AIC_IRQ 62 IRQ_TYPE_LEVEL_HIGH>,
108*5f62a964SEmmanuel Vadot				     <AIC_IRQ 63 IRQ_TYPE_LEVEL_HIGH>,
109*5f62a964SEmmanuel Vadot				     <AIC_IRQ 64 IRQ_TYPE_LEVEL_HIGH>,
110*5f62a964SEmmanuel Vadot				     <AIC_IRQ 65 IRQ_TYPE_LEVEL_HIGH>,
111*5f62a964SEmmanuel Vadot				     <AIC_IRQ 66 IRQ_TYPE_LEVEL_HIGH>,
112*5f62a964SEmmanuel Vadot				     <AIC_IRQ 67 IRQ_TYPE_LEVEL_HIGH>,
113*5f62a964SEmmanuel Vadot				     <AIC_IRQ 68 IRQ_TYPE_LEVEL_HIGH>;
114*5f62a964SEmmanuel Vadot		};
115*5f62a964SEmmanuel Vadot	};
116*5f62a964SEmmanuel Vadot
117*5f62a964SEmmanuel Vadot	timer {
118*5f62a964SEmmanuel Vadot		compatible = "arm,armv8-timer";
119*5f62a964SEmmanuel Vadot		interrupt-parent = <&aic>;
120*5f62a964SEmmanuel Vadot		interrupt-names = "phys", "virt";
121*5f62a964SEmmanuel Vadot		/* Note that A8 doesn't actually have a hypervisor (EL2 is not implemented). */
122*5f62a964SEmmanuel Vadot		interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
123*5f62a964SEmmanuel Vadot			     <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
124*5f62a964SEmmanuel Vadot	};
125*5f62a964SEmmanuel Vadot};
126