1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2016 Andreas Färber 4 * 5 * Copyright (c) 2016 BayLibre, SAS. 6 * Author: Neil Armstrong <narmstrong@baylibre.com> 7 * 8 * Copyright (c) 2016 Endless Computers, Inc. 9 * Author: Carlo Caione <carlo@endlessm.com> 10 */ 11 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/interrupt-controller/irq.h> 14#include <dt-bindings/interrupt-controller/arm-gic.h> 15#include <dt-bindings/power/meson-gxbb-power.h> 16#include <dt-bindings/thermal/thermal.h> 17 18/ { 19 interrupt-parent = <&gic>; 20 #address-cells = <2>; 21 #size-cells = <2>; 22 23 aliases { 24 mmc0 = &sd_emmc_b; /* SD card */ 25 mmc1 = &sd_emmc_c; /* eMMC */ 26 mmc2 = &sd_emmc_a; /* SDIO */ 27 }; 28 29 reserved-memory { 30 #address-cells = <2>; 31 #size-cells = <2>; 32 ranges; 33 34 /* 16 MiB reserved for Hardware ROM Firmware */ 35 hwrom_reserved: hwrom@0 { 36 reg = <0x0 0x0 0x0 0x1000000>; 37 no-map; 38 }; 39 40 /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ 41 secmon_reserved: secmon@10000000 { 42 reg = <0x0 0x10000000 0x0 0x200000>; 43 no-map; 44 }; 45 46 /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ 47 secmon_reserved_alt: secmon@5000000 { 48 reg = <0x0 0x05000000 0x0 0x300000>; 49 no-map; 50 }; 51 52 linux,cma { 53 compatible = "shared-dma-pool"; 54 reusable; 55 size = <0x0 0x10000000>; 56 alignment = <0x0 0x400000>; 57 linux,cma-default; 58 }; 59 }; 60 61 chosen { 62 #address-cells = <2>; 63 #size-cells = <2>; 64 ranges; 65 66 simplefb_cvbs: framebuffer-cvbs { 67 compatible = "amlogic,simple-framebuffer", 68 "simple-framebuffer"; 69 amlogic,pipeline = "vpu-cvbs"; 70 power-domains = <&pwrc PWRC_GXBB_VPU_ID>; 71 status = "disabled"; 72 }; 73 74 simplefb_hdmi: framebuffer-hdmi { 75 compatible = "amlogic,simple-framebuffer", 76 "simple-framebuffer"; 77 amlogic,pipeline = "vpu-hdmi"; 78 power-domains = <&pwrc PWRC_GXBB_VPU_ID>; 79 status = "disabled"; 80 }; 81 }; 82 83 cpus { 84 #address-cells = <0x2>; 85 #size-cells = <0x0>; 86 87 cpu0: cpu@0 { 88 device_type = "cpu"; 89 compatible = "arm,cortex-a53"; 90 reg = <0x0 0x0>; 91 enable-method = "psci"; 92 next-level-cache = <&l2>; 93 clocks = <&scpi_dvfs 0>; 94 #cooling-cells = <2>; 95 }; 96 97 cpu1: cpu@1 { 98 device_type = "cpu"; 99 compatible = "arm,cortex-a53"; 100 reg = <0x0 0x1>; 101 enable-method = "psci"; 102 next-level-cache = <&l2>; 103 clocks = <&scpi_dvfs 0>; 104 #cooling-cells = <2>; 105 }; 106 107 cpu2: cpu@2 { 108 device_type = "cpu"; 109 compatible = "arm,cortex-a53"; 110 reg = <0x0 0x2>; 111 enable-method = "psci"; 112 next-level-cache = <&l2>; 113 clocks = <&scpi_dvfs 0>; 114 #cooling-cells = <2>; 115 }; 116 117 cpu3: cpu@3 { 118 device_type = "cpu"; 119 compatible = "arm,cortex-a53"; 120 reg = <0x0 0x3>; 121 enable-method = "psci"; 122 next-level-cache = <&l2>; 123 clocks = <&scpi_dvfs 0>; 124 #cooling-cells = <2>; 125 }; 126 127 l2: l2-cache0 { 128 compatible = "cache"; 129 }; 130 }; 131 132 thermal-zones { 133 cpu-thermal { 134 polling-delay-passive = <250>; /* milliseconds */ 135 polling-delay = <1000>; /* milliseconds */ 136 137 thermal-sensors = <&scpi_sensors 0>; 138 139 trips { 140 cpu_passive: cpu-passive { 141 temperature = <80000>; /* millicelsius */ 142 hysteresis = <2000>; /* millicelsius */ 143 type = "passive"; 144 }; 145 146 cpu_hot: cpu-hot { 147 temperature = <90000>; /* millicelsius */ 148 hysteresis = <2000>; /* millicelsius */ 149 type = "hot"; 150 }; 151 152 cpu_critical: cpu-critical { 153 temperature = <110000>; /* millicelsius */ 154 hysteresis = <2000>; /* millicelsius */ 155 type = "critical"; 156 }; 157 }; 158 159 cpu_cooling_maps: cooling-maps { 160 map0 { 161 trip = <&cpu_passive>; 162 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 163 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 164 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 165 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 166 }; 167 168 map1 { 169 trip = <&cpu_hot>; 170 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 171 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 172 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 173 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 174 }; 175 }; 176 }; 177 }; 178 179 arm-pmu { 180 compatible = "arm,cortex-a53-pmu"; 181 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 182 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 183 <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, 184 <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 185 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 186 }; 187 188 psci { 189 compatible = "arm,psci-0.2"; 190 method = "smc"; 191 }; 192 193 timer { 194 compatible = "arm,armv8-timer"; 195 interrupts = <GIC_PPI 13 196 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 197 <GIC_PPI 14 198 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 199 <GIC_PPI 11 200 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 201 <GIC_PPI 10 202 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; 203 }; 204 205 xtal: xtal-clk { 206 compatible = "fixed-clock"; 207 clock-frequency = <24000000>; 208 clock-output-names = "xtal"; 209 #clock-cells = <0>; 210 }; 211 212 firmware { 213 sm: secure-monitor { 214 compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm"; 215 }; 216 }; 217 218 efuse: efuse { 219 compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse"; 220 #address-cells = <1>; 221 #size-cells = <1>; 222 read-only; 223 secure-monitor = <&sm>; 224 225 sn: sn@14 { 226 reg = <0x14 0x10>; 227 }; 228 229 eth_mac: eth_mac@34 { 230 reg = <0x34 0x10>; 231 }; 232 233 bid: bid@46 { 234 reg = <0x46 0x30>; 235 }; 236 }; 237 238 scpi { 239 compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0"; 240 mboxes = <&mailbox 1 &mailbox 2>; 241 shmem = <&cpu_scp_lpri &cpu_scp_hpri>; 242 243 scpi_clocks: clocks { 244 compatible = "arm,scpi-clocks"; 245 246 scpi_dvfs: scpi_clocks@0 { 247 compatible = "arm,scpi-dvfs-clocks"; 248 #clock-cells = <1>; 249 clock-indices = <0>; 250 clock-output-names = "vcpu"; 251 }; 252 }; 253 254 scpi_sensors: sensors { 255 compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors"; 256 #thermal-sensor-cells = <1>; 257 }; 258 }; 259 260 soc { 261 compatible = "simple-bus"; 262 #address-cells = <2>; 263 #size-cells = <2>; 264 ranges; 265 266 cbus: bus@c1100000 { 267 compatible = "simple-bus"; 268 reg = <0x0 0xc1100000 0x0 0x100000>; 269 #address-cells = <2>; 270 #size-cells = <2>; 271 ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>; 272 273 gpio_intc: interrupt-controller@9880 { 274 compatible = "amlogic,meson-gpio-intc"; 275 reg = <0x0 0x9880 0x0 0x10>; 276 interrupt-controller; 277 #interrupt-cells = <2>; 278 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; 279 status = "disabled"; 280 }; 281 282 reset: reset-controller@4404 { 283 compatible = "amlogic,meson-gxbb-reset"; 284 reg = <0x0 0x04404 0x0 0x9c>; 285 #reset-cells = <1>; 286 }; 287 288 aiu: audio-controller@5400 { 289 compatible = "amlogic,aiu"; 290 #sound-dai-cells = <2>; 291 sound-name-prefix = "AIU"; 292 reg = <0x0 0x5400 0x0 0x2ac>; 293 interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>, 294 <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>; 295 interrupt-names = "i2s", "spdif"; 296 status = "disabled"; 297 }; 298 299 uart_A: serial@84c0 { 300 compatible = "amlogic,meson-gx-uart"; 301 reg = <0x0 0x84c0 0x0 0x18>; 302 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; 303 status = "disabled"; 304 }; 305 306 uart_B: serial@84dc { 307 compatible = "amlogic,meson-gx-uart"; 308 reg = <0x0 0x84dc 0x0 0x18>; 309 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; 310 status = "disabled"; 311 }; 312 313 i2c_A: i2c@8500 { 314 compatible = "amlogic,meson-gxbb-i2c"; 315 reg = <0x0 0x08500 0x0 0x20>; 316 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; 317 #address-cells = <1>; 318 #size-cells = <0>; 319 status = "disabled"; 320 }; 321 322 pwm_ab: pwm@8550 { 323 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; 324 reg = <0x0 0x08550 0x0 0x10>; 325 #pwm-cells = <3>; 326 status = "disabled"; 327 }; 328 329 pwm_cd: pwm@8650 { 330 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; 331 reg = <0x0 0x08650 0x0 0x10>; 332 #pwm-cells = <3>; 333 status = "disabled"; 334 }; 335 336 saradc: adc@8680 { 337 compatible = "amlogic,meson-saradc"; 338 reg = <0x0 0x8680 0x0 0x34>; 339 #io-channel-cells = <1>; 340 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; 341 status = "disabled"; 342 }; 343 344 pwm_ef: pwm@86c0 { 345 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; 346 reg = <0x0 0x086c0 0x0 0x10>; 347 #pwm-cells = <3>; 348 status = "disabled"; 349 }; 350 351 uart_C: serial@8700 { 352 compatible = "amlogic,meson-gx-uart"; 353 reg = <0x0 0x8700 0x0 0x18>; 354 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>; 355 status = "disabled"; 356 }; 357 358 clock-measure@8758 { 359 compatible = "amlogic,meson-gx-clk-measure"; 360 reg = <0x0 0x8758 0x0 0x10>; 361 }; 362 363 i2c_B: i2c@87c0 { 364 compatible = "amlogic,meson-gxbb-i2c"; 365 reg = <0x0 0x087c0 0x0 0x20>; 366 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; 367 #address-cells = <1>; 368 #size-cells = <0>; 369 status = "disabled"; 370 }; 371 372 i2c_C: i2c@87e0 { 373 compatible = "amlogic,meson-gxbb-i2c"; 374 reg = <0x0 0x087e0 0x0 0x20>; 375 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; 376 #address-cells = <1>; 377 #size-cells = <0>; 378 status = "disabled"; 379 }; 380 381 spicc: spi@8d80 { 382 compatible = "amlogic,meson-gx-spicc"; 383 reg = <0x0 0x08d80 0x0 0x80>; 384 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 385 #address-cells = <1>; 386 #size-cells = <0>; 387 status = "disabled"; 388 }; 389 390 spifc: spi@8c80 { 391 compatible = "amlogic,meson-gxbb-spifc"; 392 reg = <0x0 0x08c80 0x0 0x80>; 393 #address-cells = <1>; 394 #size-cells = <0>; 395 status = "disabled"; 396 }; 397 398 watchdog@98d0 { 399 compatible = "amlogic,meson-gxbb-wdt"; 400 reg = <0x0 0x098d0 0x0 0x10>; 401 clocks = <&xtal>; 402 }; 403 }; 404 405 gic: interrupt-controller@c4301000 { 406 compatible = "arm,gic-400"; 407 reg = <0x0 0xc4301000 0 0x1000>, 408 <0x0 0xc4302000 0 0x2000>, 409 <0x0 0xc4304000 0 0x2000>, 410 <0x0 0xc4306000 0 0x2000>; 411 interrupt-controller; 412 interrupts = <GIC_PPI 9 413 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 414 #interrupt-cells = <3>; 415 #address-cells = <0>; 416 }; 417 418 sram: sram@c8000000 { 419 compatible = "mmio-sram"; 420 reg = <0x0 0xc8000000 0x0 0x14000>; 421 422 #address-cells = <1>; 423 #size-cells = <1>; 424 ranges = <0 0x0 0xc8000000 0x14000>; 425 426 cpu_scp_lpri: scp-sram@0 { 427 compatible = "amlogic,meson-gxbb-scp-shmem"; 428 reg = <0x13000 0x400>; 429 }; 430 431 cpu_scp_hpri: scp-sram@200 { 432 compatible = "amlogic,meson-gxbb-scp-shmem"; 433 reg = <0x13400 0x400>; 434 }; 435 }; 436 437 aobus: bus@c8100000 { 438 compatible = "simple-bus"; 439 reg = <0x0 0xc8100000 0x0 0x100000>; 440 #address-cells = <2>; 441 #size-cells = <2>; 442 ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; 443 444 sysctrl_AO: sys-ctrl@0 { 445 compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon"; 446 reg = <0x0 0x0 0x0 0x100>; 447 448 clkc_AO: clock-controller { 449 compatible = "amlogic,meson-gx-aoclkc"; 450 #clock-cells = <1>; 451 #reset-cells = <1>; 452 }; 453 }; 454 455 cec_AO: cec@100 { 456 compatible = "amlogic,meson-gx-ao-cec"; 457 reg = <0x0 0x00100 0x0 0x14>; 458 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>; 459 status = "disabled"; 460 }; 461 462 sec_AO: ao-secure@140 { 463 compatible = "amlogic,meson-gx-ao-secure", "syscon"; 464 reg = <0x0 0x140 0x0 0x140>; 465 amlogic,has-chip-id; 466 }; 467 468 uart_AO: serial@4c0 { 469 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 470 reg = <0x0 0x004c0 0x0 0x18>; 471 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; 472 status = "disabled"; 473 }; 474 475 uart_AO_B: serial@4e0 { 476 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 477 reg = <0x0 0x004e0 0x0 0x18>; 478 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; 479 status = "disabled"; 480 }; 481 482 i2c_AO: i2c@500 { 483 compatible = "amlogic,meson-gxbb-i2c"; 484 reg = <0x0 0x500 0x0 0x20>; 485 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; 486 #address-cells = <1>; 487 #size-cells = <0>; 488 status = "disabled"; 489 }; 490 491 pwm_AO_ab: pwm@550 { 492 compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm"; 493 reg = <0x0 0x00550 0x0 0x10>; 494 #pwm-cells = <3>; 495 status = "disabled"; 496 }; 497 498 ir: ir@580 { 499 compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir"; 500 reg = <0x0 0x00580 0x0 0x40>; 501 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; 502 status = "disabled"; 503 }; 504 }; 505 506 vdec: video-codec@c8820000 { 507 compatible = "amlogic,gx-vdec"; 508 reg = <0x0 0xc8820000 0x0 0x10000>, 509 <0x0 0xc110a580 0x0 0xe4>; 510 reg-names = "dos", "esparser"; 511 512 interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>, 513 <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>; 514 interrupt-names = "vdec", "esparser"; 515 516 amlogic,ao-sysctrl = <&sysctrl_AO>; 517 amlogic,canvas = <&canvas>; 518 }; 519 520 periphs: bus@c8834000 { 521 compatible = "simple-bus"; 522 reg = <0x0 0xc8834000 0x0 0x2000>; 523 #address-cells = <2>; 524 #size-cells = <2>; 525 ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>; 526 527 hwrng: rng { 528 compatible = "amlogic,meson-rng"; 529 reg = <0x0 0x0 0x0 0x4>; 530 }; 531 }; 532 533 dmcbus: bus@c8838000 { 534 compatible = "simple-bus"; 535 reg = <0x0 0xc8838000 0x0 0x400>; 536 #address-cells = <2>; 537 #size-cells = <2>; 538 ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>; 539 540 canvas: video-lut@48 { 541 compatible = "amlogic,canvas"; 542 reg = <0x0 0x48 0x0 0x14>; 543 }; 544 }; 545 546 hiubus: bus@c883c000 { 547 compatible = "simple-bus"; 548 reg = <0x0 0xc883c000 0x0 0x2000>; 549 #address-cells = <2>; 550 #size-cells = <2>; 551 ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>; 552 553 sysctrl: system-controller@0 { 554 compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"; 555 reg = <0 0 0 0x400>; 556 557 pwrc: power-controller { 558 compatible = "amlogic,meson-gxbb-pwrc"; 559 #power-domain-cells = <1>; 560 amlogic,ao-sysctrl = <&sysctrl_AO>; 561 }; 562 }; 563 564 mailbox: mailbox@404 { 565 compatible = "amlogic,meson-gxbb-mhu"; 566 reg = <0 0x404 0 0x4c>; 567 interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>, 568 <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>, 569 <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>; 570 #mbox-cells = <1>; 571 }; 572 }; 573 574 ethmac: ethernet@c9410000 { 575 compatible = "amlogic,meson-gxbb-dwmac", 576 "snps,dwmac-3.70a", 577 "snps,dwmac"; 578 reg = <0x0 0xc9410000 0x0 0x10000>, 579 <0x0 0xc8834540 0x0 0x4>; 580 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 581 interrupt-names = "macirq"; 582 rx-fifo-depth = <4096>; 583 tx-fifo-depth = <2048>; 584 power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>; 585 status = "disabled"; 586 }; 587 588 apb: apb@d0000000 { 589 compatible = "simple-bus"; 590 reg = <0x0 0xd0000000 0x0 0x200000>; 591 #address-cells = <2>; 592 #size-cells = <2>; 593 ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>; 594 595 sd_emmc_a: mmc@70000 { 596 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; 597 reg = <0x0 0x70000 0x0 0x800>; 598 interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>; 599 status = "disabled"; 600 }; 601 602 sd_emmc_b: mmc@72000 { 603 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; 604 reg = <0x0 0x72000 0x0 0x800>; 605 interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>; 606 status = "disabled"; 607 }; 608 609 sd_emmc_c: mmc@74000 { 610 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; 611 reg = <0x0 0x74000 0x0 0x800>; 612 interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>; 613 status = "disabled"; 614 }; 615 }; 616 617 vpu: vpu@d0100000 { 618 compatible = "amlogic,meson-gx-vpu"; 619 reg = <0x0 0xd0100000 0x0 0x100000>, 620 <0x0 0xc883c000 0x0 0x1000>; 621 reg-names = "vpu", "hhi"; 622 interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>; 623 #address-cells = <1>; 624 #size-cells = <0>; 625 amlogic,canvas = <&canvas>; 626 627 /* CVBS VDAC output port */ 628 cvbs_vdac_port: port@0 { 629 reg = <0>; 630 }; 631 632 /* HDMI-TX output port */ 633 hdmi_tx_port: port@1 { 634 reg = <1>; 635 636 hdmi_tx_out: endpoint { 637 remote-endpoint = <&hdmi_tx_in>; 638 }; 639 }; 640 }; 641 642 hdmi_tx: hdmi-tx@c883a000 { 643 compatible = "amlogic,meson-gx-dw-hdmi"; 644 reg = <0x0 0xc883a000 0x0 0x1c>; 645 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>; 646 #address-cells = <1>; 647 #size-cells = <0>; 648 #sound-dai-cells = <0>; 649 sound-name-prefix = "HDMITX"; 650 status = "disabled"; 651 652 /* VPU VENC Input */ 653 hdmi_tx_venc_port: port@0 { 654 reg = <0>; 655 656 hdmi_tx_in: endpoint { 657 remote-endpoint = <&hdmi_tx_out>; 658 }; 659 }; 660 661 /* TMDS Output */ 662 hdmi_tx_tmds_port: port@1 { 663 reg = <1>; 664 }; 665 }; 666 }; 667}; 668