1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019 Amlogic, Inc. All rights reserved. 4 */ 5 6#include <dt-bindings/clock/amlogic,a1-pll-clkc.h> 7#include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h> 8#include <dt-bindings/gpio/meson-a1-gpio.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/power/meson-a1-power.h> 12#include <dt-bindings/reset/amlogic,meson-a1-reset.h> 13 14/ { 15 compatible = "amlogic,a1"; 16 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 20 21 cpus { 22 #address-cells = <2>; 23 #size-cells = <0>; 24 25 cpu0: cpu@0 { 26 device_type = "cpu"; 27 compatible = "arm,cortex-a35"; 28 reg = <0x0 0x0>; 29 enable-method = "psci"; 30 next-level-cache = <&l2>; 31 }; 32 33 cpu1: cpu@1 { 34 device_type = "cpu"; 35 compatible = "arm,cortex-a35"; 36 reg = <0x0 0x1>; 37 enable-method = "psci"; 38 next-level-cache = <&l2>; 39 }; 40 41 l2: l2-cache0 { 42 compatible = "cache"; 43 cache-level = <2>; 44 cache-unified; 45 }; 46 }; 47 48 efuse: efuse { 49 compatible = "amlogic,meson-gxbb-efuse"; 50 clocks = <&clkc_periphs CLKID_OTP>; 51 #address-cells = <1>; 52 #size-cells = <1>; 53 secure-monitor = <&sm>; 54 power-domains = <&pwrc PWRC_OTP_ID>; 55 }; 56 57 psci { 58 compatible = "arm,psci-1.0"; 59 method = "smc"; 60 }; 61 62 reserved-memory { 63 #address-cells = <2>; 64 #size-cells = <2>; 65 ranges; 66 67 linux,cma { 68 compatible = "shared-dma-pool"; 69 reusable; 70 size = <0x0 0x800000>; 71 alignment = <0x0 0x400000>; 72 linux,cma-default; 73 }; 74 }; 75 76 sm: secure-monitor { 77 compatible = "amlogic,meson-gxbb-sm"; 78 79 pwrc: power-controller { 80 compatible = "amlogic,meson-a1-pwrc"; 81 #power-domain-cells = <1>; 82 }; 83 }; 84 85 soc { 86 compatible = "simple-bus"; 87 #address-cells = <2>; 88 #size-cells = <2>; 89 ranges; 90 91 spifc: spi@fd000400 { 92 compatible = "amlogic,a1-spifc"; 93 reg = <0x0 0xfd000400 0x0 0x290>; 94 clocks = <&clkc_periphs CLKID_SPIFC>; 95 #address-cells = <1>; 96 #size-cells = <0>; 97 power-domains = <&pwrc PWRC_SPIFC_ID>; 98 status = "disabled"; 99 }; 100 101 apb: bus@fe000000 { 102 compatible = "simple-bus"; 103 reg = <0x0 0xfe000000 0x0 0x1000000>; 104 #address-cells = <2>; 105 #size-cells = <2>; 106 ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>; 107 108 reset: reset-controller@0 { 109 compatible = "amlogic,meson-a1-reset"; 110 reg = <0x0 0x0 0x0 0x8c>; 111 #reset-cells = <1>; 112 }; 113 114 periphs_pinctrl: pinctrl@400 { 115 compatible = "amlogic,meson-a1-periphs-pinctrl"; 116 #address-cells = <2>; 117 #size-cells = <2>; 118 ranges; 119 120 gpio: bank@400 { 121 reg = <0x0 0x0400 0x0 0x003c>, 122 <0x0 0x0480 0x0 0x0118>; 123 reg-names = "mux", "gpio"; 124 gpio-controller; 125 #gpio-cells = <2>; 126 gpio-ranges = <&periphs_pinctrl 0 0 62>; 127 }; 128 129 i2c0_f11_pins: i2c0-f11 { 130 mux { 131 groups = "i2c0_sck_f11", 132 "i2c0_sda_f12"; 133 function = "i2c0"; 134 bias-pull-up; 135 drive-strength-microamp = <3000>; 136 }; 137 }; 138 139 i2c0_f9_pins: i2c0-f9 { 140 mux { 141 groups = "i2c0_sck_f9", 142 "i2c0_sda_f10"; 143 function = "i2c0"; 144 bias-pull-up; 145 drive-strength-microamp = <3000>; 146 }; 147 }; 148 149 i2c1_x_pins: i2c1-x { 150 mux { 151 groups = "i2c1_sck_x", 152 "i2c1_sda_x"; 153 function = "i2c1"; 154 bias-pull-up; 155 drive-strength-microamp = <3000>; 156 }; 157 }; 158 159 i2c1_a_pins: i2c1-a { 160 mux { 161 groups = "i2c1_sck_a", 162 "i2c1_sda_a"; 163 function = "i2c1"; 164 bias-pull-up; 165 drive-strength-microamp = <3000>; 166 }; 167 }; 168 169 i2c2_x0_pins: i2c2-x0 { 170 mux { 171 groups = "i2c2_sck_x0", 172 "i2c2_sda_x1"; 173 function = "i2c2"; 174 bias-pull-up; 175 drive-strength-microamp = <3000>; 176 }; 177 }; 178 179 i2c2_x15_pins: i2c2-x15 { 180 mux { 181 groups = "i2c2_sck_x15", 182 "i2c2_sda_x16"; 183 function = "i2c2"; 184 bias-pull-up; 185 drive-strength-microamp = <3000>; 186 }; 187 }; 188 189 i2c2_a4_pins: i2c2-a4 { 190 mux { 191 groups = "i2c2_sck_a4", 192 "i2c2_sda_a5"; 193 function = "i2c2"; 194 bias-pull-up; 195 drive-strength-microamp = <3000>; 196 }; 197 }; 198 199 i2c2_a8_pins: i2c2-a8 { 200 mux { 201 groups = "i2c2_sck_a8", 202 "i2c2_sda_a9"; 203 function = "i2c2"; 204 bias-pull-up; 205 drive-strength-microamp = <3000>; 206 }; 207 }; 208 209 i2c3_x_pins: i2c3-x { 210 mux { 211 groups = "i2c3_sck_x", 212 "i2c3_sda_x"; 213 function = "i2c3"; 214 bias-pull-up; 215 drive-strength-microamp = <3000>; 216 }; 217 }; 218 219 i2c3_f_pins: i2c3-f { 220 mux { 221 groups = "i2c3_sck_f", 222 "i2c3_sda_f"; 223 function = "i2c3"; 224 bias-pull-up; 225 drive-strength-microamp = <3000>; 226 }; 227 }; 228 229 uart_a_pins: uart-a { 230 mux { 231 groups = "uart_a_tx", 232 "uart_a_rx"; 233 function = "uart_a"; 234 }; 235 }; 236 237 uart_a_cts_rts_pins: uart-a-cts-rts { 238 mux { 239 groups = "uart_a_cts", 240 "uart_a_rts"; 241 function = "uart_a"; 242 bias-pull-down; 243 }; 244 }; 245 246 sdio_pins: sdio { 247 mux0 { 248 groups = "sdcard_d0_x", 249 "sdcard_d1_x", 250 "sdcard_d2_x", 251 "sdcard_d3_x", 252 "sdcard_cmd_x"; 253 function = "sdcard"; 254 bias-pull-up; 255 }; 256 257 mux1 { 258 groups = "sdcard_clk_x"; 259 function = "sdcard"; 260 bias-disable; 261 }; 262 }; 263 264 sdio_clk_gate_pins: sdio-clk-gate { 265 mux { 266 groups = "sdcard_clk_x"; 267 function = "sdcard"; 268 bias-pull-down; 269 }; 270 }; 271 272 spifc_pins: spifc { 273 mux { 274 groups = "spif_mo", 275 "spif_mi", 276 "spif_clk", 277 "spif_cs", 278 "spif_hold_n", 279 "spif_wp_n"; 280 function = "spif"; 281 }; 282 }; 283 }; 284 285 gpio_intc: interrupt-controller@440 { 286 compatible = "amlogic,meson-a1-gpio-intc", 287 "amlogic,meson-gpio-intc"; 288 reg = <0x0 0x0440 0x0 0x14>; 289 interrupt-controller; 290 #interrupt-cells = <2>; 291 amlogic,channel-interrupts = 292 <49 50 51 52 53 54 55 56>; 293 }; 294 295 clkc_periphs: clock-controller@800 { 296 compatible = "amlogic,a1-peripherals-clkc"; 297 reg = <0 0x800 0 0x104>; 298 #clock-cells = <1>; 299 clocks = <&clkc_pll CLKID_FCLK_DIV2>, 300 <&clkc_pll CLKID_FCLK_DIV3>, 301 <&clkc_pll CLKID_FCLK_DIV5>, 302 <&clkc_pll CLKID_FCLK_DIV7>, 303 <&clkc_pll CLKID_HIFI_PLL>, 304 <&xtal>; 305 clock-names = "fclk_div2", "fclk_div3", 306 "fclk_div5", "fclk_div7", 307 "hifi_pll", "xtal"; 308 }; 309 310 i2c0: i2c@1400 { 311 compatible = "amlogic,meson-axg-i2c"; 312 status = "disabled"; 313 reg = <0x0 0x1400 0x0 0x20>; 314 interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>; 315 #address-cells = <1>; 316 #size-cells = <0>; 317 clocks = <&clkc_periphs CLKID_I2C_M_A>; 318 power-domains = <&pwrc PWRC_I2C_ID>; 319 }; 320 321 uart_AO: serial@1c00 { 322 compatible = "amlogic,meson-a1-uart", 323 "amlogic,meson-ao-uart"; 324 reg = <0x0 0x1c00 0x0 0x18>; 325 interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>; 326 clocks = <&xtal>, <&xtal>, <&xtal>; 327 clock-names = "xtal", "pclk", "baud"; 328 status = "disabled"; 329 }; 330 331 uart_AO_B: serial@2000 { 332 compatible = "amlogic,meson-a1-uart", 333 "amlogic,meson-ao-uart"; 334 reg = <0x0 0x2000 0x0 0x18>; 335 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; 336 clocks = <&xtal>, <&xtal>, <&xtal>; 337 clock-names = "xtal", "pclk", "baud"; 338 status = "disabled"; 339 }; 340 341 saradc: adc@2c00 { 342 compatible = "amlogic,meson-g12a-saradc", 343 "amlogic,meson-saradc"; 344 reg = <0x0 0x2c00 0x0 0x48>; 345 #io-channel-cells = <1>; 346 power-domains = <&pwrc PWRC_I2C_ID>; 347 interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>; 348 clocks = <&xtal>, 349 <&clkc_periphs CLKID_SARADC_EN>, 350 <&clkc_periphs CLKID_SARADC>, 351 <&clkc_periphs CLKID_SARADC_SEL>; 352 clock-names = "clkin", "core", 353 "adc_clk", "adc_sel"; 354 status = "disabled"; 355 }; 356 357 i2c1: i2c@5c00 { 358 compatible = "amlogic,meson-axg-i2c"; 359 status = "disabled"; 360 reg = <0x0 0x5c00 0x0 0x20>; 361 interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>; 362 #address-cells = <1>; 363 #size-cells = <0>; 364 clocks = <&clkc_periphs CLKID_I2C_M_B>; 365 power-domains = <&pwrc PWRC_I2C_ID>; 366 }; 367 368 i2c2: i2c@6800 { 369 compatible = "amlogic,meson-axg-i2c"; 370 status = "disabled"; 371 reg = <0x0 0x6800 0x0 0x20>; 372 interrupts = <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>; 373 #address-cells = <1>; 374 #size-cells = <0>; 375 clocks = <&clkc_periphs CLKID_I2C_M_C>; 376 power-domains = <&pwrc PWRC_I2C_ID>; 377 }; 378 379 i2c3: i2c@6c00 { 380 compatible = "amlogic,meson-axg-i2c"; 381 status = "disabled"; 382 reg = <0x0 0x6c00 0x0 0x20>; 383 interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>; 384 #address-cells = <1>; 385 #size-cells = <0>; 386 clocks = <&clkc_periphs CLKID_I2C_M_D>; 387 power-domains = <&pwrc PWRC_I2C_ID>; 388 }; 389 390 usb2_phy1: phy@4000 { 391 compatible = "amlogic,a1-usb2-phy"; 392 clocks = <&clkc_periphs CLKID_USB_PHY_IN>; 393 clock-names = "xtal"; 394 reg = <0x0 0x4000 0x0 0x60>; 395 resets = <&reset RESET_USBPHY>; 396 reset-names = "phy"; 397 #phy-cells = <0>; 398 power-domains = <&pwrc PWRC_USB_ID>; 399 }; 400 401 hwrng: rng@5118 { 402 compatible = "amlogic,meson-rng"; 403 reg = <0x0 0x5118 0x0 0x4>; 404 power-domains = <&pwrc PWRC_OTP_ID>; 405 }; 406 407 sec_AO: ao-secure@5a20 { 408 compatible = "amlogic,meson-gx-ao-secure", "syscon"; 409 reg = <0x0 0x5a20 0x0 0x140>; 410 amlogic,has-chip-id; 411 }; 412 413 clkc_pll: pll-clock-controller@7c80 { 414 compatible = "amlogic,a1-pll-clkc"; 415 reg = <0 0x7c80 0 0x18c>; 416 #clock-cells = <1>; 417 clocks = <&clkc_periphs CLKID_FIXPLL_IN>, 418 <&clkc_periphs CLKID_HIFIPLL_IN>; 419 clock-names = "fixpll_in", "hifipll_in"; 420 }; 421 422 sd_emmc: sd@10000 { 423 compatible = "amlogic,meson-axg-mmc"; 424 reg = <0x0 0x10000 0x0 0x800>; 425 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 426 clocks = <&clkc_periphs CLKID_SD_EMMC_A>, 427 <&clkc_periphs CLKID_SD_EMMC>, 428 <&clkc_pll CLKID_FCLK_DIV2>; 429 clock-names = "core", 430 "clkin0", 431 "clkin1"; 432 assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_SEL2>; 433 assigned-clock-parents = <&xtal>; 434 resets = <&reset RESET_SD_EMMC_A>; 435 power-domains = <&pwrc PWRC_SD_EMMC_ID>; 436 status = "disabled"; 437 }; 438 }; 439 440 usb: usb@fe004400 { 441 status = "disabled"; 442 compatible = "amlogic,meson-a1-usb-ctrl"; 443 reg = <0x0 0xfe004400 0x0 0xa0>; 444 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; 445 #address-cells = <2>; 446 #size-cells = <2>; 447 ranges; 448 449 clocks = <&clkc_periphs CLKID_USB_CTRL>, 450 <&clkc_periphs CLKID_USB_BUS>, 451 <&clkc_periphs CLKID_USB_CTRL_IN>; 452 clock-names = "usb_ctrl", "usb_bus", "xtal_usb_ctrl"; 453 resets = <&reset RESET_USBCTRL>; 454 reset-name = "usb_ctrl"; 455 456 dr_mode = "otg"; 457 458 phys = <&usb2_phy1>; 459 phy-names = "usb2-phy1"; 460 461 dwc3: usb@ff400000 { 462 compatible = "snps,dwc3"; 463 reg = <0x0 0xff400000 0x0 0x100000>; 464 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 465 dr_mode = "host"; 466 snps,dis_u2_susphy_quirk; 467 snps,quirk-frame-length-adjustment = <0x20>; 468 snps,parkmode-disable-ss-quirk; 469 }; 470 471 dwc2: usb@ff500000 { 472 compatible = "amlogic,meson-a1-usb", "snps,dwc2"; 473 reg = <0x0 0xff500000 0x0 0x40000>; 474 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; 475 phys = <&usb2_phy1>; 476 phy-names = "usb2-phy"; 477 clocks = <&clkc_periphs CLKID_USB_PHY>; 478 clock-names = "otg"; 479 dr_mode = "peripheral"; 480 g-rx-fifo-size = <192>; 481 g-np-tx-fifo-size = <128>; 482 g-tx-fifo-size = <128 128 16 16 16>; 483 }; 484 }; 485 486 gic: interrupt-controller@ff901000 { 487 compatible = "arm,gic-400"; 488 reg = <0x0 0xff901000 0x0 0x1000>, 489 <0x0 0xff902000 0x0 0x2000>, 490 <0x0 0xff904000 0x0 0x2000>, 491 <0x0 0xff906000 0x0 0x2000>; 492 interrupt-controller; 493 interrupts = <GIC_PPI 9 494 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 495 #interrupt-cells = <3>; 496 #address-cells = <0>; 497 }; 498 }; 499 500 timer { 501 compatible = "arm,armv8-timer"; 502 interrupts = <GIC_PPI 13 503 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 504 <GIC_PPI 14 505 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 506 <GIC_PPI 11 507 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 508 <GIC_PPI 10 509 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; 510 }; 511 512 xtal: xtal-clk { 513 compatible = "fixed-clock"; 514 clock-frequency = <24000000>; 515 clock-output-names = "xtal"; 516 #clock-cells = <0>; 517 }; 518}; 519