1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright Altera Corporation (C) 2015. All rights reserved. 4 */ 5 6#include "socfpga_stratix10.dtsi" 7 8/ { 9 model = "SoCFPGA Stratix 10 SoCDK"; 10 compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10"; 11 12 aliases { 13 serial0 = &uart0; 14 ethernet0 = &gmac0; 15 ethernet1 = &gmac1; 16 ethernet2 = &gmac2; 17 }; 18 19 chosen { 20 stdout-path = "serial0:115200n8"; 21 }; 22 23 leds { 24 compatible = "gpio-leds"; 25 hps0 { 26 label = "hps_led0"; 27 gpios = <&portb 20 GPIO_ACTIVE_HIGH>; 28 }; 29 30 hps1 { 31 label = "hps_led1"; 32 gpios = <&portb 19 GPIO_ACTIVE_HIGH>; 33 }; 34 35 hps2 { 36 label = "hps_led2"; 37 gpios = <&portb 21 GPIO_ACTIVE_HIGH>; 38 }; 39 }; 40 41 memory { 42 device_type = "memory"; 43 /* We expect the bootloader to fill in the reg */ 44 reg = <0 0 0 0>; 45 }; 46 47 ref_033v: regulator-v-ref { 48 compatible = "regulator-fixed"; 49 regulator-name = "0.33V"; 50 regulator-min-microvolt = <330000>; 51 regulator-max-microvolt = <330000>; 52 }; 53 54 soc { 55 eccmgr { 56 sdmmca-ecc@ff8c8c00 { 57 compatible = "altr,socfpga-s10-sdmmc-ecc", 58 "altr,socfpga-sdmmc-ecc"; 59 reg = <0xff8c8c00 0x100>; 60 altr,ecc-parent = <&mmc>; 61 interrupts = <14 4>, 62 <15 4>; 63 }; 64 }; 65 }; 66}; 67 68&gpio1 { 69 status = "okay"; 70}; 71 72&gmac0 { 73 status = "okay"; 74 phy-mode = "rgmii"; 75 phy-handle = <&phy0>; 76 77 max-frame-size = <9000>; 78 79 mdio0 { 80 #address-cells = <1>; 81 #size-cells = <0>; 82 compatible = "snps,dwmac-mdio"; 83 phy0: ethernet-phy@0 { 84 reg = <4>; 85 86 txd0-skew-ps = <0>; /* -420ps */ 87 txd1-skew-ps = <0>; /* -420ps */ 88 txd2-skew-ps = <0>; /* -420ps */ 89 txd3-skew-ps = <0>; /* -420ps */ 90 rxd0-skew-ps = <420>; /* 0ps */ 91 rxd1-skew-ps = <420>; /* 0ps */ 92 rxd2-skew-ps = <420>; /* 0ps */ 93 rxd3-skew-ps = <420>; /* 0ps */ 94 txen-skew-ps = <0>; /* -420ps */ 95 txc-skew-ps = <900>; /* 0ps */ 96 rxdv-skew-ps = <420>; /* 0ps */ 97 rxc-skew-ps = <1680>; /* 780ps */ 98 }; 99 }; 100}; 101 102&mmc { 103 status = "okay"; 104 cap-sd-highspeed; 105 cap-mmc-highspeed; 106 broken-cd; 107 bus-width = <4>; 108}; 109 110&osc1 { 111 clock-frequency = <25000000>; 112}; 113 114&uart0 { 115 status = "okay"; 116}; 117 118&usb0 { 119 status = "okay"; 120 disable-over-current; 121}; 122 123&watchdog0 { 124 status = "okay"; 125}; 126 127&i2c1 { 128 status = "okay"; 129 clock-frequency = <100000>; 130 i2c-sda-falling-time-ns = <890>; /* hcnt */ 131 i2c-sdl-falling-time-ns = <890>; /* lcnt */ 132 133 adc@14 { 134 compatible = "lltc,ltc2497"; 135 reg = <0x14>; 136 vref-supply = <&ref_033v>; 137 }; 138 139 temp@4c { 140 compatible = "maxim,max1619"; 141 reg = <0x4c>; 142 }; 143 144 eeprom@51 { 145 compatible = "atmel,24c32"; 146 reg = <0x51>; 147 pagesize = <32>; 148 }; 149 150 rtc@68 { 151 compatible = "dallas,ds1339"; 152 reg = <0x68>; 153 }; 154}; 155 156&qspi { 157 status = "okay"; 158 flash@0 { 159 #address-cells = <1>; 160 #size-cells = <1>; 161 compatible = "micron,mt25qu02g", "jedec,spi-nor"; 162 reg = <0>; 163 spi-max-frequency = <100000000>; 164 165 m25p,fast-read; 166 cdns,page-size = <256>; 167 cdns,block-size = <16>; 168 cdns,read-delay = <1>; 169 cdns,tshsl-ns = <50>; 170 cdns,tsd2d-ns = <50>; 171 cdns,tchsh-ns = <4>; 172 cdns,tslch-ns = <4>; 173 174 partitions { 175 compatible = "fixed-partitions"; 176 #address-cells = <1>; 177 #size-cells = <1>; 178 179 qspi_boot: partition@0 { 180 label = "Boot and fpga data"; 181 reg = <0x0 0x03FE0000>; 182 }; 183 184 qspi_rootfs: partition@3FE0000 { 185 label = "Root Filesystem - JFFS2"; 186 reg = <0x03FE0000 0x0C020000>; 187 }; 188 }; 189 }; 190}; 191