1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2// Copyright (c) 2016 ARM Ltd. 3 4/dts-v1/; 5 6#include "sun50i-a64.dtsi" 7#include "sun50i-a64-cpu-opp.dtsi" 8 9#include <dt-bindings/gpio/gpio.h> 10 11/ { 12 model = "Pine64"; 13 compatible = "pine64,pine64", "allwinner,sun50i-a64"; 14 15 aliases { 16 ethernet0 = &emac; 17 serial0 = &uart0; 18 serial1 = &uart1; 19 serial2 = &uart2; 20 serial3 = &uart3; 21 serial4 = &uart4; 22 }; 23 24 chosen { 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 hdmi-connector { 29 compatible = "hdmi-connector"; 30 type = "a"; 31 32 port { 33 hdmi_con_in: endpoint { 34 remote-endpoint = <&hdmi_out_con>; 35 }; 36 }; 37 }; 38}; 39 40&codec { 41 status = "okay"; 42}; 43 44&codec_analog { 45 cpvdd-supply = <®_eldo1>; 46 status = "okay"; 47}; 48 49&cpu0 { 50 cpu-supply = <®_dcdc2>; 51}; 52 53&cpu1 { 54 cpu-supply = <®_dcdc2>; 55}; 56 57&cpu2 { 58 cpu-supply = <®_dcdc2>; 59}; 60 61&cpu3 { 62 cpu-supply = <®_dcdc2>; 63}; 64 65&dai { 66 status = "okay"; 67}; 68 69&de { 70 status = "okay"; 71}; 72 73&ehci0 { 74 status = "okay"; 75}; 76 77&ehci1 { 78 status = "okay"; 79}; 80 81&emac { 82 pinctrl-names = "default"; 83 pinctrl-0 = <&rmii_pins>; 84 phy-mode = "rmii"; 85 phy-handle = <&ext_rmii_phy1>; 86 phy-supply = <®_dc1sw>; 87 status = "okay"; 88 89}; 90 91&hdmi { 92 hvcc-supply = <®_dldo1>; 93 status = "okay"; 94}; 95 96&hdmi_out { 97 hdmi_out_con: endpoint { 98 remote-endpoint = <&hdmi_con_in>; 99 }; 100}; 101 102&i2c1 { 103 status = "okay"; 104}; 105 106&i2c1_pins { 107 bias-pull-up; 108}; 109 110&mdio { 111 ext_rmii_phy1: ethernet-phy@1 { 112 compatible = "ethernet-phy-ieee802.3-c22"; 113 reg = <1>; 114 }; 115}; 116 117&mmc0 { 118 pinctrl-names = "default"; 119 pinctrl-0 = <&mmc0_pins>; 120 vmmc-supply = <®_dcdc1>; 121 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; 122 disable-wp; 123 bus-width = <4>; 124 status = "okay"; 125}; 126 127&ohci0 { 128 status = "okay"; 129}; 130 131&ohci1 { 132 status = "okay"; 133}; 134 135&r_rsb { 136 status = "okay"; 137 138 axp803: pmic@3a3 { 139 compatible = "x-powers,axp803"; 140 reg = <0x3a3>; 141 interrupt-parent = <&r_intc>; 142 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 143 }; 144}; 145 146#include "axp803.dtsi" 147 148&ac_power_supply { 149 status = "okay"; 150}; 151 152&battery_power_supply { 153 status = "okay"; 154}; 155 156®_aldo2 { 157 regulator-always-on; 158 regulator-min-microvolt = <1800000>; 159 regulator-max-microvolt = <3300000>; 160 regulator-name = "vcc-pl"; 161}; 162 163®_aldo3 { 164 regulator-always-on; 165 regulator-min-microvolt = <3000000>; 166 regulator-max-microvolt = <3000000>; 167 regulator-name = "vcc-pll-avcc"; 168}; 169 170®_dc1sw { 171 regulator-name = "vcc-phy"; 172}; 173 174®_dcdc1 { 175 regulator-always-on; 176 regulator-min-microvolt = <3300000>; 177 regulator-max-microvolt = <3300000>; 178 regulator-name = "vcc-3v3"; 179}; 180 181®_dcdc2 { 182 regulator-always-on; 183 regulator-min-microvolt = <1040000>; 184 regulator-max-microvolt = <1300000>; 185 regulator-name = "vdd-cpux"; 186}; 187 188/* DCDC3 is polyphased with DCDC2 */ 189 190/* 191 * The DRAM chips used by Pine64 boards are DDR3L-compatible, so they can 192 * work at 1.35V with less power consumption. 193 * As AXP803 DCDC5 cannot reach 1.35V accurately, use 1.36V instead. 194 */ 195®_dcdc5 { 196 regulator-always-on; 197 regulator-min-microvolt = <1360000>; 198 regulator-max-microvolt = <1360000>; 199 regulator-name = "vcc-dram"; 200}; 201 202®_dcdc6 { 203 regulator-always-on; 204 regulator-min-microvolt = <1100000>; 205 regulator-max-microvolt = <1100000>; 206 regulator-name = "vdd-sys"; 207}; 208 209®_dldo1 { 210 regulator-min-microvolt = <3300000>; 211 regulator-max-microvolt = <3300000>; 212 regulator-name = "vcc-hdmi"; 213}; 214 215®_dldo2 { 216 regulator-min-microvolt = <3300000>; 217 regulator-max-microvolt = <3300000>; 218 regulator-name = "vcc-mipi"; 219}; 220 221®_dldo4 { 222 regulator-min-microvolt = <3300000>; 223 regulator-max-microvolt = <3300000>; 224 regulator-name = "vcc-wifi"; 225}; 226 227®_eldo1 { 228 regulator-min-microvolt = <1800000>; 229 regulator-max-microvolt = <1800000>; 230 regulator-name = "cpvdd"; 231}; 232 233®_fldo1 { 234 regulator-min-microvolt = <1200000>; 235 regulator-max-microvolt = <1200000>; 236 regulator-name = "vcc-1v2-hsic"; 237}; 238 239/* 240 * The A64 chip cannot work without this regulator off, although 241 * it seems to be only driving the AR100 core. 242 * Maybe we don't still know well about CPUs domain. 243 */ 244®_fldo2 { 245 regulator-always-on; 246 regulator-min-microvolt = <1100000>; 247 regulator-max-microvolt = <1100000>; 248 regulator-name = "vdd-cpus"; 249}; 250 251®_rtc_ldo { 252 regulator-name = "vcc-rtc"; 253}; 254 255&simplefb_hdmi { 256 vcc-hdmi-supply = <®_dldo1>; 257}; 258 259&sound { 260 simple-audio-card,aux-devs = <&codec_analog>; 261 simple-audio-card,widgets = "Microphone", "Microphone Jack", 262 "Headphone", "Headphone Jack"; 263 simple-audio-card,routing = 264 "Left DAC", "DACL", 265 "Right DAC", "DACR", 266 "Headphone Jack", "HP", 267 "ADCL", "Left ADC", 268 "ADCR", "Right ADC", 269 "MIC2", "Microphone Jack"; 270 status = "okay"; 271}; 272 273/* On Euler connector */ 274&spdif { 275 status = "disabled"; 276}; 277 278/* On Exp and Euler connectors */ 279&uart0 { 280 pinctrl-names = "default"; 281 pinctrl-0 = <&uart0_pb_pins>; 282 status = "okay"; 283}; 284 285/* On Wifi/BT connector, with RTS/CTS */ 286&uart1 { 287 pinctrl-names = "default"; 288 pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; 289 status = "disabled"; 290}; 291 292/* On Pi-2 connector */ 293&uart2 { 294 pinctrl-names = "default"; 295 pinctrl-0 = <&uart2_pins>; 296 status = "disabled"; 297}; 298 299/* On Euler connector */ 300&uart3 { 301 pinctrl-names = "default"; 302 pinctrl-0 = <&uart3_pins>; 303 status = "disabled"; 304}; 305 306/* On Euler connector, RTS/CTS optional */ 307&uart4 { 308 pinctrl-names = "default"; 309 pinctrl-0 = <&uart4_pins>; 310 status = "disabled"; 311}; 312 313&usb_otg { 314 dr_mode = "host"; 315 status = "okay"; 316}; 317 318&usbphy { 319 status = "okay"; 320}; 321