1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Common omap4 mcpdm configuration 4 * 5 * Only include this file if your board has pdmclk wired from the 6 * pmic to ABE as mcpdm uses an external clock for the module. 7 */ 8 9&omap4_pmx_core { 10 mcpdm_pins: mcpdm-pins { 11 pinctrl-single,pins = < 12 /* 0x4a100106 abe_pdm_ul_data.abe_pdm_ul_data ag25 */ 13 OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0) 14 15 /* 0x4a100108 abe_pdm_dl_data.abe_pdm_dl_data af25 */ 16 OMAP4_IOPAD(0x108, PIN_INPUT_PULLDOWN | MUX_MODE0) 17 18 /* 0x4a10010a abe_pdm_frame.abe_pdm_frame ae25 */ 19 OMAP4_IOPAD(0x10a, PIN_INPUT_PULLUP | MUX_MODE0) 20 21 /* 0x4a10010c abe_pdm_lb_clk.abe_pdm_lb_clk af26 */ 22 OMAP4_IOPAD(0x10c, PIN_INPUT_PULLDOWN | MUX_MODE0) 23 24 /* 0x4a10010e abe_clks.abe_clks ah26 */ 25 OMAP4_IOPAD(0x10e, PIN_INPUT_PULLDOWN | MUX_MODE0) 26 >; 27 }; 28}; 29 30&mcpdm_module { 31 /* 32 * McPDM pads must be muxed at the interconnect target module 33 * level as the module on the SoC needs external clock from 34 * the PMIC 35 */ 36 pinctrl-names = "default"; 37 pinctrl-0 = <&mcpdm_pins>; 38 status = "okay"; 39}; 40 41&mcpdm { 42 clocks = <&twl6040>; 43 clock-names = "pdmclk"; 44}; 45