xref: /freebsd/sys/contrib/device-tree/src/arm/st/stm32mp15xx-dhcom-drc02.dtsi (revision 8d13bc63c0e1d50bc9e47ac1f26329c999bfecf0)
1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2*f126890aSEmmanuel Vadot/*
3*f126890aSEmmanuel Vadot * Copyright (C) 2020 Marek Vasut <marex@denx.de>
4*f126890aSEmmanuel Vadot */
5*f126890aSEmmanuel Vadot
6*f126890aSEmmanuel Vadot#include <dt-bindings/input/input.h>
7*f126890aSEmmanuel Vadot#include <dt-bindings/pwm/pwm.h>
8*f126890aSEmmanuel Vadot
9*f126890aSEmmanuel Vadot/ {
10*f126890aSEmmanuel Vadot	aliases {
11*f126890aSEmmanuel Vadot		serial0 = &uart4;
12*f126890aSEmmanuel Vadot		serial1 = &usart3;
13*f126890aSEmmanuel Vadot		serial2 = &uart8;
14*f126890aSEmmanuel Vadot	};
15*f126890aSEmmanuel Vadot
16*f126890aSEmmanuel Vadot	chosen {
17*f126890aSEmmanuel Vadot		stdout-path = "serial0:115200n8";
18*f126890aSEmmanuel Vadot	};
19*f126890aSEmmanuel Vadot};
20*f126890aSEmmanuel Vadot
21*f126890aSEmmanuel Vadot&adc {
22*f126890aSEmmanuel Vadot	status = "disabled";
23*f126890aSEmmanuel Vadot};
24*f126890aSEmmanuel Vadot
25*f126890aSEmmanuel Vadot&dac {
26*f126890aSEmmanuel Vadot	status = "disabled";
27*f126890aSEmmanuel Vadot};
28*f126890aSEmmanuel Vadot
29*f126890aSEmmanuel Vadot&gpiob {
30*f126890aSEmmanuel Vadot	/*
31*f126890aSEmmanuel Vadot	 * NOTE: On DRC02, the RS485_RX_En is controlled by a separate
32*f126890aSEmmanuel Vadot	 * GPIO line, however the STM32 UART driver assumes RX happens
33*f126890aSEmmanuel Vadot	 * during TX anyway and that it only controls drive enable DE
34*f126890aSEmmanuel Vadot	 * line. Hence, the RX is always enabled here.
35*f126890aSEmmanuel Vadot	 */
36*f126890aSEmmanuel Vadot	rs485-rx-en-hog {
37*f126890aSEmmanuel Vadot		gpio-hog;
38*f126890aSEmmanuel Vadot		gpios = <8 0>;
39*f126890aSEmmanuel Vadot		output-low;
40*f126890aSEmmanuel Vadot		line-name = "rs485-rx-en";
41*f126890aSEmmanuel Vadot	};
42*f126890aSEmmanuel Vadot};
43*f126890aSEmmanuel Vadot
44*f126890aSEmmanuel Vadot&gpiod {
45*f126890aSEmmanuel Vadot	gpio-line-names = "", "", "", "",
46*f126890aSEmmanuel Vadot			  "", "", "DHCOM-B", "",
47*f126890aSEmmanuel Vadot			  "", "", "", "DRC02-Out1",
48*f126890aSEmmanuel Vadot			  "DRC02-Out2", "", "", "";
49*f126890aSEmmanuel Vadot};
50*f126890aSEmmanuel Vadot
51*f126890aSEmmanuel Vadot&gpioi {
52*f126890aSEmmanuel Vadot	gpio-line-names = "DRC02-In1", "DHCOM-O", "DHCOM-H", "DHCOM-I",
53*f126890aSEmmanuel Vadot			  "DHCOM-R", "DHCOM-M", "", "",
54*f126890aSEmmanuel Vadot			  "DRC02-In2", "", "", "",
55*f126890aSEmmanuel Vadot			  "", "", "", "";
56*f126890aSEmmanuel Vadot
57*f126890aSEmmanuel Vadot	/*
58*f126890aSEmmanuel Vadot	 * NOTE: The USB Hub on the DRC02 needs a reset signal to be
59*f126890aSEmmanuel Vadot	 * pulled high in order to be detected by the USB Controller.
60*f126890aSEmmanuel Vadot	 * This signal should be handled by USB power sequencing in
61*f126890aSEmmanuel Vadot	 * order to reset the Hub when USB bus is powered down, but
62*f126890aSEmmanuel Vadot	 * so far there is no such functionality.
63*f126890aSEmmanuel Vadot	 */
64*f126890aSEmmanuel Vadot	usb-hub-hog {
65*f126890aSEmmanuel Vadot		gpio-hog;
66*f126890aSEmmanuel Vadot		gpios = <2 0>;
67*f126890aSEmmanuel Vadot		output-high;
68*f126890aSEmmanuel Vadot		line-name = "usb-hub-reset";
69*f126890aSEmmanuel Vadot	};
70*f126890aSEmmanuel Vadot};
71*f126890aSEmmanuel Vadot
72*f126890aSEmmanuel Vadot&i2c2 {
73*f126890aSEmmanuel Vadot	pinctrl-names = "default";
74*f126890aSEmmanuel Vadot	pinctrl-0 = <&i2c2_pins_a>;
75*f126890aSEmmanuel Vadot	i2c-scl-rising-time-ns = <185>;
76*f126890aSEmmanuel Vadot	i2c-scl-falling-time-ns = <20>;
77*f126890aSEmmanuel Vadot	status = "okay";
78*f126890aSEmmanuel Vadot	/* spare dmas for other usage */
79*f126890aSEmmanuel Vadot	/delete-property/dmas;
80*f126890aSEmmanuel Vadot	/delete-property/dma-names;
81*f126890aSEmmanuel Vadot	status = "okay";
82*f126890aSEmmanuel Vadot
83*f126890aSEmmanuel Vadot	eeprom@50 {
84*f126890aSEmmanuel Vadot		compatible = "atmel,24c04";
85*f126890aSEmmanuel Vadot		reg = <0x50>;
86*f126890aSEmmanuel Vadot		pagesize = <16>;
87*f126890aSEmmanuel Vadot	};
88*f126890aSEmmanuel Vadot};
89*f126890aSEmmanuel Vadot
90*f126890aSEmmanuel Vadot&i2c4 {
91*f126890aSEmmanuel Vadot	touchscreen@49 {
92*f126890aSEmmanuel Vadot		status = "disabled";
93*f126890aSEmmanuel Vadot	};
94*f126890aSEmmanuel Vadot};
95*f126890aSEmmanuel Vadot
96*f126890aSEmmanuel Vadot&i2c5 {	/* TP7/TP8 */
97*f126890aSEmmanuel Vadot	pinctrl-names = "default";
98*f126890aSEmmanuel Vadot	pinctrl-0 = <&i2c5_pins_a>;
99*f126890aSEmmanuel Vadot	i2c-scl-rising-time-ns = <185>;
100*f126890aSEmmanuel Vadot	i2c-scl-falling-time-ns = <20>;
101*f126890aSEmmanuel Vadot	status = "okay";
102*f126890aSEmmanuel Vadot	/* spare dmas for other usage */
103*f126890aSEmmanuel Vadot	/delete-property/dmas;
104*f126890aSEmmanuel Vadot	/delete-property/dma-names;
105*f126890aSEmmanuel Vadot};
106*f126890aSEmmanuel Vadot
107*f126890aSEmmanuel Vadot&sdmmc3 {
108*f126890aSEmmanuel Vadot	/*
109*f126890aSEmmanuel Vadot	 * On DRC02, the SoM does not have SDIO WiFi. The pins
110*f126890aSEmmanuel Vadot	 * are used for on-board microSD slot instead.
111*f126890aSEmmanuel Vadot	 */
112*f126890aSEmmanuel Vadot	/delete-property/broken-cd;
113*f126890aSEmmanuel Vadot	cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
114*f126890aSEmmanuel Vadot	disable-wp;
115*f126890aSEmmanuel Vadot};
116*f126890aSEmmanuel Vadot
117*f126890aSEmmanuel Vadot&spi1 {
118*f126890aSEmmanuel Vadot	pinctrl-names = "default";
119*f126890aSEmmanuel Vadot	pinctrl-0 = <&spi1_pins_a>;
120*f126890aSEmmanuel Vadot	cs-gpios = <&gpioz 3 0>;
121*f126890aSEmmanuel Vadot	/* Use PIO for the display */
122*f126890aSEmmanuel Vadot	/delete-property/dmas;
123*f126890aSEmmanuel Vadot	/delete-property/dma-names;
124*f126890aSEmmanuel Vadot	status = "disabled";	/* Enable once there is display driver */
125*f126890aSEmmanuel Vadot	/*
126*f126890aSEmmanuel Vadot	 * Note: PF3/GPIO_A , PD6/GPIO_B , PG0/GPIO_C , PC6/GPIO_E are
127*f126890aSEmmanuel Vadot	 * also connected to the display board connector.
128*f126890aSEmmanuel Vadot	 */
129*f126890aSEmmanuel Vadot};
130*f126890aSEmmanuel Vadot
131*f126890aSEmmanuel Vadot&usart3 {
132*f126890aSEmmanuel Vadot	pinctrl-names = "default";
133*f126890aSEmmanuel Vadot	pinctrl-0 = <&usart3_pins_a>;
134*f126890aSEmmanuel Vadot	/delete-property/dmas;
135*f126890aSEmmanuel Vadot	/delete-property/dma-names;
136*f126890aSEmmanuel Vadot	status = "okay";
137*f126890aSEmmanuel Vadot};
138*f126890aSEmmanuel Vadot
139*f126890aSEmmanuel Vadot/*
140*f126890aSEmmanuel Vadot * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
141*f126890aSEmmanuel Vadot *       however the STM32MP1 pinmux cannot map them to UART4 .
142*f126890aSEmmanuel Vadot */
143*f126890aSEmmanuel Vadot
144*f126890aSEmmanuel Vadot&uart8 {	/* RS485 */
145*f126890aSEmmanuel Vadot	linux,rs485-enabled-at-boot-time;
146*f126890aSEmmanuel Vadot	pinctrl-names = "default";
147*f126890aSEmmanuel Vadot	pinctrl-0 = <&uart8_pins_a>;
148*f126890aSEmmanuel Vadot	rts-gpios = <&gpioe 6 GPIO_ACTIVE_HIGH>;
149*f126890aSEmmanuel Vadot	/delete-property/dmas;
150*f126890aSEmmanuel Vadot	/delete-property/dma-names;
151*f126890aSEmmanuel Vadot	status = "okay";
152*f126890aSEmmanuel Vadot};
153*f126890aSEmmanuel Vadot
154*f126890aSEmmanuel Vadot&usbh_ehci {
155*f126890aSEmmanuel Vadot	status = "okay";
156*f126890aSEmmanuel Vadot};
157*f126890aSEmmanuel Vadot
158*f126890aSEmmanuel Vadot&usbphyc {
159*f126890aSEmmanuel Vadot	status = "okay";
160*f126890aSEmmanuel Vadot};
161*f126890aSEmmanuel Vadot
162*f126890aSEmmanuel Vadot&usbphyc_port0 {
163*f126890aSEmmanuel Vadot	phy-supply = <&vdd_usb>;
164*f126890aSEmmanuel Vadot};
165*f126890aSEmmanuel Vadot
166*f126890aSEmmanuel Vadot&usbphyc_port1 {
167*f126890aSEmmanuel Vadot	phy-supply = <&vdd_usb>;
168*f126890aSEmmanuel Vadot};
169