1// SPDX-License-Identifier: GPL-2.0 2/* 3 * FriendlyARM's Exynos4412 based TINY4412 board device tree source 4 * 5 * Copyright (c) 2013 Alex Ling <kasimling@gmail.com> 6 * 7 * Device tree source file for FriendlyARM's TINY4412 board which is based on 8 * Samsung's Exynos4412 SoC. 9 */ 10 11/dts-v1/; 12#include "exynos4412.dtsi" 13#include <dt-bindings/gpio/gpio.h> 14#include <dt-bindings/leds/common.h> 15 16/ { 17 model = "FriendlyARM TINY4412 board based on Exynos4412"; 18 compatible = "friendlyarm,tiny4412", "samsung,exynos4412", "samsung,exynos4"; 19 20 aliases { 21 mmc0 = &sdhci_2; 22 }; 23 24 chosen { 25 stdout-path = &serial_0; 26 }; 27 28 memory@40000000 { 29 device_type = "memory"; 30 reg = <0x40000000 0x40000000>; 31 }; 32 33 leds { 34 compatible = "gpio-leds"; 35 36 led1 { 37 label = "led1"; 38 function = LED_FUNCTION_HEARTBEAT; 39 gpios = <&gpm4 0 GPIO_ACTIVE_LOW>; 40 default-state = "off"; 41 linux,default-trigger = "heartbeat"; 42 }; 43 44 led2 { 45 label = "led2"; 46 gpios = <&gpm4 1 GPIO_ACTIVE_LOW>; 47 default-state = "off"; 48 }; 49 50 led3 { 51 label = "led3"; 52 gpios = <&gpm4 2 GPIO_ACTIVE_LOW>; 53 default-state = "off"; 54 }; 55 56 led4 { 57 label = "led4"; 58 function = LED_FUNCTION_DISK_ACTIVITY; 59 gpios = <&gpm4 3 GPIO_ACTIVE_LOW>; 60 default-state = "off"; 61 linux,default-trigger = "mmc0"; 62 }; 63 }; 64 65 fixed-rate-clocks { 66 xxti { 67 compatible = "samsung,clock-xxti"; 68 clock-frequency = <0>; 69 }; 70 71 xusbxti { 72 compatible = "samsung,clock-xusbxti"; 73 clock-frequency = <24000000>; 74 }; 75 76 pmic_ap_clk: pmic-ap-clk { 77 /* Workaround for missing clock on PMIC */ 78 compatible = "fixed-clock"; 79 #clock-cells = <0>; 80 clock-frequency = <32768>; 81 }; 82 }; 83 84 panel { 85 compatible = "innolux,at070tn92"; 86 power-supply = <&vddq_lcd>; 87 88 port { 89 panel_input: endpoint { 90 remote-endpoint = <&lcdc_output>; 91 }; 92 }; 93 }; 94 95 vddq_lcd: regulator-vddq-lcd { 96 compatible = "regulator-fixed"; 97 regulator-name = "vddq-lcd"; 98 regulator-min-microvolt = <1800000>; 99 regulator-max-microvolt = <1800000>; 100 }; 101}; 102 103&cpu_thermal { 104 cooling-maps { 105 cooling_map0: map0 { 106 /* Corresponds to 800MHz at freq_table */ 107 cooling-device = <&cpu0 7 7>, <&cpu1 7 7>, 108 <&cpu2 7 7>, <&cpu3 7 7>; 109 }; 110 cooling_map1: map1 { 111 /* Corresponds to 200MHz at freq_table */ 112 cooling-device = <&cpu0 13 13>, <&cpu1 13 13>, 113 <&cpu2 13 13>, <&cpu3 13 13>; 114 }; 115 }; 116}; 117 118&fimd { 119 pinctrl-0 = <&lcd_clk>, <&lcd_data24>; 120 pinctrl-names = "default"; 121 #address-cells = <1>; 122 #size-cells = <0>; 123 status = "okay"; 124 125 port@3 { 126 reg = <3>; 127 lcdc_output: endpoint { 128 remote-endpoint = <&panel_input>; 129 }; 130 }; 131}; 132 133&rtc { 134 status = "okay"; 135 clocks = <&clock CLK_RTC>, <&pmic_ap_clk>; 136 clock-names = "rtc", "rtc_src"; 137}; 138 139&sdhci_2 { 140 bus-width = <4>; 141 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; 142 pinctrl-names = "default"; 143 status = "okay"; 144}; 145 146&serial_0 { 147 status = "okay"; 148}; 149 150&serial_1 { 151 status = "okay"; 152}; 153 154&serial_2 { 155 status = "okay"; 156}; 157 158&serial_3 { 159 status = "okay"; 160}; 161