xref: /freebsd/sys/contrib/device-tree/src/arm/rockchip/rk3288-veyron-jerry.dts (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*f126890aSEmmanuel Vadot/*
3*f126890aSEmmanuel Vadot * Google Veyron Jerry Rev 3+ board device tree source
4*f126890aSEmmanuel Vadot *
5*f126890aSEmmanuel Vadot * Copyright 2015 Google, Inc
6*f126890aSEmmanuel Vadot */
7*f126890aSEmmanuel Vadot
8*f126890aSEmmanuel Vadot/dts-v1/;
9*f126890aSEmmanuel Vadot#include "rk3288-veyron-chromebook.dtsi"
10*f126890aSEmmanuel Vadot#include "../cros-ec-sbs.dtsi"
11*f126890aSEmmanuel Vadot
12*f126890aSEmmanuel Vadot/ {
13*f126890aSEmmanuel Vadot	model = "Google Jerry";
14*f126890aSEmmanuel Vadot	compatible = "google,veyron-jerry-rev15", "google,veyron-jerry-rev14",
15*f126890aSEmmanuel Vadot		     "google,veyron-jerry-rev13", "google,veyron-jerry-rev12",
16*f126890aSEmmanuel Vadot		     "google,veyron-jerry-rev11", "google,veyron-jerry-rev10",
17*f126890aSEmmanuel Vadot		     "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
18*f126890aSEmmanuel Vadot		     "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
19*f126890aSEmmanuel Vadot		     "google,veyron-jerry-rev3", "google,veyron-jerry",
20*f126890aSEmmanuel Vadot		     "google,veyron", "rockchip,rk3288";
21*f126890aSEmmanuel Vadot};
22*f126890aSEmmanuel Vadot
23*f126890aSEmmanuel Vadot&rk808 {
24*f126890aSEmmanuel Vadot	pinctrl-names = "default";
25*f126890aSEmmanuel Vadot	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
26*f126890aSEmmanuel Vadot	dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
27*f126890aSEmmanuel Vadot		    <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
28*f126890aSEmmanuel Vadot
29*f126890aSEmmanuel Vadot	regulators {
30*f126890aSEmmanuel Vadot		mic_vcc: LDO_REG2 {
31*f126890aSEmmanuel Vadot			regulator-name = "mic_vcc";
32*f126890aSEmmanuel Vadot			regulator-always-on;
33*f126890aSEmmanuel Vadot			regulator-boot-on;
34*f126890aSEmmanuel Vadot			regulator-min-microvolt = <1800000>;
35*f126890aSEmmanuel Vadot			regulator-max-microvolt = <1800000>;
36*f126890aSEmmanuel Vadot			regulator-state-mem {
37*f126890aSEmmanuel Vadot				regulator-off-in-suspend;
38*f126890aSEmmanuel Vadot			};
39*f126890aSEmmanuel Vadot		};
40*f126890aSEmmanuel Vadot	};
41*f126890aSEmmanuel Vadot};
42*f126890aSEmmanuel Vadot
43*f126890aSEmmanuel Vadot&sdio0 {
44*f126890aSEmmanuel Vadot	#address-cells = <1>;
45*f126890aSEmmanuel Vadot	#size-cells = <0>;
46*f126890aSEmmanuel Vadot
47*f126890aSEmmanuel Vadot	mwifiex: wifi@1 {
48*f126890aSEmmanuel Vadot		compatible = "marvell,sd8897";
49*f126890aSEmmanuel Vadot		reg = <1>;
50*f126890aSEmmanuel Vadot
51*f126890aSEmmanuel Vadot		marvell,caldata-txpwrlimit-2g = /bits/ 8 <
52*f126890aSEmmanuel Vadot0x01 0x00 0x06 0x00 0x08 0x02 0x89 0x01
53*f126890aSEmmanuel Vadot0x24 0x00 0x67 0x09 0x14 0x01 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
54*f126890aSEmmanuel Vadot0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
55*f126890aSEmmanuel Vadot0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x02 0x00 0x0f
56*f126890aSEmmanuel Vadot0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
57*f126890aSEmmanuel Vadot0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
58*f126890aSEmmanuel Vadot0x24 0x00 0x67 0x09 0x14 0x03 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
59*f126890aSEmmanuel Vadot0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
60*f126890aSEmmanuel Vadot0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x04 0x00 0x0f
61*f126890aSEmmanuel Vadot0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
62*f126890aSEmmanuel Vadot0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
63*f126890aSEmmanuel Vadot0x24 0x00 0x67 0x09 0x14 0x05 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
64*f126890aSEmmanuel Vadot0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
65*f126890aSEmmanuel Vadot0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x06 0x00 0x0f
66*f126890aSEmmanuel Vadot0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
67*f126890aSEmmanuel Vadot0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
68*f126890aSEmmanuel Vadot0x24 0x00 0x67 0x09 0x14 0x07 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
69*f126890aSEmmanuel Vadot0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
70*f126890aSEmmanuel Vadot0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x08 0x00 0x0f
71*f126890aSEmmanuel Vadot0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
72*f126890aSEmmanuel Vadot0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
73*f126890aSEmmanuel Vadot0x24 0x00 0x67 0x09 0x14 0x09 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
74*f126890aSEmmanuel Vadot0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
75*f126890aSEmmanuel Vadot0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x0a 0x00 0x0f
76*f126890aSEmmanuel Vadot0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
77*f126890aSEmmanuel Vadot0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
78*f126890aSEmmanuel Vadot0x24 0x00 0x67 0x09 0x14 0x0b 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
79*f126890aSEmmanuel Vadot0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
80*f126890aSEmmanuel Vadot0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x0c 0x00 0x0f
81*f126890aSEmmanuel Vadot0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
82*f126890aSEmmanuel Vadot0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
83*f126890aSEmmanuel Vadot0x24 0x00 0x67 0x09 0x14 0x0d 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
84*f126890aSEmmanuel Vadot0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
85*f126890aSEmmanuel Vadot0x0d 0x09 0x0e 0x09 0x0f 0x09>;
86*f126890aSEmmanuel Vadot
87*f126890aSEmmanuel Vadot		marvell,caldata-txpwrlimit-5g-sub0 = /bits/ 8 <
88*f126890aSEmmanuel Vadot0x01 0x00 0x06 0x00 0xf0 0x01 0x89 0x01
89*f126890aSEmmanuel Vadot0x3a 0x00 0x88 0x13 0x14 0x24 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a
90*f126890aSEmmanuel Vadot0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09
91*f126890aSEmmanuel Vadot0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05
92*f126890aSEmmanuel Vadot0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
93*f126890aSEmmanuel Vadot0x88 0x13 0x14 0x28 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a
94*f126890aSEmmanuel Vadot0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09
95*f126890aSEmmanuel Vadot0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05
96*f126890aSEmmanuel Vadot0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13
97*f126890aSEmmanuel Vadot0x14 0x2c 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09
98*f126890aSEmmanuel Vadot0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09
99*f126890aSEmmanuel Vadot0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05
100*f126890aSEmmanuel Vadot0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x30
101*f126890aSEmmanuel Vadot0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09
102*f126890aSEmmanuel Vadot0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05
103*f126890aSEmmanuel Vadot0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05
104*f126890aSEmmanuel Vadot0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x34 0x01 0x0c
105*f126890aSEmmanuel Vadot0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09
106*f126890aSEmmanuel Vadot0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05
107*f126890aSEmmanuel Vadot0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05
108*f126890aSEmmanuel Vadot0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x38 0x01 0x0c 0x02 0x0c
109*f126890aSEmmanuel Vadot0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a
110*f126890aSEmmanuel Vadot0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05
111*f126890aSEmmanuel Vadot0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05
112*f126890aSEmmanuel Vadot0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x3c 0x01 0x0c 0x02 0x0c 0x03 0x0c
113*f126890aSEmmanuel Vadot0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a
114*f126890aSEmmanuel Vadot0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05
115*f126890aSEmmanuel Vadot0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05
116*f126890aSEmmanuel Vadot0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x40 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a
117*f126890aSEmmanuel Vadot0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a
118*f126890aSEmmanuel Vadot0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05
119*f126890aSEmmanuel Vadot0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05>;
120*f126890aSEmmanuel Vadot
121*f126890aSEmmanuel Vadot		marvell,caldata-txpwrlimit-5g-sub1 = /bits/ 8 <
122*f126890aSEmmanuel Vadot0x01 0x00 0x06 0x00 0xaa 0x02 0x89 0x01
123*f126890aSEmmanuel Vadot0x3a 0x00 0x88 0x13 0x14 0x64 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a
124*f126890aSEmmanuel Vadot0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09
125*f126890aSEmmanuel Vadot0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05
126*f126890aSEmmanuel Vadot0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
127*f126890aSEmmanuel Vadot0x88 0x13 0x14 0x68 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a
128*f126890aSEmmanuel Vadot0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09
129*f126890aSEmmanuel Vadot0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05
130*f126890aSEmmanuel Vadot0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13
131*f126890aSEmmanuel Vadot0x14 0x6c 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09
132*f126890aSEmmanuel Vadot0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09
133*f126890aSEmmanuel Vadot0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05
134*f126890aSEmmanuel Vadot0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x70
135*f126890aSEmmanuel Vadot0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09
136*f126890aSEmmanuel Vadot0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05
137*f126890aSEmmanuel Vadot0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05
138*f126890aSEmmanuel Vadot0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x74 0x01 0x0c
139*f126890aSEmmanuel Vadot0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09
140*f126890aSEmmanuel Vadot0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05
141*f126890aSEmmanuel Vadot0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05
142*f126890aSEmmanuel Vadot0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x78 0x01 0x0c 0x02 0x0c
143*f126890aSEmmanuel Vadot0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a
144*f126890aSEmmanuel Vadot0x0b 0x0a 0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05
145*f126890aSEmmanuel Vadot0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05
146*f126890aSEmmanuel Vadot0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x7c 0x01 0x0c 0x02 0x0c 0x03 0x0c
147*f126890aSEmmanuel Vadot0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a
148*f126890aSEmmanuel Vadot0x0c 0x0a 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05
149*f126890aSEmmanuel Vadot0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05
150*f126890aSEmmanuel Vadot0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x80 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a
151*f126890aSEmmanuel Vadot0x05 0x0a 0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a
152*f126890aSEmmanuel Vadot0x0d 0x09 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05
153*f126890aSEmmanuel Vadot0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01
154*f126890aSEmmanuel Vadot0x3a 0x00 0x88 0x13 0x14 0x84 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a
155*f126890aSEmmanuel Vadot0x06 0x0a 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x09
156*f126890aSEmmanuel Vadot0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05
157*f126890aSEmmanuel Vadot0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
158*f126890aSEmmanuel Vadot0x88 0x13 0x14 0x88 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a
159*f126890aSEmmanuel Vadot0x07 0x08 0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08
160*f126890aSEmmanuel Vadot0x0f 0x08 0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04
161*f126890aSEmmanuel Vadot0x17 0x04 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13
162*f126890aSEmmanuel Vadot0x14 0x8c 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x08
163*f126890aSEmmanuel Vadot0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08 0x0f 0x08
164*f126890aSEmmanuel Vadot0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04 0x17 0x04
165*f126890aSEmmanuel Vadot0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05>;
166*f126890aSEmmanuel Vadot
167*f126890aSEmmanuel Vadot		marvell,caldata-txpwrlimit-5g-sub2 = /bits/ 8 <
168*f126890aSEmmanuel Vadot0x01 0x00 0x06 0x00 0x36 0x01 0x89 0x01
169*f126890aSEmmanuel Vadot0x3a 0x00 0x88 0x13 0x14 0x95 0x01 0x0b 0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a
170*f126890aSEmmanuel Vadot0x06 0x0a 0x07 0x08 0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08
171*f126890aSEmmanuel Vadot0x0e 0x08 0x0f 0x08 0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05
172*f126890aSEmmanuel Vadot0x16 0x04 0x17 0x04 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
173*f126890aSEmmanuel Vadot0x88 0x13 0x14 0x99 0x01 0x0b 0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a 0x06 0x0a
174*f126890aSEmmanuel Vadot0x07 0x08 0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08
175*f126890aSEmmanuel Vadot0x0f 0x08 0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04
176*f126890aSEmmanuel Vadot0x17 0x04 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13
177*f126890aSEmmanuel Vadot0x14 0x9d 0x01 0x0b 0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x08
178*f126890aSEmmanuel Vadot0x08 0x08 0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08 0x0f 0x08
179*f126890aSEmmanuel Vadot0x10 0x04 0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04 0x17 0x04
180*f126890aSEmmanuel Vadot0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0xa1
181*f126890aSEmmanuel Vadot0x01 0x0b 0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x08 0x08 0x08
182*f126890aSEmmanuel Vadot0x09 0x08 0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08 0x0f 0x08 0x10 0x04
183*f126890aSEmmanuel Vadot0x11 0x04 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04 0x17 0x04 0x18 0x05
184*f126890aSEmmanuel Vadot0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0xa5 0x01 0x0b
185*f126890aSEmmanuel Vadot0x02 0x0b 0x03 0x0b 0x04 0x0a 0x05 0x0a 0x06 0x0a 0x07 0x08 0x08 0x08 0x09 0x08
186*f126890aSEmmanuel Vadot0x0a 0x0a 0x0b 0x0a 0x0c 0x0a 0x0d 0x08 0x0e 0x08 0x0f 0x08 0x10 0x04 0x11 0x04
187*f126890aSEmmanuel Vadot0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x04 0x17 0x04 0x18 0x05 0x19 0x05
188*f126890aSEmmanuel Vadot0x1a 0x05 0x1b 0x05>;
189*f126890aSEmmanuel Vadot	};
190*f126890aSEmmanuel Vadot};
191*f126890aSEmmanuel Vadot
192*f126890aSEmmanuel Vadot&sdmmc {
193*f126890aSEmmanuel Vadot	disable-wp;
194*f126890aSEmmanuel Vadot	pinctrl-names = "default";
195*f126890aSEmmanuel Vadot	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
196*f126890aSEmmanuel Vadot			&sdmmc_bus4>;
197*f126890aSEmmanuel Vadot};
198*f126890aSEmmanuel Vadot
199*f126890aSEmmanuel Vadot&vcc_5v {
200*f126890aSEmmanuel Vadot	enable-active-high;
201*f126890aSEmmanuel Vadot	gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
202*f126890aSEmmanuel Vadot	pinctrl-names = "default";
203*f126890aSEmmanuel Vadot	pinctrl-0 = <&drv_5v>;
204*f126890aSEmmanuel Vadot};
205*f126890aSEmmanuel Vadot
206*f126890aSEmmanuel Vadot&vcc50_hdmi {
207*f126890aSEmmanuel Vadot	enable-active-high;
208*f126890aSEmmanuel Vadot	gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
209*f126890aSEmmanuel Vadot	pinctrl-names = "default";
210*f126890aSEmmanuel Vadot	pinctrl-0 = <&vcc50_hdmi_en>;
211*f126890aSEmmanuel Vadot};
212*f126890aSEmmanuel Vadot
213*f126890aSEmmanuel Vadot&gpio0 {
214*f126890aSEmmanuel Vadot	gpio-line-names = "PMIC_SLEEP_AP",
215*f126890aSEmmanuel Vadot			  "DDRIO_PWROFF",
216*f126890aSEmmanuel Vadot			  "DDRIO_RETEN",
217*f126890aSEmmanuel Vadot			  "TS3A227E_INT_L",
218*f126890aSEmmanuel Vadot			  "PMIC_INT_L",
219*f126890aSEmmanuel Vadot			  "PWR_KEY_L",
220*f126890aSEmmanuel Vadot			  "AP_LID_INT_L",
221*f126890aSEmmanuel Vadot			  "EC_IN_RW",
222*f126890aSEmmanuel Vadot
223*f126890aSEmmanuel Vadot			  "AC_PRESENT_AP",
224*f126890aSEmmanuel Vadot			  /*
225*f126890aSEmmanuel Vadot			   * RECOVERY_SW_L is Chrome OS ABI.  Schematics call
226*f126890aSEmmanuel Vadot			   * it REC_MODE_L.
227*f126890aSEmmanuel Vadot			   */
228*f126890aSEmmanuel Vadot			  "RECOVERY_SW_L",
229*f126890aSEmmanuel Vadot			  "OTP_OUT",
230*f126890aSEmmanuel Vadot			  "HOST1_PWR_EN",
231*f126890aSEmmanuel Vadot			  "USBOTG_PWREN_H",
232*f126890aSEmmanuel Vadot			  "AP_WARM_RESET_H",
233*f126890aSEmmanuel Vadot			  "nFAULT2",
234*f126890aSEmmanuel Vadot			  "I2C0_SDA_PMIC",
235*f126890aSEmmanuel Vadot
236*f126890aSEmmanuel Vadot			  "I2C0_SCL_PMIC",
237*f126890aSEmmanuel Vadot			  "SUSPEND_L",
238*f126890aSEmmanuel Vadot			  "USB_INT";
239*f126890aSEmmanuel Vadot};
240*f126890aSEmmanuel Vadot
241*f126890aSEmmanuel Vadot&gpio2 {
242*f126890aSEmmanuel Vadot	gpio-line-names = "CONFIG0",
243*f126890aSEmmanuel Vadot			  "CONFIG1",
244*f126890aSEmmanuel Vadot			  "CONFIG2",
245*f126890aSEmmanuel Vadot			  "",
246*f126890aSEmmanuel Vadot			  "",
247*f126890aSEmmanuel Vadot			  "",
248*f126890aSEmmanuel Vadot			  "",
249*f126890aSEmmanuel Vadot			  "CONFIG3",
250*f126890aSEmmanuel Vadot
251*f126890aSEmmanuel Vadot			  "",
252*f126890aSEmmanuel Vadot			  "EMMC_RST_L",
253*f126890aSEmmanuel Vadot			  "",
254*f126890aSEmmanuel Vadot			  "",
255*f126890aSEmmanuel Vadot			  "BL_PWR_EN",
256*f126890aSEmmanuel Vadot			  "AVDD_1V8_DISP_EN";
257*f126890aSEmmanuel Vadot};
258*f126890aSEmmanuel Vadot
259*f126890aSEmmanuel Vadot&gpio3 {
260*f126890aSEmmanuel Vadot	gpio-line-names = "FLASH0_D0",
261*f126890aSEmmanuel Vadot			  "FLASH0_D1",
262*f126890aSEmmanuel Vadot			  "FLASH0_D2",
263*f126890aSEmmanuel Vadot			  "FLASH0_D3",
264*f126890aSEmmanuel Vadot			  "FLASH0_D4",
265*f126890aSEmmanuel Vadot			  "FLASH0_D5",
266*f126890aSEmmanuel Vadot			  "FLASH0_D6",
267*f126890aSEmmanuel Vadot			  "FLASH0_D7",
268*f126890aSEmmanuel Vadot
269*f126890aSEmmanuel Vadot			  "",
270*f126890aSEmmanuel Vadot			  "",
271*f126890aSEmmanuel Vadot			  "",
272*f126890aSEmmanuel Vadot			  "",
273*f126890aSEmmanuel Vadot			  "",
274*f126890aSEmmanuel Vadot			  "",
275*f126890aSEmmanuel Vadot			  "",
276*f126890aSEmmanuel Vadot			  "",
277*f126890aSEmmanuel Vadot
278*f126890aSEmmanuel Vadot			  "FLASH0_CS2/EMMC_CMD",
279*f126890aSEmmanuel Vadot			  "",
280*f126890aSEmmanuel Vadot			  "FLASH0_DQS/EMMC_CLKO";
281*f126890aSEmmanuel Vadot};
282*f126890aSEmmanuel Vadot
283*f126890aSEmmanuel Vadot&gpio4 {
284*f126890aSEmmanuel Vadot	gpio-line-names = "",
285*f126890aSEmmanuel Vadot			  "",
286*f126890aSEmmanuel Vadot			  "",
287*f126890aSEmmanuel Vadot			  "",
288*f126890aSEmmanuel Vadot			  "",
289*f126890aSEmmanuel Vadot			  "",
290*f126890aSEmmanuel Vadot			  "",
291*f126890aSEmmanuel Vadot			  "",
292*f126890aSEmmanuel Vadot
293*f126890aSEmmanuel Vadot			  "",
294*f126890aSEmmanuel Vadot			  "",
295*f126890aSEmmanuel Vadot			  "",
296*f126890aSEmmanuel Vadot			  "",
297*f126890aSEmmanuel Vadot			  "",
298*f126890aSEmmanuel Vadot			  "",
299*f126890aSEmmanuel Vadot			  "",
300*f126890aSEmmanuel Vadot			  "",
301*f126890aSEmmanuel Vadot
302*f126890aSEmmanuel Vadot			  "UART0_RXD",
303*f126890aSEmmanuel Vadot			  "UART0_TXD",
304*f126890aSEmmanuel Vadot			  "UART0_CTS",
305*f126890aSEmmanuel Vadot			  "UART0_RTS",
306*f126890aSEmmanuel Vadot			  "SDIO0_D0",
307*f126890aSEmmanuel Vadot			  "SDIO0_D1",
308*f126890aSEmmanuel Vadot			  "SDIO0_D2",
309*f126890aSEmmanuel Vadot			  "SDIO0_D3",
310*f126890aSEmmanuel Vadot
311*f126890aSEmmanuel Vadot			  "SDIO0_CMD",
312*f126890aSEmmanuel Vadot			  "SDIO0_CLK",
313*f126890aSEmmanuel Vadot			  "BT_DEV_WAKE",
314*f126890aSEmmanuel Vadot			  "",
315*f126890aSEmmanuel Vadot			  "WIFI_ENABLE_H",
316*f126890aSEmmanuel Vadot			  "BT_ENABLE_L",
317*f126890aSEmmanuel Vadot			  "WIFI_HOST_WAKE",
318*f126890aSEmmanuel Vadot			  "BT_HOST_WAKE";
319*f126890aSEmmanuel Vadot};
320*f126890aSEmmanuel Vadot
321*f126890aSEmmanuel Vadot&gpio5 {
322*f126890aSEmmanuel Vadot	gpio-line-names = "",
323*f126890aSEmmanuel Vadot			  "",
324*f126890aSEmmanuel Vadot			  "",
325*f126890aSEmmanuel Vadot			  "",
326*f126890aSEmmanuel Vadot			  "",
327*f126890aSEmmanuel Vadot			  "",
328*f126890aSEmmanuel Vadot			  "",
329*f126890aSEmmanuel Vadot			  "",
330*f126890aSEmmanuel Vadot
331*f126890aSEmmanuel Vadot			  "",
332*f126890aSEmmanuel Vadot			  "",
333*f126890aSEmmanuel Vadot			  "",
334*f126890aSEmmanuel Vadot			  "",
335*f126890aSEmmanuel Vadot			  "SPI0_CLK",
336*f126890aSEmmanuel Vadot			  "SPI0_CS0",
337*f126890aSEmmanuel Vadot			  "SPI0_TXD",
338*f126890aSEmmanuel Vadot			  "SPI0_RXD",
339*f126890aSEmmanuel Vadot
340*f126890aSEmmanuel Vadot			  "",
341*f126890aSEmmanuel Vadot			  "",
342*f126890aSEmmanuel Vadot			  "",
343*f126890aSEmmanuel Vadot			  "VCC50_HDMI_EN";
344*f126890aSEmmanuel Vadot};
345*f126890aSEmmanuel Vadot
346*f126890aSEmmanuel Vadot&gpio6 {
347*f126890aSEmmanuel Vadot	gpio-line-names = "I2S0_SCLK",
348*f126890aSEmmanuel Vadot			  "I2S0_LRCK_RX",
349*f126890aSEmmanuel Vadot			  "I2S0_LRCK_TX",
350*f126890aSEmmanuel Vadot			  "I2S0_SDI",
351*f126890aSEmmanuel Vadot			  "I2S0_SDO0",
352*f126890aSEmmanuel Vadot			  "HP_DET_H",
353*f126890aSEmmanuel Vadot			  "",
354*f126890aSEmmanuel Vadot			  "INT_CODEC",
355*f126890aSEmmanuel Vadot
356*f126890aSEmmanuel Vadot			  "I2S0_CLK",
357*f126890aSEmmanuel Vadot			  "I2C2_SDA",
358*f126890aSEmmanuel Vadot			  "I2C2_SCL",
359*f126890aSEmmanuel Vadot			  "MICDET",
360*f126890aSEmmanuel Vadot			  "",
361*f126890aSEmmanuel Vadot			  "",
362*f126890aSEmmanuel Vadot			  "",
363*f126890aSEmmanuel Vadot			  "",
364*f126890aSEmmanuel Vadot
365*f126890aSEmmanuel Vadot			  "SDMMC_D0",
366*f126890aSEmmanuel Vadot			  "SDMMC_D1",
367*f126890aSEmmanuel Vadot			  "SDMMC_D2",
368*f126890aSEmmanuel Vadot			  "SDMMC_D3",
369*f126890aSEmmanuel Vadot			  "SDMMC_CLK",
370*f126890aSEmmanuel Vadot			  "SDMMC_CMD";
371*f126890aSEmmanuel Vadot};
372*f126890aSEmmanuel Vadot
373*f126890aSEmmanuel Vadot&gpio7 {
374*f126890aSEmmanuel Vadot	gpio-line-names = "LCDC_BL",
375*f126890aSEmmanuel Vadot			  "PWM_LOG",
376*f126890aSEmmanuel Vadot			  "BL_EN",
377*f126890aSEmmanuel Vadot			  "TRACKPAD_INT",
378*f126890aSEmmanuel Vadot			  "TPM_INT_H",
379*f126890aSEmmanuel Vadot			  "SDMMC_DET_L",
380*f126890aSEmmanuel Vadot			  /*
381*f126890aSEmmanuel Vadot			   * AP_FLASH_WP_L is Chrome OS ABI.  Schematics call
382*f126890aSEmmanuel Vadot			   * it FW_WP_AP.
383*f126890aSEmmanuel Vadot			   */
384*f126890aSEmmanuel Vadot			  "AP_FLASH_WP_L",
385*f126890aSEmmanuel Vadot			  "EC_INT",
386*f126890aSEmmanuel Vadot
387*f126890aSEmmanuel Vadot			  "CPU_NMI",
388*f126890aSEmmanuel Vadot			  "DVSOK",
389*f126890aSEmmanuel Vadot			  "",
390*f126890aSEmmanuel Vadot			  "EDP_HPD",
391*f126890aSEmmanuel Vadot			  "DVS1",
392*f126890aSEmmanuel Vadot			  "nFAULT1",
393*f126890aSEmmanuel Vadot			  "LCD_EN",
394*f126890aSEmmanuel Vadot			  "DVS2",
395*f126890aSEmmanuel Vadot
396*f126890aSEmmanuel Vadot			  "VCC5V_GOOD_H",
397*f126890aSEmmanuel Vadot			  "I2C4_SDA_TP",
398*f126890aSEmmanuel Vadot			  "I2C4_SCL_TP",
399*f126890aSEmmanuel Vadot			  "I2C5_SDA_HDMI",
400*f126890aSEmmanuel Vadot			  "I2C5_SCL_HDMI",
401*f126890aSEmmanuel Vadot			  "5V_DRV",
402*f126890aSEmmanuel Vadot			  "UART2_RXD",
403*f126890aSEmmanuel Vadot			  "UART2_TXD";
404*f126890aSEmmanuel Vadot};
405*f126890aSEmmanuel Vadot
406*f126890aSEmmanuel Vadot&gpio8 {
407*f126890aSEmmanuel Vadot	gpio-line-names = "RAM_ID0",
408*f126890aSEmmanuel Vadot			  "RAM_ID1",
409*f126890aSEmmanuel Vadot			  "RAM_ID2",
410*f126890aSEmmanuel Vadot			  "RAM_ID3",
411*f126890aSEmmanuel Vadot			  "I2C1_SDA_TPM",
412*f126890aSEmmanuel Vadot			  "I2C1_SCL_TPM",
413*f126890aSEmmanuel Vadot			  "SPI2_CLK",
414*f126890aSEmmanuel Vadot			  "SPI2_CS0",
415*f126890aSEmmanuel Vadot
416*f126890aSEmmanuel Vadot			  "SPI2_RXD",
417*f126890aSEmmanuel Vadot			  "SPI2_TXD";
418*f126890aSEmmanuel Vadot};
419*f126890aSEmmanuel Vadot
420*f126890aSEmmanuel Vadot&pinctrl {
421*f126890aSEmmanuel Vadot	pinctrl-names = "default", "sleep";
422*f126890aSEmmanuel Vadot	pinctrl-0 = <
423*f126890aSEmmanuel Vadot		/* Common for sleep and wake, but no owners */
424*f126890aSEmmanuel Vadot		&ddr0_retention
425*f126890aSEmmanuel Vadot		&ddrio_pwroff
426*f126890aSEmmanuel Vadot		&global_pwroff
427*f126890aSEmmanuel Vadot
428*f126890aSEmmanuel Vadot		/* Wake only */
429*f126890aSEmmanuel Vadot		&suspend_l_wake
430*f126890aSEmmanuel Vadot		&bt_dev_wake_awake
431*f126890aSEmmanuel Vadot	>;
432*f126890aSEmmanuel Vadot	pinctrl-1 = <
433*f126890aSEmmanuel Vadot		/* Common for sleep and wake, but no owners */
434*f126890aSEmmanuel Vadot		&ddr0_retention
435*f126890aSEmmanuel Vadot		&ddrio_pwroff
436*f126890aSEmmanuel Vadot		&global_pwroff
437*f126890aSEmmanuel Vadot
438*f126890aSEmmanuel Vadot		/* Sleep only */
439*f126890aSEmmanuel Vadot		&suspend_l_sleep
440*f126890aSEmmanuel Vadot		&bt_dev_wake_sleep
441*f126890aSEmmanuel Vadot	>;
442*f126890aSEmmanuel Vadot
443*f126890aSEmmanuel Vadot	buck-5v {
444*f126890aSEmmanuel Vadot		drv_5v: drv-5v {
445*f126890aSEmmanuel Vadot			rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
446*f126890aSEmmanuel Vadot		};
447*f126890aSEmmanuel Vadot	};
448*f126890aSEmmanuel Vadot
449*f126890aSEmmanuel Vadot	hdmi {
450*f126890aSEmmanuel Vadot		vcc50_hdmi_en: vcc50-hdmi-en {
451*f126890aSEmmanuel Vadot			rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
452*f126890aSEmmanuel Vadot		};
453*f126890aSEmmanuel Vadot	};
454*f126890aSEmmanuel Vadot
455*f126890aSEmmanuel Vadot	pmic {
456*f126890aSEmmanuel Vadot		dvs_1: dvs-1 {
457*f126890aSEmmanuel Vadot			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
458*f126890aSEmmanuel Vadot		};
459*f126890aSEmmanuel Vadot
460*f126890aSEmmanuel Vadot		dvs_2: dvs-2 {
461*f126890aSEmmanuel Vadot			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
462*f126890aSEmmanuel Vadot		};
463*f126890aSEmmanuel Vadot	};
464*f126890aSEmmanuel Vadot};
465*f126890aSEmmanuel Vadot
466*f126890aSEmmanuel Vadot&i2c4 {
467*f126890aSEmmanuel Vadot	status = "okay";
468*f126890aSEmmanuel Vadot
469*f126890aSEmmanuel Vadot	/*
470*f126890aSEmmanuel Vadot	 * Trackpad pin control is shared between Elan and Synaptics devices
471*f126890aSEmmanuel Vadot	 * so we have to pull it up to the bus level.
472*f126890aSEmmanuel Vadot	 */
473*f126890aSEmmanuel Vadot	pinctrl-names = "default";
474*f126890aSEmmanuel Vadot	pinctrl-0 = <&i2c4_xfer &trackpad_int>;
475*f126890aSEmmanuel Vadot
476*f126890aSEmmanuel Vadot	trackpad@15 {
477*f126890aSEmmanuel Vadot		/*
478*f126890aSEmmanuel Vadot		 * Remove the inherited pinctrl settings to avoid clashing
479*f126890aSEmmanuel Vadot		 * with bus-wide ones.
480*f126890aSEmmanuel Vadot		 */
481*f126890aSEmmanuel Vadot		/delete-property/pinctrl-names;
482*f126890aSEmmanuel Vadot		/delete-property/pinctrl-0;
483*f126890aSEmmanuel Vadot	};
484*f126890aSEmmanuel Vadot
485*f126890aSEmmanuel Vadot	trackpad@2c {
486*f126890aSEmmanuel Vadot		compatible = "hid-over-i2c";
487*f126890aSEmmanuel Vadot		interrupt-parent = <&gpio7>;
488*f126890aSEmmanuel Vadot		interrupts = <RK_PA3 IRQ_TYPE_EDGE_FALLING>;
489*f126890aSEmmanuel Vadot		reg = <0x2c>;
490*f126890aSEmmanuel Vadot		hid-descr-addr = <0x0020>;
491*f126890aSEmmanuel Vadot		vcc-supply = <&vcc33_io>;
492*f126890aSEmmanuel Vadot		wakeup-source;
493*f126890aSEmmanuel Vadot	};
494*f126890aSEmmanuel Vadot};
495