1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*f126890aSEmmanuel Vadot 3*f126890aSEmmanuel Vadot/dts-v1/; 4*f126890aSEmmanuel Vadot 5*f126890aSEmmanuel Vadot#include "rk322x.dtsi" 6*f126890aSEmmanuel Vadot 7*f126890aSEmmanuel Vadot/ { 8*f126890aSEmmanuel Vadot model = "Rockchip RK3228 Evaluation board"; 9*f126890aSEmmanuel Vadot compatible = "rockchip,rk3228-evb", "rockchip,rk3228"; 10*f126890aSEmmanuel Vadot 11*f126890aSEmmanuel Vadot aliases { 12*f126890aSEmmanuel Vadot mmc0 = &emmc; 13*f126890aSEmmanuel Vadot }; 14*f126890aSEmmanuel Vadot 15*f126890aSEmmanuel Vadot memory@60000000 { 16*f126890aSEmmanuel Vadot device_type = "memory"; 17*f126890aSEmmanuel Vadot reg = <0x60000000 0x40000000>; 18*f126890aSEmmanuel Vadot }; 19*f126890aSEmmanuel Vadot 20*f126890aSEmmanuel Vadot vcc_phy: vcc-phy-regulator { 21*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 22*f126890aSEmmanuel Vadot enable-active-high; 23*f126890aSEmmanuel Vadot regulator-name = "vcc_phy"; 24*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 25*f126890aSEmmanuel Vadot regulator-max-microvolt = <1800000>; 26*f126890aSEmmanuel Vadot regulator-always-on; 27*f126890aSEmmanuel Vadot regulator-boot-on; 28*f126890aSEmmanuel Vadot }; 29*f126890aSEmmanuel Vadot}; 30*f126890aSEmmanuel Vadot 31*f126890aSEmmanuel Vadot&emmc { 32*f126890aSEmmanuel Vadot cap-mmc-highspeed; 33*f126890aSEmmanuel Vadot mmc-ddr-1_8v; 34*f126890aSEmmanuel Vadot disable-wp; 35*f126890aSEmmanuel Vadot non-removable; 36*f126890aSEmmanuel Vadot status = "okay"; 37*f126890aSEmmanuel Vadot}; 38*f126890aSEmmanuel Vadot 39*f126890aSEmmanuel Vadot&gmac { 40*f126890aSEmmanuel Vadot assigned-clocks = <&cru SCLK_MAC_SRC>; 41*f126890aSEmmanuel Vadot assigned-clock-rates = <50000000>; 42*f126890aSEmmanuel Vadot clock_in_out = "output"; 43*f126890aSEmmanuel Vadot phy-supply = <&vcc_phy>; 44*f126890aSEmmanuel Vadot phy-mode = "rmii"; 45*f126890aSEmmanuel Vadot phy-handle = <&phy>; 46*f126890aSEmmanuel Vadot status = "okay"; 47*f126890aSEmmanuel Vadot 48*f126890aSEmmanuel Vadot mdio { 49*f126890aSEmmanuel Vadot compatible = "snps,dwmac-mdio"; 50*f126890aSEmmanuel Vadot #address-cells = <1>; 51*f126890aSEmmanuel Vadot #size-cells = <0>; 52*f126890aSEmmanuel Vadot 53*f126890aSEmmanuel Vadot phy: ethernet-phy@0 { 54*f126890aSEmmanuel Vadot compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22"; 55*f126890aSEmmanuel Vadot reg = <0>; 56*f126890aSEmmanuel Vadot clocks = <&cru SCLK_MAC_PHY>; 57*f126890aSEmmanuel Vadot resets = <&cru SRST_MACPHY>; 58*f126890aSEmmanuel Vadot phy-is-integrated; 59*f126890aSEmmanuel Vadot }; 60*f126890aSEmmanuel Vadot }; 61*f126890aSEmmanuel Vadot}; 62*f126890aSEmmanuel Vadot 63*f126890aSEmmanuel Vadot&tsadc { 64*f126890aSEmmanuel Vadot status = "okay"; 65*f126890aSEmmanuel Vadot 66*f126890aSEmmanuel Vadot rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ 67*f126890aSEmmanuel Vadot rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ 68*f126890aSEmmanuel Vadot}; 69*f126890aSEmmanuel Vadot 70*f126890aSEmmanuel Vadot&uart2 { 71*f126890aSEmmanuel Vadot status = "okay"; 72*f126890aSEmmanuel Vadot}; 73