1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC 4 * 5 * Copyright (C) 2013-2015 Renesas Electronics Corporation 6 * Copyright (C) 2013-2014 Renesas Solutions Corp. 7 * Copyright (C) 2014 Cogent Embedded Inc. 8 */ 9 10#include <dt-bindings/clock/r8a7791-cpg-mssr.h> 11#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/power/r8a7791-sysc.h> 14 15/ { 16 compatible = "renesas,r8a7791"; 17 #address-cells = <2>; 18 #size-cells = <2>; 19 20 aliases { 21 i2c0 = &i2c0; 22 i2c1 = &i2c1; 23 i2c2 = &i2c2; 24 i2c3 = &i2c3; 25 i2c4 = &i2c4; 26 i2c5 = &i2c5; 27 i2c6 = &i2c6; 28 i2c7 = &i2c7; 29 i2c8 = &i2c8; 30 spi0 = &qspi; 31 spi1 = &msiof0; 32 spi2 = &msiof1; 33 spi3 = &msiof2; 34 vin0 = &vin0; 35 vin1 = &vin1; 36 vin2 = &vin2; 37 }; 38 39 /* 40 * The external audio clocks are configured as 0 Hz fixed frequency 41 * clocks by default. 42 * Boards that provide audio clocks should override them. 43 */ 44 audio_clk_a: audio_clk_a { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 audio_clk_b: audio_clk_b { 50 compatible = "fixed-clock"; 51 #clock-cells = <0>; 52 clock-frequency = <0>; 53 }; 54 audio_clk_c: audio_clk_c { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 /* External CAN clock */ 61 can_clk: can { 62 compatible = "fixed-clock"; 63 #clock-cells = <0>; 64 /* This value must be overridden by the board. */ 65 clock-frequency = <0>; 66 }; 67 68 cpus { 69 #address-cells = <1>; 70 #size-cells = <0>; 71 72 cpu0: cpu@0 { 73 device_type = "cpu"; 74 compatible = "arm,cortex-a15"; 75 reg = <0>; 76 clock-frequency = <1500000000>; 77 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; 78 power-domains = <&sysc R8A7791_PD_CA15_CPU0>; 79 enable-method = "renesas,apmu"; 80 next-level-cache = <&L2_CA15>; 81 voltage-tolerance = <1>; /* 1% */ 82 clock-latency = <300000>; /* 300 us */ 83 84 /* kHz - uV - OPPs unknown yet */ 85 operating-points = <1500000 1000000>, 86 <1312500 1000000>, 87 <1125000 1000000>, 88 < 937500 1000000>, 89 < 750000 1000000>, 90 < 375000 1000000>; 91 }; 92 93 cpu1: cpu@1 { 94 device_type = "cpu"; 95 compatible = "arm,cortex-a15"; 96 reg = <1>; 97 clock-frequency = <1500000000>; 98 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; 99 power-domains = <&sysc R8A7791_PD_CA15_CPU1>; 100 enable-method = "renesas,apmu"; 101 next-level-cache = <&L2_CA15>; 102 voltage-tolerance = <1>; /* 1% */ 103 clock-latency = <300000>; /* 300 us */ 104 105 /* kHz - uV - OPPs unknown yet */ 106 operating-points = <1500000 1000000>, 107 <1312500 1000000>, 108 <1125000 1000000>, 109 < 937500 1000000>, 110 < 750000 1000000>, 111 < 375000 1000000>; 112 }; 113 114 L2_CA15: cache-controller-0 { 115 compatible = "cache"; 116 power-domains = <&sysc R8A7791_PD_CA15_SCU>; 117 cache-unified; 118 cache-level = <2>; 119 }; 120 }; 121 122 /* External root clock */ 123 extal_clk: extal { 124 compatible = "fixed-clock"; 125 #clock-cells = <0>; 126 /* This value must be overridden by the board. */ 127 clock-frequency = <0>; 128 }; 129 130 /* External PCIe clock - can be overridden by the board */ 131 pcie_bus_clk: pcie_bus { 132 compatible = "fixed-clock"; 133 #clock-cells = <0>; 134 clock-frequency = <0>; 135 }; 136 137 pmu { 138 compatible = "arm,cortex-a15-pmu"; 139 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 140 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 141 interrupt-affinity = <&cpu0>, <&cpu1>; 142 }; 143 144 /* External SCIF clock */ 145 scif_clk: scif { 146 compatible = "fixed-clock"; 147 #clock-cells = <0>; 148 /* This value must be overridden by the board. */ 149 clock-frequency = <0>; 150 }; 151 152 soc { 153 compatible = "simple-bus"; 154 interrupt-parent = <&gic>; 155 156 #address-cells = <2>; 157 #size-cells = <2>; 158 ranges; 159 160 rwdt: watchdog@e6020000 { 161 compatible = "renesas,r8a7791-wdt", 162 "renesas,rcar-gen2-wdt"; 163 reg = <0 0xe6020000 0 0x0c>; 164 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 165 clocks = <&cpg CPG_MOD 402>; 166 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 167 resets = <&cpg 402>; 168 status = "disabled"; 169 }; 170 171 gpio0: gpio@e6050000 { 172 compatible = "renesas,gpio-r8a7791", 173 "renesas,rcar-gen2-gpio"; 174 reg = <0 0xe6050000 0 0x50>; 175 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 176 #gpio-cells = <2>; 177 gpio-controller; 178 gpio-ranges = <&pfc 0 0 32>; 179 #interrupt-cells = <2>; 180 interrupt-controller; 181 clocks = <&cpg CPG_MOD 912>; 182 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 183 resets = <&cpg 912>; 184 }; 185 186 gpio1: gpio@e6051000 { 187 compatible = "renesas,gpio-r8a7791", 188 "renesas,rcar-gen2-gpio"; 189 reg = <0 0xe6051000 0 0x50>; 190 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 191 #gpio-cells = <2>; 192 gpio-controller; 193 gpio-ranges = <&pfc 0 32 26>; 194 #interrupt-cells = <2>; 195 interrupt-controller; 196 clocks = <&cpg CPG_MOD 911>; 197 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 198 resets = <&cpg 911>; 199 }; 200 201 gpio2: gpio@e6052000 { 202 compatible = "renesas,gpio-r8a7791", 203 "renesas,rcar-gen2-gpio"; 204 reg = <0 0xe6052000 0 0x50>; 205 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 206 #gpio-cells = <2>; 207 gpio-controller; 208 gpio-ranges = <&pfc 0 64 32>; 209 #interrupt-cells = <2>; 210 interrupt-controller; 211 clocks = <&cpg CPG_MOD 910>; 212 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 213 resets = <&cpg 910>; 214 }; 215 216 gpio3: gpio@e6053000 { 217 compatible = "renesas,gpio-r8a7791", 218 "renesas,rcar-gen2-gpio"; 219 reg = <0 0xe6053000 0 0x50>; 220 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 221 #gpio-cells = <2>; 222 gpio-controller; 223 gpio-ranges = <&pfc 0 96 32>; 224 #interrupt-cells = <2>; 225 interrupt-controller; 226 clocks = <&cpg CPG_MOD 909>; 227 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 228 resets = <&cpg 909>; 229 }; 230 231 gpio4: gpio@e6054000 { 232 compatible = "renesas,gpio-r8a7791", 233 "renesas,rcar-gen2-gpio"; 234 reg = <0 0xe6054000 0 0x50>; 235 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 236 #gpio-cells = <2>; 237 gpio-controller; 238 gpio-ranges = <&pfc 0 128 32>; 239 #interrupt-cells = <2>; 240 interrupt-controller; 241 clocks = <&cpg CPG_MOD 908>; 242 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 243 resets = <&cpg 908>; 244 }; 245 246 gpio5: gpio@e6055000 { 247 compatible = "renesas,gpio-r8a7791", 248 "renesas,rcar-gen2-gpio"; 249 reg = <0 0xe6055000 0 0x50>; 250 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 251 #gpio-cells = <2>; 252 gpio-controller; 253 gpio-ranges = <&pfc 0 160 32>; 254 #interrupt-cells = <2>; 255 interrupt-controller; 256 clocks = <&cpg CPG_MOD 907>; 257 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 258 resets = <&cpg 907>; 259 }; 260 261 gpio6: gpio@e6055400 { 262 compatible = "renesas,gpio-r8a7791", 263 "renesas,rcar-gen2-gpio"; 264 reg = <0 0xe6055400 0 0x50>; 265 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 266 #gpio-cells = <2>; 267 gpio-controller; 268 gpio-ranges = <&pfc 0 192 32>; 269 #interrupt-cells = <2>; 270 interrupt-controller; 271 clocks = <&cpg CPG_MOD 905>; 272 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 273 resets = <&cpg 905>; 274 }; 275 276 gpio7: gpio@e6055800 { 277 compatible = "renesas,gpio-r8a7791", 278 "renesas,rcar-gen2-gpio"; 279 reg = <0 0xe6055800 0 0x50>; 280 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 281 #gpio-cells = <2>; 282 gpio-controller; 283 gpio-ranges = <&pfc 0 224 26>; 284 #interrupt-cells = <2>; 285 interrupt-controller; 286 clocks = <&cpg CPG_MOD 904>; 287 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 288 resets = <&cpg 904>; 289 }; 290 291 pfc: pinctrl@e6060000 { 292 compatible = "renesas,pfc-r8a7791"; 293 reg = <0 0xe6060000 0 0x250>; 294 }; 295 296 tpu: pwm@e60f0000 { 297 compatible = "renesas,tpu-r8a7791", "renesas,tpu"; 298 reg = <0 0xe60f0000 0 0x148>; 299 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 300 clocks = <&cpg CPG_MOD 304>; 301 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 302 resets = <&cpg 304>; 303 #pwm-cells = <3>; 304 status = "disabled"; 305 }; 306 307 cpg: clock-controller@e6150000 { 308 compatible = "renesas,r8a7791-cpg-mssr"; 309 reg = <0 0xe6150000 0 0x1000>; 310 clocks = <&extal_clk>, <&usb_extal_clk>; 311 clock-names = "extal", "usb_extal"; 312 #clock-cells = <2>; 313 #power-domain-cells = <0>; 314 #reset-cells = <1>; 315 }; 316 317 apmu@e6152000 { 318 compatible = "renesas,r8a7791-apmu", "renesas,apmu"; 319 reg = <0 0xe6152000 0 0x188>; 320 cpus = <&cpu0>, <&cpu1>; 321 }; 322 323 rst: reset-controller@e6160000 { 324 compatible = "renesas,r8a7791-rst"; 325 reg = <0 0xe6160000 0 0x0100>; 326 }; 327 328 sysc: system-controller@e6180000 { 329 compatible = "renesas,r8a7791-sysc"; 330 reg = <0 0xe6180000 0 0x0200>; 331 #power-domain-cells = <1>; 332 }; 333 334 irqc0: interrupt-controller@e61c0000 { 335 compatible = "renesas,irqc-r8a7791", "renesas,irqc"; 336 #interrupt-cells = <2>; 337 interrupt-controller; 338 reg = <0 0xe61c0000 0 0x200>; 339 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 340 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 341 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 342 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 343 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 344 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 349 clocks = <&cpg CPG_MOD 407>; 350 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 351 resets = <&cpg 407>; 352 }; 353 354 thermal: thermal@e61f0000 { 355 compatible = "renesas,thermal-r8a7791", 356 "renesas,rcar-gen2-thermal", 357 "renesas,rcar-thermal"; 358 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; 359 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 360 clocks = <&cpg CPG_MOD 522>; 361 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 362 resets = <&cpg 522>; 363 #thermal-sensor-cells = <0>; 364 }; 365 366 ipmmu_sy0: iommu@e6280000 { 367 compatible = "renesas,ipmmu-r8a7791", 368 "renesas,ipmmu-vmsa"; 369 reg = <0 0xe6280000 0 0x1000>; 370 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 371 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 372 #iommu-cells = <1>; 373 status = "disabled"; 374 }; 375 376 ipmmu_sy1: iommu@e6290000 { 377 compatible = "renesas,ipmmu-r8a7791", 378 "renesas,ipmmu-vmsa"; 379 reg = <0 0xe6290000 0 0x1000>; 380 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 381 #iommu-cells = <1>; 382 status = "disabled"; 383 }; 384 385 ipmmu_ds: iommu@e6740000 { 386 compatible = "renesas,ipmmu-r8a7791", 387 "renesas,ipmmu-vmsa"; 388 reg = <0 0xe6740000 0 0x1000>; 389 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 390 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 391 #iommu-cells = <1>; 392 status = "disabled"; 393 }; 394 395 ipmmu_mp: iommu@ec680000 { 396 compatible = "renesas,ipmmu-r8a7791", 397 "renesas,ipmmu-vmsa"; 398 reg = <0 0xec680000 0 0x1000>; 399 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 400 #iommu-cells = <1>; 401 status = "disabled"; 402 }; 403 404 ipmmu_mx: iommu@fe951000 { 405 compatible = "renesas,ipmmu-r8a7791", 406 "renesas,ipmmu-vmsa"; 407 reg = <0 0xfe951000 0 0x1000>; 408 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 409 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 410 #iommu-cells = <1>; 411 status = "disabled"; 412 }; 413 414 ipmmu_rt: iommu@ffc80000 { 415 compatible = "renesas,ipmmu-r8a7791", 416 "renesas,ipmmu-vmsa"; 417 reg = <0 0xffc80000 0 0x1000>; 418 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 419 #iommu-cells = <1>; 420 status = "disabled"; 421 }; 422 423 ipmmu_gp: iommu@e62a0000 { 424 compatible = "renesas,ipmmu-r8a7791", 425 "renesas,ipmmu-vmsa"; 426 reg = <0 0xe62a0000 0 0x1000>; 427 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 428 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 429 #iommu-cells = <1>; 430 status = "disabled"; 431 }; 432 433 icram0: sram@e63a0000 { 434 compatible = "mmio-sram"; 435 reg = <0 0xe63a0000 0 0x12000>; 436 #address-cells = <1>; 437 #size-cells = <1>; 438 ranges = <0 0 0xe63a0000 0x12000>; 439 }; 440 441 icram1: sram@e63c0000 { 442 compatible = "mmio-sram"; 443 reg = <0 0xe63c0000 0 0x1000>; 444 #address-cells = <1>; 445 #size-cells = <1>; 446 ranges = <0 0 0xe63c0000 0x1000>; 447 448 smp-sram@0 { 449 compatible = "renesas,smp-sram"; 450 reg = <0 0x100>; 451 }; 452 }; 453 454 /* The memory map in the User's Manual maps the cores to 455 * bus numbers 456 */ 457 i2c0: i2c@e6508000 { 458 #address-cells = <1>; 459 #size-cells = <0>; 460 compatible = "renesas,i2c-r8a7791", 461 "renesas,rcar-gen2-i2c"; 462 reg = <0 0xe6508000 0 0x40>; 463 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 464 clocks = <&cpg CPG_MOD 931>; 465 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 466 resets = <&cpg 931>; 467 i2c-scl-internal-delay-ns = <6>; 468 status = "disabled"; 469 }; 470 471 i2c1: i2c@e6518000 { 472 #address-cells = <1>; 473 #size-cells = <0>; 474 compatible = "renesas,i2c-r8a7791", 475 "renesas,rcar-gen2-i2c"; 476 reg = <0 0xe6518000 0 0x40>; 477 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 478 clocks = <&cpg CPG_MOD 930>; 479 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 480 resets = <&cpg 930>; 481 i2c-scl-internal-delay-ns = <6>; 482 status = "disabled"; 483 }; 484 485 i2c2: i2c@e6530000 { 486 #address-cells = <1>; 487 #size-cells = <0>; 488 compatible = "renesas,i2c-r8a7791", 489 "renesas,rcar-gen2-i2c"; 490 reg = <0 0xe6530000 0 0x40>; 491 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 492 clocks = <&cpg CPG_MOD 929>; 493 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 494 resets = <&cpg 929>; 495 i2c-scl-internal-delay-ns = <6>; 496 status = "disabled"; 497 }; 498 499 i2c3: i2c@e6540000 { 500 #address-cells = <1>; 501 #size-cells = <0>; 502 compatible = "renesas,i2c-r8a7791", 503 "renesas,rcar-gen2-i2c"; 504 reg = <0 0xe6540000 0 0x40>; 505 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 506 clocks = <&cpg CPG_MOD 928>; 507 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 508 resets = <&cpg 928>; 509 i2c-scl-internal-delay-ns = <6>; 510 status = "disabled"; 511 }; 512 513 i2c4: i2c@e6520000 { 514 #address-cells = <1>; 515 #size-cells = <0>; 516 compatible = "renesas,i2c-r8a7791", 517 "renesas,rcar-gen2-i2c"; 518 reg = <0 0xe6520000 0 0x40>; 519 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 520 clocks = <&cpg CPG_MOD 927>; 521 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 522 resets = <&cpg 927>; 523 i2c-scl-internal-delay-ns = <6>; 524 status = "disabled"; 525 }; 526 527 i2c5: i2c@e6528000 { 528 /* doesn't need pinmux */ 529 #address-cells = <1>; 530 #size-cells = <0>; 531 compatible = "renesas,i2c-r8a7791", 532 "renesas,rcar-gen2-i2c"; 533 reg = <0 0xe6528000 0 0x40>; 534 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 535 clocks = <&cpg CPG_MOD 925>; 536 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 537 resets = <&cpg 925>; 538 i2c-scl-internal-delay-ns = <110>; 539 status = "disabled"; 540 }; 541 542 i2c6: i2c@e60b0000 { 543 /* doesn't need pinmux */ 544 #address-cells = <1>; 545 #size-cells = <0>; 546 compatible = "renesas,iic-r8a7791", 547 "renesas,rcar-gen2-iic", 548 "renesas,rmobile-iic"; 549 reg = <0 0xe60b0000 0 0x425>; 550 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 551 clocks = <&cpg CPG_MOD 926>; 552 dmas = <&dmac0 0x77>, <&dmac0 0x78>, 553 <&dmac1 0x77>, <&dmac1 0x78>; 554 dma-names = "tx", "rx", "tx", "rx"; 555 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 556 resets = <&cpg 926>; 557 status = "disabled"; 558 }; 559 560 i2c7: i2c@e6500000 { 561 #address-cells = <1>; 562 #size-cells = <0>; 563 compatible = "renesas,iic-r8a7791", 564 "renesas,rcar-gen2-iic", 565 "renesas,rmobile-iic"; 566 reg = <0 0xe6500000 0 0x425>; 567 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 568 clocks = <&cpg CPG_MOD 318>; 569 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 570 <&dmac1 0x61>, <&dmac1 0x62>; 571 dma-names = "tx", "rx", "tx", "rx"; 572 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 573 resets = <&cpg 318>; 574 status = "disabled"; 575 }; 576 577 i2c8: i2c@e6510000 { 578 #address-cells = <1>; 579 #size-cells = <0>; 580 compatible = "renesas,iic-r8a7791", 581 "renesas,rcar-gen2-iic", 582 "renesas,rmobile-iic"; 583 reg = <0 0xe6510000 0 0x425>; 584 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 585 clocks = <&cpg CPG_MOD 323>; 586 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 587 <&dmac1 0x65>, <&dmac1 0x66>; 588 dma-names = "tx", "rx", "tx", "rx"; 589 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 590 resets = <&cpg 323>; 591 status = "disabled"; 592 }; 593 594 hsusb: usb@e6590000 { 595 compatible = "renesas,usbhs-r8a7791", 596 "renesas,rcar-gen2-usbhs"; 597 reg = <0 0xe6590000 0 0x100>; 598 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 599 clocks = <&cpg CPG_MOD 704>; 600 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 601 <&usb_dmac1 0>, <&usb_dmac1 1>; 602 dma-names = "ch0", "ch1", "ch2", "ch3"; 603 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 604 resets = <&cpg 704>; 605 renesas,buswait = <4>; 606 phys = <&usb0 1>; 607 phy-names = "usb"; 608 status = "disabled"; 609 }; 610 611 usbphy: usb-phy-controller@e6590100 { 612 compatible = "renesas,usb-phy-r8a7791", 613 "renesas,rcar-gen2-usb-phy"; 614 reg = <0 0xe6590100 0 0x100>; 615 #address-cells = <1>; 616 #size-cells = <0>; 617 clocks = <&cpg CPG_MOD 704>; 618 clock-names = "usbhs"; 619 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 620 resets = <&cpg 704>; 621 status = "disabled"; 622 623 usb0: usb-phy@0 { 624 reg = <0>; 625 #phy-cells = <1>; 626 }; 627 usb2: usb-phy@2 { 628 reg = <2>; 629 #phy-cells = <1>; 630 }; 631 }; 632 633 usb_dmac0: dma-controller@e65a0000 { 634 compatible = "renesas,r8a7791-usb-dmac", 635 "renesas,usb-dmac"; 636 reg = <0 0xe65a0000 0 0x100>; 637 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 638 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 639 interrupt-names = "ch0", "ch1"; 640 clocks = <&cpg CPG_MOD 330>; 641 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 642 resets = <&cpg 330>; 643 #dma-cells = <1>; 644 dma-channels = <2>; 645 }; 646 647 usb_dmac1: dma-controller@e65b0000 { 648 compatible = "renesas,r8a7791-usb-dmac", 649 "renesas,usb-dmac"; 650 reg = <0 0xe65b0000 0 0x100>; 651 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 652 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 653 interrupt-names = "ch0", "ch1"; 654 clocks = <&cpg CPG_MOD 331>; 655 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 656 resets = <&cpg 331>; 657 #dma-cells = <1>; 658 dma-channels = <2>; 659 }; 660 661 dmac0: dma-controller@e6700000 { 662 compatible = "renesas,dmac-r8a7791", 663 "renesas,rcar-dmac"; 664 reg = <0 0xe6700000 0 0x20000>; 665 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 666 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 667 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 668 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 669 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 670 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 671 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 672 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 673 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 674 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 675 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 676 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 677 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 678 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 679 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 680 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 681 interrupt-names = "error", 682 "ch0", "ch1", "ch2", "ch3", 683 "ch4", "ch5", "ch6", "ch7", 684 "ch8", "ch9", "ch10", "ch11", 685 "ch12", "ch13", "ch14"; 686 clocks = <&cpg CPG_MOD 219>; 687 clock-names = "fck"; 688 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 689 resets = <&cpg 219>; 690 #dma-cells = <1>; 691 dma-channels = <15>; 692 }; 693 694 dmac1: dma-controller@e6720000 { 695 compatible = "renesas,dmac-r8a7791", 696 "renesas,rcar-dmac"; 697 reg = <0 0xe6720000 0 0x20000>; 698 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 699 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 700 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 701 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 702 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 703 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 704 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 705 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 706 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 707 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 708 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 709 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 710 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 711 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 712 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 713 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 714 interrupt-names = "error", 715 "ch0", "ch1", "ch2", "ch3", 716 "ch4", "ch5", "ch6", "ch7", 717 "ch8", "ch9", "ch10", "ch11", 718 "ch12", "ch13", "ch14"; 719 clocks = <&cpg CPG_MOD 218>; 720 clock-names = "fck"; 721 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 722 resets = <&cpg 218>; 723 #dma-cells = <1>; 724 dma-channels = <15>; 725 }; 726 727 avb: ethernet@e6800000 { 728 compatible = "renesas,etheravb-r8a7791", 729 "renesas,etheravb-rcar-gen2"; 730 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 731 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 732 clocks = <&cpg CPG_MOD 812>; 733 clock-names = "fck"; 734 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 735 resets = <&cpg 812>; 736 #address-cells = <1>; 737 #size-cells = <0>; 738 status = "disabled"; 739 }; 740 741 qspi: spi@e6b10000 { 742 compatible = "renesas,qspi-r8a7791", "renesas,qspi"; 743 reg = <0 0xe6b10000 0 0x2c>; 744 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 745 clocks = <&cpg CPG_MOD 917>; 746 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 747 <&dmac1 0x17>, <&dmac1 0x18>; 748 dma-names = "tx", "rx", "tx", "rx"; 749 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 750 resets = <&cpg 917>; 751 num-cs = <1>; 752 #address-cells = <1>; 753 #size-cells = <0>; 754 status = "disabled"; 755 }; 756 757 scifa0: serial@e6c40000 { 758 compatible = "renesas,scifa-r8a7791", 759 "renesas,rcar-gen2-scifa", "renesas,scifa"; 760 reg = <0 0xe6c40000 0 64>; 761 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 762 clocks = <&cpg CPG_MOD 204>; 763 clock-names = "fck"; 764 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 765 <&dmac1 0x21>, <&dmac1 0x22>; 766 dma-names = "tx", "rx", "tx", "rx"; 767 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 768 resets = <&cpg 204>; 769 status = "disabled"; 770 }; 771 772 scifa1: serial@e6c50000 { 773 compatible = "renesas,scifa-r8a7791", 774 "renesas,rcar-gen2-scifa", "renesas,scifa"; 775 reg = <0 0xe6c50000 0 64>; 776 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 777 clocks = <&cpg CPG_MOD 203>; 778 clock-names = "fck"; 779 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 780 <&dmac1 0x25>, <&dmac1 0x26>; 781 dma-names = "tx", "rx", "tx", "rx"; 782 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 783 resets = <&cpg 203>; 784 status = "disabled"; 785 }; 786 787 scifa2: serial@e6c60000 { 788 compatible = "renesas,scifa-r8a7791", 789 "renesas,rcar-gen2-scifa", "renesas,scifa"; 790 reg = <0 0xe6c60000 0 64>; 791 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 792 clocks = <&cpg CPG_MOD 202>; 793 clock-names = "fck"; 794 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 795 <&dmac1 0x27>, <&dmac1 0x28>; 796 dma-names = "tx", "rx", "tx", "rx"; 797 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 798 resets = <&cpg 202>; 799 status = "disabled"; 800 }; 801 802 scifa3: serial@e6c70000 { 803 compatible = "renesas,scifa-r8a7791", 804 "renesas,rcar-gen2-scifa", "renesas,scifa"; 805 reg = <0 0xe6c70000 0 64>; 806 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 807 clocks = <&cpg CPG_MOD 1106>; 808 clock-names = "fck"; 809 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 810 <&dmac1 0x1b>, <&dmac1 0x1c>; 811 dma-names = "tx", "rx", "tx", "rx"; 812 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 813 resets = <&cpg 1106>; 814 status = "disabled"; 815 }; 816 817 scifa4: serial@e6c78000 { 818 compatible = "renesas,scifa-r8a7791", 819 "renesas,rcar-gen2-scifa", "renesas,scifa"; 820 reg = <0 0xe6c78000 0 64>; 821 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 822 clocks = <&cpg CPG_MOD 1107>; 823 clock-names = "fck"; 824 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 825 <&dmac1 0x1f>, <&dmac1 0x20>; 826 dma-names = "tx", "rx", "tx", "rx"; 827 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 828 resets = <&cpg 1107>; 829 status = "disabled"; 830 }; 831 832 scifa5: serial@e6c80000 { 833 compatible = "renesas,scifa-r8a7791", 834 "renesas,rcar-gen2-scifa", "renesas,scifa"; 835 reg = <0 0xe6c80000 0 64>; 836 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 837 clocks = <&cpg CPG_MOD 1108>; 838 clock-names = "fck"; 839 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 840 <&dmac1 0x23>, <&dmac1 0x24>; 841 dma-names = "tx", "rx", "tx", "rx"; 842 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 843 resets = <&cpg 1108>; 844 status = "disabled"; 845 }; 846 847 scifb0: serial@e6c20000 { 848 compatible = "renesas,scifb-r8a7791", 849 "renesas,rcar-gen2-scifb", "renesas,scifb"; 850 reg = <0 0xe6c20000 0 0x100>; 851 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 852 clocks = <&cpg CPG_MOD 206>; 853 clock-names = "fck"; 854 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 855 <&dmac1 0x3d>, <&dmac1 0x3e>; 856 dma-names = "tx", "rx", "tx", "rx"; 857 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 858 resets = <&cpg 206>; 859 status = "disabled"; 860 }; 861 862 scifb1: serial@e6c30000 { 863 compatible = "renesas,scifb-r8a7791", 864 "renesas,rcar-gen2-scifb", "renesas,scifb"; 865 reg = <0 0xe6c30000 0 0x100>; 866 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 867 clocks = <&cpg CPG_MOD 207>; 868 clock-names = "fck"; 869 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 870 <&dmac1 0x19>, <&dmac1 0x1a>; 871 dma-names = "tx", "rx", "tx", "rx"; 872 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 873 resets = <&cpg 207>; 874 status = "disabled"; 875 }; 876 877 scifb2: serial@e6ce0000 { 878 compatible = "renesas,scifb-r8a7791", 879 "renesas,rcar-gen2-scifb", "renesas,scifb"; 880 reg = <0 0xe6ce0000 0 0x100>; 881 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 882 clocks = <&cpg CPG_MOD 216>; 883 clock-names = "fck"; 884 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 885 <&dmac1 0x1d>, <&dmac1 0x1e>; 886 dma-names = "tx", "rx", "tx", "rx"; 887 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 888 resets = <&cpg 216>; 889 status = "disabled"; 890 }; 891 892 scif0: serial@e6e60000 { 893 compatible = "renesas,scif-r8a7791", 894 "renesas,rcar-gen2-scif", "renesas,scif"; 895 reg = <0 0xe6e60000 0 64>; 896 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 897 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 898 <&scif_clk>; 899 clock-names = "fck", "brg_int", "scif_clk"; 900 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 901 <&dmac1 0x29>, <&dmac1 0x2a>; 902 dma-names = "tx", "rx", "tx", "rx"; 903 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 904 resets = <&cpg 721>; 905 status = "disabled"; 906 }; 907 908 scif1: serial@e6e68000 { 909 compatible = "renesas,scif-r8a7791", 910 "renesas,rcar-gen2-scif", "renesas,scif"; 911 reg = <0 0xe6e68000 0 64>; 912 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 913 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 914 <&scif_clk>; 915 clock-names = "fck", "brg_int", "scif_clk"; 916 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 917 <&dmac1 0x2d>, <&dmac1 0x2e>; 918 dma-names = "tx", "rx", "tx", "rx"; 919 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 920 resets = <&cpg 720>; 921 status = "disabled"; 922 }; 923 924 scif2: serial@e6e58000 { 925 compatible = "renesas,scif-r8a7791", 926 "renesas,rcar-gen2-scif", "renesas,scif"; 927 reg = <0 0xe6e58000 0 64>; 928 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 929 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 930 <&scif_clk>; 931 clock-names = "fck", "brg_int", "scif_clk"; 932 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 933 <&dmac1 0x2b>, <&dmac1 0x2c>; 934 dma-names = "tx", "rx", "tx", "rx"; 935 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 936 resets = <&cpg 719>; 937 status = "disabled"; 938 }; 939 940 scif3: serial@e6ea8000 { 941 compatible = "renesas,scif-r8a7791", 942 "renesas,rcar-gen2-scif", "renesas,scif"; 943 reg = <0 0xe6ea8000 0 64>; 944 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 945 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 946 <&scif_clk>; 947 clock-names = "fck", "brg_int", "scif_clk"; 948 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 949 <&dmac1 0x2f>, <&dmac1 0x30>; 950 dma-names = "tx", "rx", "tx", "rx"; 951 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 952 resets = <&cpg 718>; 953 status = "disabled"; 954 }; 955 956 scif4: serial@e6ee0000 { 957 compatible = "renesas,scif-r8a7791", 958 "renesas,rcar-gen2-scif", "renesas,scif"; 959 reg = <0 0xe6ee0000 0 64>; 960 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 961 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 962 <&scif_clk>; 963 clock-names = "fck", "brg_int", "scif_clk"; 964 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 965 <&dmac1 0xfb>, <&dmac1 0xfc>; 966 dma-names = "tx", "rx", "tx", "rx"; 967 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 968 resets = <&cpg 715>; 969 status = "disabled"; 970 }; 971 972 scif5: serial@e6ee8000 { 973 compatible = "renesas,scif-r8a7791", 974 "renesas,rcar-gen2-scif", "renesas,scif"; 975 reg = <0 0xe6ee8000 0 64>; 976 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 977 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 978 <&scif_clk>; 979 clock-names = "fck", "brg_int", "scif_clk"; 980 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 981 <&dmac1 0xfd>, <&dmac1 0xfe>; 982 dma-names = "tx", "rx", "tx", "rx"; 983 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 984 resets = <&cpg 714>; 985 status = "disabled"; 986 }; 987 988 hscif0: serial@e62c0000 { 989 compatible = "renesas,hscif-r8a7791", 990 "renesas,rcar-gen2-hscif", "renesas,hscif"; 991 reg = <0 0xe62c0000 0 96>; 992 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 993 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 994 <&scif_clk>; 995 clock-names = "fck", "brg_int", "scif_clk"; 996 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 997 <&dmac1 0x39>, <&dmac1 0x3a>; 998 dma-names = "tx", "rx", "tx", "rx"; 999 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1000 resets = <&cpg 717>; 1001 status = "disabled"; 1002 }; 1003 1004 hscif1: serial@e62c8000 { 1005 compatible = "renesas,hscif-r8a7791", 1006 "renesas,rcar-gen2-hscif", "renesas,hscif"; 1007 reg = <0 0xe62c8000 0 96>; 1008 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 1009 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 1010 <&scif_clk>; 1011 clock-names = "fck", "brg_int", "scif_clk"; 1012 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 1013 <&dmac1 0x4d>, <&dmac1 0x4e>; 1014 dma-names = "tx", "rx", "tx", "rx"; 1015 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1016 resets = <&cpg 716>; 1017 status = "disabled"; 1018 }; 1019 1020 hscif2: serial@e62d0000 { 1021 compatible = "renesas,hscif-r8a7791", 1022 "renesas,rcar-gen2-hscif", "renesas,hscif"; 1023 reg = <0 0xe62d0000 0 96>; 1024 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1025 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 1026 <&scif_clk>; 1027 clock-names = "fck", "brg_int", "scif_clk"; 1028 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 1029 <&dmac1 0x3b>, <&dmac1 0x3c>; 1030 dma-names = "tx", "rx", "tx", "rx"; 1031 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1032 resets = <&cpg 713>; 1033 status = "disabled"; 1034 }; 1035 1036 msiof0: spi@e6e20000 { 1037 compatible = "renesas,msiof-r8a7791", 1038 "renesas,rcar-gen2-msiof"; 1039 reg = <0 0xe6e20000 0 0x0064>; 1040 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1041 clocks = <&cpg CPG_MOD 000>; 1042 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 1043 <&dmac1 0x51>, <&dmac1 0x52>; 1044 dma-names = "tx", "rx", "tx", "rx"; 1045 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1046 resets = <&cpg 0>; 1047 #address-cells = <1>; 1048 #size-cells = <0>; 1049 status = "disabled"; 1050 }; 1051 1052 msiof1: spi@e6e10000 { 1053 compatible = "renesas,msiof-r8a7791", 1054 "renesas,rcar-gen2-msiof"; 1055 reg = <0 0xe6e10000 0 0x0064>; 1056 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1057 clocks = <&cpg CPG_MOD 208>; 1058 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 1059 <&dmac1 0x55>, <&dmac1 0x56>; 1060 dma-names = "tx", "rx", "tx", "rx"; 1061 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1062 resets = <&cpg 208>; 1063 #address-cells = <1>; 1064 #size-cells = <0>; 1065 status = "disabled"; 1066 }; 1067 1068 msiof2: spi@e6e00000 { 1069 compatible = "renesas,msiof-r8a7791", 1070 "renesas,rcar-gen2-msiof"; 1071 reg = <0 0xe6e00000 0 0x0064>; 1072 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1073 clocks = <&cpg CPG_MOD 205>; 1074 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 1075 <&dmac1 0x41>, <&dmac1 0x42>; 1076 dma-names = "tx", "rx", "tx", "rx"; 1077 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1078 resets = <&cpg 205>; 1079 #address-cells = <1>; 1080 #size-cells = <0>; 1081 status = "disabled"; 1082 }; 1083 1084 pwm0: pwm@e6e30000 { 1085 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1086 reg = <0 0xe6e30000 0 0x8>; 1087 clocks = <&cpg CPG_MOD 523>; 1088 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1089 resets = <&cpg 523>; 1090 #pwm-cells = <2>; 1091 status = "disabled"; 1092 }; 1093 1094 pwm1: pwm@e6e31000 { 1095 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1096 reg = <0 0xe6e31000 0 0x8>; 1097 clocks = <&cpg CPG_MOD 523>; 1098 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1099 resets = <&cpg 523>; 1100 #pwm-cells = <2>; 1101 status = "disabled"; 1102 }; 1103 1104 pwm2: pwm@e6e32000 { 1105 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1106 reg = <0 0xe6e32000 0 0x8>; 1107 clocks = <&cpg CPG_MOD 523>; 1108 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1109 resets = <&cpg 523>; 1110 #pwm-cells = <2>; 1111 status = "disabled"; 1112 }; 1113 1114 pwm3: pwm@e6e33000 { 1115 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1116 reg = <0 0xe6e33000 0 0x8>; 1117 clocks = <&cpg CPG_MOD 523>; 1118 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1119 resets = <&cpg 523>; 1120 #pwm-cells = <2>; 1121 status = "disabled"; 1122 }; 1123 1124 pwm4: pwm@e6e34000 { 1125 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1126 reg = <0 0xe6e34000 0 0x8>; 1127 clocks = <&cpg CPG_MOD 523>; 1128 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1129 resets = <&cpg 523>; 1130 #pwm-cells = <2>; 1131 status = "disabled"; 1132 }; 1133 1134 pwm5: pwm@e6e35000 { 1135 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1136 reg = <0 0xe6e35000 0 0x8>; 1137 clocks = <&cpg CPG_MOD 523>; 1138 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1139 resets = <&cpg 523>; 1140 #pwm-cells = <2>; 1141 status = "disabled"; 1142 }; 1143 1144 pwm6: pwm@e6e36000 { 1145 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1146 reg = <0 0xe6e36000 0 0x8>; 1147 clocks = <&cpg CPG_MOD 523>; 1148 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1149 resets = <&cpg 523>; 1150 #pwm-cells = <2>; 1151 status = "disabled"; 1152 }; 1153 1154 adc: adc@e6e54000 { 1155 compatible = "renesas,r8a7791-gyroadc", 1156 "renesas,rcar-gyroadc"; 1157 reg = <0 0xe6e54000 0 64>; 1158 clocks = <&cpg CPG_MOD 901>; 1159 clock-names = "fck"; 1160 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1161 resets = <&cpg 901>; 1162 status = "disabled"; 1163 }; 1164 1165 can0: can@e6e80000 { 1166 compatible = "renesas,can-r8a7791", 1167 "renesas,rcar-gen2-can"; 1168 reg = <0 0xe6e80000 0 0x1000>; 1169 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1170 clocks = <&cpg CPG_MOD 916>, 1171 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; 1172 clock-names = "clkp1", "clkp2", "can_clk"; 1173 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1174 resets = <&cpg 916>; 1175 status = "disabled"; 1176 }; 1177 1178 can1: can@e6e88000 { 1179 compatible = "renesas,can-r8a7791", 1180 "renesas,rcar-gen2-can"; 1181 reg = <0 0xe6e88000 0 0x1000>; 1182 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1183 clocks = <&cpg CPG_MOD 915>, 1184 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; 1185 clock-names = "clkp1", "clkp2", "can_clk"; 1186 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1187 resets = <&cpg 915>; 1188 status = "disabled"; 1189 }; 1190 1191 vin0: video@e6ef0000 { 1192 compatible = "renesas,vin-r8a7791", 1193 "renesas,rcar-gen2-vin"; 1194 reg = <0 0xe6ef0000 0 0x1000>; 1195 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1196 clocks = <&cpg CPG_MOD 811>; 1197 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1198 resets = <&cpg 811>; 1199 status = "disabled"; 1200 }; 1201 1202 vin1: video@e6ef1000 { 1203 compatible = "renesas,vin-r8a7791", 1204 "renesas,rcar-gen2-vin"; 1205 reg = <0 0xe6ef1000 0 0x1000>; 1206 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1207 clocks = <&cpg CPG_MOD 810>; 1208 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1209 resets = <&cpg 810>; 1210 status = "disabled"; 1211 }; 1212 1213 vin2: video@e6ef2000 { 1214 compatible = "renesas,vin-r8a7791", 1215 "renesas,rcar-gen2-vin"; 1216 reg = <0 0xe6ef2000 0 0x1000>; 1217 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1218 clocks = <&cpg CPG_MOD 809>; 1219 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1220 resets = <&cpg 809>; 1221 status = "disabled"; 1222 }; 1223 1224 rcar_sound: sound@ec500000 { 1225 /* 1226 * #sound-dai-cells is required if simple-card 1227 * 1228 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1229 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1230 */ 1231 compatible = "renesas,rcar_sound-r8a7791", 1232 "renesas,rcar_sound-gen2"; 1233 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1234 <0 0xec5a0000 0 0x100>, /* ADG */ 1235 <0 0xec540000 0 0x1000>, /* SSIU */ 1236 <0 0xec541000 0 0x280>, /* SSI */ 1237 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1238 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1239 1240 clocks = <&cpg CPG_MOD 1005>, 1241 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1242 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1243 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1244 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1245 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1246 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1247 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1248 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1249 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1250 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1251 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1252 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1253 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1254 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, 1255 <&cpg CPG_CORE R8A7791_CLK_M2>; 1256 clock-names = "ssi-all", 1257 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1258 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1259 "ssi.1", "ssi.0", "src.9", "src.8", 1260 "src.7", "src.6", "src.5", "src.4", 1261 "src.3", "src.2", "src.1", "src.0", 1262 "ctu.0", "ctu.1", 1263 "mix.0", "mix.1", 1264 "dvc.0", "dvc.1", 1265 "clk_a", "clk_b", "clk_c", "clk_i"; 1266 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1267 resets = <&cpg 1005>, 1268 <&cpg 1006>, <&cpg 1007>, 1269 <&cpg 1008>, <&cpg 1009>, 1270 <&cpg 1010>, <&cpg 1011>, 1271 <&cpg 1012>, <&cpg 1013>, 1272 <&cpg 1014>, <&cpg 1015>; 1273 reset-names = "ssi-all", 1274 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1275 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1276 "ssi.1", "ssi.0"; 1277 1278 status = "disabled"; 1279 1280 rcar_sound,dvc { 1281 dvc0: dvc-0 { 1282 dmas = <&audma1 0xbc>; 1283 dma-names = "tx"; 1284 }; 1285 dvc1: dvc-1 { 1286 dmas = <&audma1 0xbe>; 1287 dma-names = "tx"; 1288 }; 1289 }; 1290 1291 rcar_sound,mix { 1292 mix0: mix-0 { }; 1293 mix1: mix-1 { }; 1294 }; 1295 1296 rcar_sound,ctu { 1297 ctu00: ctu-0 { }; 1298 ctu01: ctu-1 { }; 1299 ctu02: ctu-2 { }; 1300 ctu03: ctu-3 { }; 1301 ctu10: ctu-4 { }; 1302 ctu11: ctu-5 { }; 1303 ctu12: ctu-6 { }; 1304 ctu13: ctu-7 { }; 1305 }; 1306 1307 rcar_sound,src { 1308 src0: src-0 { 1309 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1310 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1311 dma-names = "rx", "tx"; 1312 }; 1313 src1: src-1 { 1314 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1315 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1316 dma-names = "rx", "tx"; 1317 }; 1318 src2: src-2 { 1319 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1320 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1321 dma-names = "rx", "tx"; 1322 }; 1323 src3: src-3 { 1324 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1325 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1326 dma-names = "rx", "tx"; 1327 }; 1328 src4: src-4 { 1329 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1330 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1331 dma-names = "rx", "tx"; 1332 }; 1333 src5: src-5 { 1334 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1335 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1336 dma-names = "rx", "tx"; 1337 }; 1338 src6: src-6 { 1339 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1340 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1341 dma-names = "rx", "tx"; 1342 }; 1343 src7: src-7 { 1344 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1345 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1346 dma-names = "rx", "tx"; 1347 }; 1348 src8: src-8 { 1349 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1350 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1351 dma-names = "rx", "tx"; 1352 }; 1353 src9: src-9 { 1354 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1355 dmas = <&audma0 0x97>, <&audma1 0xba>; 1356 dma-names = "rx", "tx"; 1357 }; 1358 }; 1359 1360 rcar_sound,ssi { 1361 ssi0: ssi-0 { 1362 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1363 dmas = <&audma0 0x01>, <&audma1 0x02>, 1364 <&audma0 0x15>, <&audma1 0x16>; 1365 dma-names = "rx", "tx", "rxu", "txu"; 1366 }; 1367 ssi1: ssi-1 { 1368 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1369 dmas = <&audma0 0x03>, <&audma1 0x04>, 1370 <&audma0 0x49>, <&audma1 0x4a>; 1371 dma-names = "rx", "tx", "rxu", "txu"; 1372 }; 1373 ssi2: ssi-2 { 1374 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1375 dmas = <&audma0 0x05>, <&audma1 0x06>, 1376 <&audma0 0x63>, <&audma1 0x64>; 1377 dma-names = "rx", "tx", "rxu", "txu"; 1378 }; 1379 ssi3: ssi-3 { 1380 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1381 dmas = <&audma0 0x07>, <&audma1 0x08>, 1382 <&audma0 0x6f>, <&audma1 0x70>; 1383 dma-names = "rx", "tx", "rxu", "txu"; 1384 }; 1385 ssi4: ssi-4 { 1386 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1387 dmas = <&audma0 0x09>, <&audma1 0x0a>, 1388 <&audma0 0x71>, <&audma1 0x72>; 1389 dma-names = "rx", "tx", "rxu", "txu"; 1390 }; 1391 ssi5: ssi-5 { 1392 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1393 dmas = <&audma0 0x0b>, <&audma1 0x0c>, 1394 <&audma0 0x73>, <&audma1 0x74>; 1395 dma-names = "rx", "tx", "rxu", "txu"; 1396 }; 1397 ssi6: ssi-6 { 1398 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1399 dmas = <&audma0 0x0d>, <&audma1 0x0e>, 1400 <&audma0 0x75>, <&audma1 0x76>; 1401 dma-names = "rx", "tx", "rxu", "txu"; 1402 }; 1403 ssi7: ssi-7 { 1404 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1405 dmas = <&audma0 0x0f>, <&audma1 0x10>, 1406 <&audma0 0x79>, <&audma1 0x7a>; 1407 dma-names = "rx", "tx", "rxu", "txu"; 1408 }; 1409 ssi8: ssi-8 { 1410 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1411 dmas = <&audma0 0x11>, <&audma1 0x12>, 1412 <&audma0 0x7b>, <&audma1 0x7c>; 1413 dma-names = "rx", "tx", "rxu", "txu"; 1414 }; 1415 ssi9: ssi-9 { 1416 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1417 dmas = <&audma0 0x13>, <&audma1 0x14>, 1418 <&audma0 0x7d>, <&audma1 0x7e>; 1419 dma-names = "rx", "tx", "rxu", "txu"; 1420 }; 1421 }; 1422 }; 1423 1424 audma0: dma-controller@ec700000 { 1425 compatible = "renesas,dmac-r8a7791", 1426 "renesas,rcar-dmac"; 1427 reg = <0 0xec700000 0 0x10000>; 1428 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1429 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1430 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1431 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1432 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1433 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1434 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1435 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1436 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1437 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1438 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1439 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1440 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1441 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1442 interrupt-names = "error", 1443 "ch0", "ch1", "ch2", "ch3", 1444 "ch4", "ch5", "ch6", "ch7", 1445 "ch8", "ch9", "ch10", "ch11", 1446 "ch12"; 1447 clocks = <&cpg CPG_MOD 502>; 1448 clock-names = "fck"; 1449 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1450 resets = <&cpg 502>; 1451 #dma-cells = <1>; 1452 dma-channels = <13>; 1453 }; 1454 1455 audma1: dma-controller@ec720000 { 1456 compatible = "renesas,dmac-r8a7791", 1457 "renesas,rcar-dmac"; 1458 reg = <0 0xec720000 0 0x10000>; 1459 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 1460 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1461 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1462 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 1463 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1464 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1465 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1466 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1467 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1468 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1469 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1470 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1471 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1472 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; 1473 interrupt-names = "error", 1474 "ch0", "ch1", "ch2", "ch3", 1475 "ch4", "ch5", "ch6", "ch7", 1476 "ch8", "ch9", "ch10", "ch11", 1477 "ch12"; 1478 clocks = <&cpg CPG_MOD 501>; 1479 clock-names = "fck"; 1480 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1481 resets = <&cpg 501>; 1482 #dma-cells = <1>; 1483 dma-channels = <13>; 1484 }; 1485 1486 xhci: usb@ee000000 { 1487 compatible = "renesas,xhci-r8a7791", 1488 "renesas,rcar-gen2-xhci"; 1489 reg = <0 0xee000000 0 0xc00>; 1490 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 1491 clocks = <&cpg CPG_MOD 328>; 1492 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1493 resets = <&cpg 328>; 1494 phys = <&usb2 1>; 1495 phy-names = "usb"; 1496 status = "disabled"; 1497 }; 1498 1499 pci0: pci@ee090000 { 1500 compatible = "renesas,pci-r8a7791", 1501 "renesas,pci-rcar-gen2"; 1502 device_type = "pci"; 1503 reg = <0 0xee090000 0 0xc00>, 1504 <0 0xee080000 0 0x1100>; 1505 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1506 clocks = <&cpg CPG_MOD 703>; 1507 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1508 resets = <&cpg 703>; 1509 status = "disabled"; 1510 1511 bus-range = <0 0>; 1512 #address-cells = <3>; 1513 #size-cells = <2>; 1514 #interrupt-cells = <1>; 1515 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1516 interrupt-map-mask = <0xf800 0 0 0x7>; 1517 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1518 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1519 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1520 1521 usb@1,0 { 1522 reg = <0x800 0 0 0 0>; 1523 phys = <&usb0 0>; 1524 phy-names = "usb"; 1525 }; 1526 1527 usb@2,0 { 1528 reg = <0x1000 0 0 0 0>; 1529 phys = <&usb0 0>; 1530 phy-names = "usb"; 1531 }; 1532 }; 1533 1534 pci1: pci@ee0d0000 { 1535 compatible = "renesas,pci-r8a7791", 1536 "renesas,pci-rcar-gen2"; 1537 device_type = "pci"; 1538 reg = <0 0xee0d0000 0 0xc00>, 1539 <0 0xee0c0000 0 0x1100>; 1540 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1541 clocks = <&cpg CPG_MOD 703>; 1542 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1543 resets = <&cpg 703>; 1544 status = "disabled"; 1545 1546 bus-range = <1 1>; 1547 #address-cells = <3>; 1548 #size-cells = <2>; 1549 #interrupt-cells = <1>; 1550 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1551 interrupt-map-mask = <0xf800 0 0 0x7>; 1552 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1553 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1554 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1555 1556 usb@1,0 { 1557 reg = <0x10800 0 0 0 0>; 1558 phys = <&usb2 0>; 1559 phy-names = "usb"; 1560 }; 1561 1562 usb@2,0 { 1563 reg = <0x11000 0 0 0 0>; 1564 phys = <&usb2 0>; 1565 phy-names = "usb"; 1566 }; 1567 }; 1568 1569 sdhi0: mmc@ee100000 { 1570 compatible = "renesas,sdhi-r8a7791", 1571 "renesas,rcar-gen2-sdhi"; 1572 reg = <0 0xee100000 0 0x328>; 1573 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1574 clocks = <&cpg CPG_MOD 314>; 1575 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1576 <&dmac1 0xcd>, <&dmac1 0xce>; 1577 dma-names = "tx", "rx", "tx", "rx"; 1578 max-frequency = <195000000>; 1579 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1580 resets = <&cpg 314>; 1581 status = "disabled"; 1582 }; 1583 1584 sdhi1: mmc@ee140000 { 1585 compatible = "renesas,sdhi-r8a7791", 1586 "renesas,rcar-gen2-sdhi"; 1587 reg = <0 0xee140000 0 0x100>; 1588 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1589 clocks = <&cpg CPG_MOD 312>; 1590 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1591 <&dmac1 0xc1>, <&dmac1 0xc2>; 1592 dma-names = "tx", "rx", "tx", "rx"; 1593 max-frequency = <97500000>; 1594 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1595 resets = <&cpg 312>; 1596 status = "disabled"; 1597 }; 1598 1599 sdhi2: mmc@ee160000 { 1600 compatible = "renesas,sdhi-r8a7791", 1601 "renesas,rcar-gen2-sdhi"; 1602 reg = <0 0xee160000 0 0x100>; 1603 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1604 clocks = <&cpg CPG_MOD 311>; 1605 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1606 <&dmac1 0xd3>, <&dmac1 0xd4>; 1607 dma-names = "tx", "rx", "tx", "rx"; 1608 max-frequency = <97500000>; 1609 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1610 resets = <&cpg 311>; 1611 status = "disabled"; 1612 }; 1613 1614 mmcif0: mmc@ee200000 { 1615 compatible = "renesas,mmcif-r8a7791", 1616 "renesas,sh-mmcif"; 1617 reg = <0 0xee200000 0 0x80>; 1618 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1619 clocks = <&cpg CPG_MOD 315>; 1620 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1621 <&dmac1 0xd1>, <&dmac1 0xd2>; 1622 dma-names = "tx", "rx", "tx", "rx"; 1623 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1624 resets = <&cpg 315>; 1625 reg-io-width = <4>; 1626 status = "disabled"; 1627 max-frequency = <97500000>; 1628 }; 1629 1630 sata0: sata@ee300000 { 1631 compatible = "renesas,sata-r8a7791", 1632 "renesas,rcar-gen2-sata"; 1633 reg = <0 0xee300000 0 0x200000>; 1634 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 1635 clocks = <&cpg CPG_MOD 815>; 1636 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1637 resets = <&cpg 815>; 1638 status = "disabled"; 1639 }; 1640 1641 sata1: sata@ee500000 { 1642 compatible = "renesas,sata-r8a7791", 1643 "renesas,rcar-gen2-sata"; 1644 reg = <0 0xee500000 0 0x200000>; 1645 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 1646 clocks = <&cpg CPG_MOD 814>; 1647 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1648 resets = <&cpg 814>; 1649 status = "disabled"; 1650 }; 1651 1652 ether: ethernet@ee700000 { 1653 compatible = "renesas,ether-r8a7791", 1654 "renesas,rcar-gen2-ether"; 1655 reg = <0 0xee700000 0 0x400>; 1656 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1657 clocks = <&cpg CPG_MOD 813>; 1658 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1659 resets = <&cpg 813>; 1660 phy-mode = "rmii"; 1661 #address-cells = <1>; 1662 #size-cells = <0>; 1663 status = "disabled"; 1664 }; 1665 1666 gic: interrupt-controller@f1001000 { 1667 compatible = "arm,gic-400"; 1668 #interrupt-cells = <3>; 1669 #address-cells = <0>; 1670 interrupt-controller; 1671 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1672 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1673 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1674 clocks = <&cpg CPG_MOD 408>; 1675 clock-names = "clk"; 1676 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1677 resets = <&cpg 408>; 1678 }; 1679 1680 pciec: pcie@fe000000 { 1681 compatible = "renesas,pcie-r8a7791", 1682 "renesas,pcie-rcar-gen2"; 1683 reg = <0 0xfe000000 0 0x80000>; 1684 #address-cells = <3>; 1685 #size-cells = <2>; 1686 bus-range = <0x00 0xff>; 1687 device_type = "pci"; 1688 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1689 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1690 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1691 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1692 /* Map all possible DDR as inbound ranges */ 1693 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>, 1694 <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; 1695 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1696 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1697 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1698 #interrupt-cells = <1>; 1699 interrupt-map-mask = <0 0 0 0>; 1700 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1701 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1702 clock-names = "pcie", "pcie_bus"; 1703 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1704 resets = <&cpg 319>; 1705 status = "disabled"; 1706 }; 1707 1708 vsp@fe928000 { 1709 compatible = "renesas,vsp1"; 1710 reg = <0 0xfe928000 0 0x8000>; 1711 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1712 clocks = <&cpg CPG_MOD 131>; 1713 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1714 resets = <&cpg 131>; 1715 }; 1716 1717 vsp@fe930000 { 1718 compatible = "renesas,vsp1"; 1719 reg = <0 0xfe930000 0 0x8000>; 1720 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1721 clocks = <&cpg CPG_MOD 128>; 1722 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1723 resets = <&cpg 128>; 1724 }; 1725 1726 vsp@fe938000 { 1727 compatible = "renesas,vsp1"; 1728 reg = <0 0xfe938000 0 0x8000>; 1729 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 1730 clocks = <&cpg CPG_MOD 127>; 1731 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1732 resets = <&cpg 127>; 1733 }; 1734 1735 fdp1@fe940000 { 1736 compatible = "renesas,fdp1"; 1737 reg = <0 0xfe940000 0 0x2400>; 1738 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1739 clocks = <&cpg CPG_MOD 119>; 1740 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1741 resets = <&cpg 119>; 1742 }; 1743 1744 fdp1@fe944000 { 1745 compatible = "renesas,fdp1"; 1746 reg = <0 0xfe944000 0 0x2400>; 1747 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 1748 clocks = <&cpg CPG_MOD 118>; 1749 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1750 resets = <&cpg 118>; 1751 }; 1752 1753 jpu: jpeg-codec@fe980000 { 1754 compatible = "renesas,jpu-r8a7791", 1755 "renesas,rcar-gen2-jpu"; 1756 reg = <0 0xfe980000 0 0x10300>; 1757 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; 1758 clocks = <&cpg CPG_MOD 106>; 1759 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1760 resets = <&cpg 106>; 1761 }; 1762 1763 du: display@feb00000 { 1764 compatible = "renesas,du-r8a7791"; 1765 reg = <0 0xfeb00000 0 0x40000>; 1766 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1767 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1768 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1769 clock-names = "du.0", "du.1"; 1770 resets = <&cpg 724>; 1771 reset-names = "du.0"; 1772 status = "disabled"; 1773 1774 ports { 1775 #address-cells = <1>; 1776 #size-cells = <0>; 1777 1778 port@0 { 1779 reg = <0>; 1780 du_out_rgb: endpoint { 1781 }; 1782 }; 1783 port@1 { 1784 reg = <1>; 1785 du_out_lvds0: endpoint { 1786 remote-endpoint = <&lvds0_in>; 1787 }; 1788 }; 1789 }; 1790 }; 1791 1792 lvds0: lvds@feb90000 { 1793 compatible = "renesas,r8a7791-lvds"; 1794 reg = <0 0xfeb90000 0 0x1c>; 1795 clocks = <&cpg CPG_MOD 726>; 1796 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1797 resets = <&cpg 726>; 1798 status = "disabled"; 1799 1800 ports { 1801 #address-cells = <1>; 1802 #size-cells = <0>; 1803 1804 port@0 { 1805 reg = <0>; 1806 lvds0_in: endpoint { 1807 remote-endpoint = <&du_out_lvds0>; 1808 }; 1809 }; 1810 port@1 { 1811 reg = <1>; 1812 lvds0_out: endpoint { 1813 }; 1814 }; 1815 }; 1816 }; 1817 1818 prr: chipid@ff000044 { 1819 compatible = "renesas,prr"; 1820 reg = <0 0xff000044 0 4>; 1821 }; 1822 1823 cmt0: timer@ffca0000 { 1824 compatible = "renesas,r8a7791-cmt0", 1825 "renesas,rcar-gen2-cmt0"; 1826 reg = <0 0xffca0000 0 0x1004>; 1827 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1828 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1829 clocks = <&cpg CPG_MOD 124>; 1830 clock-names = "fck"; 1831 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1832 resets = <&cpg 124>; 1833 1834 status = "disabled"; 1835 }; 1836 1837 cmt1: timer@e6130000 { 1838 compatible = "renesas,r8a7791-cmt1", 1839 "renesas,rcar-gen2-cmt1"; 1840 reg = <0 0xe6130000 0 0x1004>; 1841 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1842 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1843 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1844 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1845 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1846 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1847 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1848 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1849 clocks = <&cpg CPG_MOD 329>; 1850 clock-names = "fck"; 1851 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1852 resets = <&cpg 329>; 1853 1854 status = "disabled"; 1855 }; 1856 }; 1857 1858 thermal-zones { 1859 cpu_thermal: cpu-thermal { 1860 polling-delay-passive = <0>; 1861 polling-delay = <0>; 1862 1863 thermal-sensors = <&thermal>; 1864 1865 trips { 1866 cpu-crit { 1867 temperature = <95000>; 1868 hysteresis = <0>; 1869 type = "critical"; 1870 }; 1871 }; 1872 cooling-maps { 1873 }; 1874 }; 1875 }; 1876 1877 timer { 1878 compatible = "arm,armv7-timer"; 1879 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1880 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1881 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1882 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1883 }; 1884 1885 /* External USB clock - can be overridden by the board */ 1886 usb_extal_clk: usb_extal { 1887 compatible = "fixed-clock"; 1888 #clock-cells = <0>; 1889 clock-frequency = <48000000>; 1890 }; 1891}; 1892