1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car H2 (R8A77900) SoC 4 * 5 * Copyright (C) 2015 Renesas Electronics Corporation 6 * Copyright (C) 2013-2014 Renesas Solutions Corp. 7 * Copyright (C) 2014 Cogent Embedded Inc. 8 */ 9 10#include <dt-bindings/clock/r8a7790-cpg-mssr.h> 11#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/power/r8a7790-sysc.h> 14 15/ { 16 compatible = "renesas,r8a7790"; 17 #address-cells = <2>; 18 #size-cells = <2>; 19 20 aliases { 21 i2c0 = &i2c0; 22 i2c1 = &i2c1; 23 i2c2 = &i2c2; 24 i2c3 = &i2c3; 25 i2c4 = &iic0; 26 i2c5 = &iic1; 27 i2c6 = &iic2; 28 i2c7 = &iic3; 29 spi0 = &qspi; 30 spi1 = &msiof0; 31 spi2 = &msiof1; 32 spi3 = &msiof2; 33 spi4 = &msiof3; 34 vin0 = &vin0; 35 vin1 = &vin1; 36 vin2 = &vin2; 37 vin3 = &vin3; 38 }; 39 40 /* 41 * The external audio clocks are configured as 0 Hz fixed frequency 42 * clocks by default. 43 * Boards that provide audio clocks should override them. 44 */ 45 audio_clk_a: audio_clk_a { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 audio_clk_b: audio_clk_b { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 audio_clk_c: audio_clk_c { 56 compatible = "fixed-clock"; 57 #clock-cells = <0>; 58 clock-frequency = <0>; 59 }; 60 61 /* External CAN clock */ 62 can_clk: can { 63 compatible = "fixed-clock"; 64 #clock-cells = <0>; 65 /* This value must be overridden by the board. */ 66 clock-frequency = <0>; 67 }; 68 69 cpus { 70 #address-cells = <1>; 71 #size-cells = <0>; 72 73 cpu0: cpu@0 { 74 device_type = "cpu"; 75 compatible = "arm,cortex-a15"; 76 reg = <0>; 77 clock-frequency = <1300000000>; 78 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; 79 power-domains = <&sysc R8A7790_PD_CA15_CPU0>; 80 enable-method = "renesas,apmu"; 81 next-level-cache = <&L2_CA15>; 82 capacity-dmips-mhz = <1024>; 83 voltage-tolerance = <1>; /* 1% */ 84 clock-latency = <300000>; /* 300 us */ 85 86 /* kHz - uV - OPPs unknown yet */ 87 operating-points = <1400000 1000000>, 88 <1225000 1000000>, 89 <1050000 1000000>, 90 < 875000 1000000>, 91 < 700000 1000000>, 92 < 350000 1000000>; 93 }; 94 95 cpu1: cpu@1 { 96 device_type = "cpu"; 97 compatible = "arm,cortex-a15"; 98 reg = <1>; 99 clock-frequency = <1300000000>; 100 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; 101 power-domains = <&sysc R8A7790_PD_CA15_CPU1>; 102 enable-method = "renesas,apmu"; 103 next-level-cache = <&L2_CA15>; 104 capacity-dmips-mhz = <1024>; 105 voltage-tolerance = <1>; /* 1% */ 106 clock-latency = <300000>; /* 300 us */ 107 108 /* kHz - uV - OPPs unknown yet */ 109 operating-points = <1400000 1000000>, 110 <1225000 1000000>, 111 <1050000 1000000>, 112 < 875000 1000000>, 113 < 700000 1000000>, 114 < 350000 1000000>; 115 }; 116 117 cpu2: cpu@2 { 118 device_type = "cpu"; 119 compatible = "arm,cortex-a15"; 120 reg = <2>; 121 clock-frequency = <1300000000>; 122 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; 123 power-domains = <&sysc R8A7790_PD_CA15_CPU2>; 124 enable-method = "renesas,apmu"; 125 next-level-cache = <&L2_CA15>; 126 capacity-dmips-mhz = <1024>; 127 voltage-tolerance = <1>; /* 1% */ 128 clock-latency = <300000>; /* 300 us */ 129 130 /* kHz - uV - OPPs unknown yet */ 131 operating-points = <1400000 1000000>, 132 <1225000 1000000>, 133 <1050000 1000000>, 134 < 875000 1000000>, 135 < 700000 1000000>, 136 < 350000 1000000>; 137 }; 138 139 cpu3: cpu@3 { 140 device_type = "cpu"; 141 compatible = "arm,cortex-a15"; 142 reg = <3>; 143 clock-frequency = <1300000000>; 144 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; 145 power-domains = <&sysc R8A7790_PD_CA15_CPU3>; 146 enable-method = "renesas,apmu"; 147 next-level-cache = <&L2_CA15>; 148 capacity-dmips-mhz = <1024>; 149 voltage-tolerance = <1>; /* 1% */ 150 clock-latency = <300000>; /* 300 us */ 151 152 /* kHz - uV - OPPs unknown yet */ 153 operating-points = <1400000 1000000>, 154 <1225000 1000000>, 155 <1050000 1000000>, 156 < 875000 1000000>, 157 < 700000 1000000>, 158 < 350000 1000000>; 159 }; 160 161 cpu4: cpu@100 { 162 device_type = "cpu"; 163 compatible = "arm,cortex-a7"; 164 reg = <0x100>; 165 clock-frequency = <780000000>; 166 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; 167 power-domains = <&sysc R8A7790_PD_CA7_CPU0>; 168 enable-method = "renesas,apmu"; 169 next-level-cache = <&L2_CA7>; 170 capacity-dmips-mhz = <539>; 171 }; 172 173 cpu5: cpu@101 { 174 device_type = "cpu"; 175 compatible = "arm,cortex-a7"; 176 reg = <0x101>; 177 clock-frequency = <780000000>; 178 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; 179 power-domains = <&sysc R8A7790_PD_CA7_CPU1>; 180 enable-method = "renesas,apmu"; 181 next-level-cache = <&L2_CA7>; 182 capacity-dmips-mhz = <539>; 183 }; 184 185 cpu6: cpu@102 { 186 device_type = "cpu"; 187 compatible = "arm,cortex-a7"; 188 reg = <0x102>; 189 clock-frequency = <780000000>; 190 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; 191 power-domains = <&sysc R8A7790_PD_CA7_CPU2>; 192 enable-method = "renesas,apmu"; 193 next-level-cache = <&L2_CA7>; 194 capacity-dmips-mhz = <539>; 195 }; 196 197 cpu7: cpu@103 { 198 device_type = "cpu"; 199 compatible = "arm,cortex-a7"; 200 reg = <0x103>; 201 clock-frequency = <780000000>; 202 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; 203 power-domains = <&sysc R8A7790_PD_CA7_CPU3>; 204 enable-method = "renesas,apmu"; 205 next-level-cache = <&L2_CA7>; 206 capacity-dmips-mhz = <539>; 207 }; 208 209 L2_CA15: cache-controller-0 { 210 compatible = "cache"; 211 power-domains = <&sysc R8A7790_PD_CA15_SCU>; 212 cache-unified; 213 cache-level = <2>; 214 }; 215 216 L2_CA7: cache-controller-1 { 217 compatible = "cache"; 218 power-domains = <&sysc R8A7790_PD_CA7_SCU>; 219 cache-unified; 220 cache-level = <2>; 221 }; 222 }; 223 224 /* External root clock */ 225 extal_clk: extal { 226 compatible = "fixed-clock"; 227 #clock-cells = <0>; 228 /* This value must be overridden by the board. */ 229 clock-frequency = <0>; 230 }; 231 232 /* External PCIe clock - can be overridden by the board */ 233 pcie_bus_clk: pcie_bus { 234 compatible = "fixed-clock"; 235 #clock-cells = <0>; 236 clock-frequency = <0>; 237 }; 238 239 pmu-0 { 240 compatible = "arm,cortex-a15-pmu"; 241 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 242 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, 243 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, 244 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 245 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 246 }; 247 248 pmu-1 { 249 compatible = "arm,cortex-a7-pmu"; 250 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 251 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 252 <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 253 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 254 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; 255 }; 256 257 /* External SCIF clock */ 258 scif_clk: scif { 259 compatible = "fixed-clock"; 260 #clock-cells = <0>; 261 /* This value must be overridden by the board. */ 262 clock-frequency = <0>; 263 }; 264 265 soc { 266 compatible = "simple-bus"; 267 interrupt-parent = <&gic>; 268 269 #address-cells = <2>; 270 #size-cells = <2>; 271 ranges; 272 273 rwdt: watchdog@e6020000 { 274 compatible = "renesas,r8a7790-wdt", 275 "renesas,rcar-gen2-wdt"; 276 reg = <0 0xe6020000 0 0x0c>; 277 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 278 clocks = <&cpg CPG_MOD 402>; 279 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 280 resets = <&cpg 402>; 281 status = "disabled"; 282 }; 283 284 gpio0: gpio@e6050000 { 285 compatible = "renesas,gpio-r8a7790", 286 "renesas,rcar-gen2-gpio"; 287 reg = <0 0xe6050000 0 0x50>; 288 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 289 #gpio-cells = <2>; 290 gpio-controller; 291 gpio-ranges = <&pfc 0 0 32>; 292 #interrupt-cells = <2>; 293 interrupt-controller; 294 clocks = <&cpg CPG_MOD 912>; 295 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 296 resets = <&cpg 912>; 297 }; 298 299 gpio1: gpio@e6051000 { 300 compatible = "renesas,gpio-r8a7790", 301 "renesas,rcar-gen2-gpio"; 302 reg = <0 0xe6051000 0 0x50>; 303 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 304 #gpio-cells = <2>; 305 gpio-controller; 306 gpio-ranges = <&pfc 0 32 30>; 307 #interrupt-cells = <2>; 308 interrupt-controller; 309 clocks = <&cpg CPG_MOD 911>; 310 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 311 resets = <&cpg 911>; 312 }; 313 314 gpio2: gpio@e6052000 { 315 compatible = "renesas,gpio-r8a7790", 316 "renesas,rcar-gen2-gpio"; 317 reg = <0 0xe6052000 0 0x50>; 318 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 319 #gpio-cells = <2>; 320 gpio-controller; 321 gpio-ranges = <&pfc 0 64 30>; 322 #interrupt-cells = <2>; 323 interrupt-controller; 324 clocks = <&cpg CPG_MOD 910>; 325 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 326 resets = <&cpg 910>; 327 }; 328 329 gpio3: gpio@e6053000 { 330 compatible = "renesas,gpio-r8a7790", 331 "renesas,rcar-gen2-gpio"; 332 reg = <0 0xe6053000 0 0x50>; 333 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 334 #gpio-cells = <2>; 335 gpio-controller; 336 gpio-ranges = <&pfc 0 96 32>; 337 #interrupt-cells = <2>; 338 interrupt-controller; 339 clocks = <&cpg CPG_MOD 909>; 340 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 341 resets = <&cpg 909>; 342 }; 343 344 gpio4: gpio@e6054000 { 345 compatible = "renesas,gpio-r8a7790", 346 "renesas,rcar-gen2-gpio"; 347 reg = <0 0xe6054000 0 0x50>; 348 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 349 #gpio-cells = <2>; 350 gpio-controller; 351 gpio-ranges = <&pfc 0 128 32>; 352 #interrupt-cells = <2>; 353 interrupt-controller; 354 clocks = <&cpg CPG_MOD 908>; 355 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 356 resets = <&cpg 908>; 357 }; 358 359 gpio5: gpio@e6055000 { 360 compatible = "renesas,gpio-r8a7790", 361 "renesas,rcar-gen2-gpio"; 362 reg = <0 0xe6055000 0 0x50>; 363 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 364 #gpio-cells = <2>; 365 gpio-controller; 366 gpio-ranges = <&pfc 0 160 32>; 367 #interrupt-cells = <2>; 368 interrupt-controller; 369 clocks = <&cpg CPG_MOD 907>; 370 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 371 resets = <&cpg 907>; 372 }; 373 374 pfc: pinctrl@e6060000 { 375 compatible = "renesas,pfc-r8a7790"; 376 reg = <0 0xe6060000 0 0x250>; 377 }; 378 379 tpu: pwm@e60f0000 { 380 compatible = "renesas,tpu-r8a7790", "renesas,tpu"; 381 reg = <0 0xe60f0000 0 0x148>; 382 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 383 clocks = <&cpg CPG_MOD 304>; 384 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 385 resets = <&cpg 304>; 386 #pwm-cells = <3>; 387 status = "disabled"; 388 }; 389 390 cpg: clock-controller@e6150000 { 391 compatible = "renesas,r8a7790-cpg-mssr"; 392 reg = <0 0xe6150000 0 0x1000>; 393 clocks = <&extal_clk>, <&usb_extal_clk>; 394 clock-names = "extal", "usb_extal"; 395 #clock-cells = <2>; 396 #power-domain-cells = <0>; 397 #reset-cells = <1>; 398 }; 399 400 apmu@e6151000 { 401 compatible = "renesas,r8a7790-apmu", "renesas,apmu"; 402 reg = <0 0xe6151000 0 0x188>; 403 cpus = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; 404 }; 405 406 apmu@e6152000 { 407 compatible = "renesas,r8a7790-apmu", "renesas,apmu"; 408 reg = <0 0xe6152000 0 0x188>; 409 cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 410 }; 411 412 rst: reset-controller@e6160000 { 413 compatible = "renesas,r8a7790-rst"; 414 reg = <0 0xe6160000 0 0x0100>; 415 }; 416 417 sysc: system-controller@e6180000 { 418 compatible = "renesas,r8a7790-sysc"; 419 reg = <0 0xe6180000 0 0x0200>; 420 #power-domain-cells = <1>; 421 }; 422 423 irqc0: interrupt-controller@e61c0000 { 424 compatible = "renesas,irqc-r8a7790", "renesas,irqc"; 425 #interrupt-cells = <2>; 426 interrupt-controller; 427 reg = <0 0xe61c0000 0 0x200>; 428 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 429 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 430 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 431 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 432 clocks = <&cpg CPG_MOD 407>; 433 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 434 resets = <&cpg 407>; 435 }; 436 437 thermal: thermal@e61f0000 { 438 compatible = "renesas,thermal-r8a7790", 439 "renesas,rcar-gen2-thermal", 440 "renesas,rcar-thermal"; 441 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; 442 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 443 clocks = <&cpg CPG_MOD 522>; 444 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 445 resets = <&cpg 522>; 446 #thermal-sensor-cells = <0>; 447 }; 448 449 ipmmu_sy0: iommu@e6280000 { 450 compatible = "renesas,ipmmu-r8a7790", 451 "renesas,ipmmu-vmsa"; 452 reg = <0 0xe6280000 0 0x1000>; 453 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 454 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 455 #iommu-cells = <1>; 456 status = "disabled"; 457 }; 458 459 ipmmu_sy1: iommu@e6290000 { 460 compatible = "renesas,ipmmu-r8a7790", 461 "renesas,ipmmu-vmsa"; 462 reg = <0 0xe6290000 0 0x1000>; 463 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 464 #iommu-cells = <1>; 465 status = "disabled"; 466 }; 467 468 ipmmu_ds: iommu@e6740000 { 469 compatible = "renesas,ipmmu-r8a7790", 470 "renesas,ipmmu-vmsa"; 471 reg = <0 0xe6740000 0 0x1000>; 472 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 473 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 474 #iommu-cells = <1>; 475 status = "disabled"; 476 }; 477 478 ipmmu_mp: iommu@ec680000 { 479 compatible = "renesas,ipmmu-r8a7790", 480 "renesas,ipmmu-vmsa"; 481 reg = <0 0xec680000 0 0x1000>; 482 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 483 #iommu-cells = <1>; 484 status = "disabled"; 485 }; 486 487 ipmmu_mx: iommu@fe951000 { 488 compatible = "renesas,ipmmu-r8a7790", 489 "renesas,ipmmu-vmsa"; 490 reg = <0 0xfe951000 0 0x1000>; 491 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 492 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 493 #iommu-cells = <1>; 494 status = "disabled"; 495 }; 496 497 ipmmu_rt: iommu@ffc80000 { 498 compatible = "renesas,ipmmu-r8a7790", 499 "renesas,ipmmu-vmsa"; 500 reg = <0 0xffc80000 0 0x1000>; 501 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 502 #iommu-cells = <1>; 503 status = "disabled"; 504 }; 505 506 icram0: sram@e63a0000 { 507 compatible = "mmio-sram"; 508 reg = <0 0xe63a0000 0 0x12000>; 509 #address-cells = <1>; 510 #size-cells = <1>; 511 ranges = <0 0 0xe63a0000 0x12000>; 512 }; 513 514 icram1: sram@e63c0000 { 515 compatible = "mmio-sram"; 516 reg = <0 0xe63c0000 0 0x1000>; 517 #address-cells = <1>; 518 #size-cells = <1>; 519 ranges = <0 0 0xe63c0000 0x1000>; 520 521 smp-sram@0 { 522 compatible = "renesas,smp-sram"; 523 reg = <0 0x100>; 524 }; 525 }; 526 527 i2c0: i2c@e6508000 { 528 #address-cells = <1>; 529 #size-cells = <0>; 530 compatible = "renesas,i2c-r8a7790", 531 "renesas,rcar-gen2-i2c"; 532 reg = <0 0xe6508000 0 0x40>; 533 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 534 clocks = <&cpg CPG_MOD 931>; 535 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 536 resets = <&cpg 931>; 537 i2c-scl-internal-delay-ns = <110>; 538 status = "disabled"; 539 }; 540 541 i2c1: i2c@e6518000 { 542 #address-cells = <1>; 543 #size-cells = <0>; 544 compatible = "renesas,i2c-r8a7790", 545 "renesas,rcar-gen2-i2c"; 546 reg = <0 0xe6518000 0 0x40>; 547 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 548 clocks = <&cpg CPG_MOD 930>; 549 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 550 resets = <&cpg 930>; 551 i2c-scl-internal-delay-ns = <6>; 552 status = "disabled"; 553 }; 554 555 i2c2: i2c@e6530000 { 556 #address-cells = <1>; 557 #size-cells = <0>; 558 compatible = "renesas,i2c-r8a7790", 559 "renesas,rcar-gen2-i2c"; 560 reg = <0 0xe6530000 0 0x40>; 561 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 562 clocks = <&cpg CPG_MOD 929>; 563 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 564 resets = <&cpg 929>; 565 i2c-scl-internal-delay-ns = <6>; 566 status = "disabled"; 567 }; 568 569 i2c3: i2c@e6540000 { 570 #address-cells = <1>; 571 #size-cells = <0>; 572 compatible = "renesas,i2c-r8a7790", 573 "renesas,rcar-gen2-i2c"; 574 reg = <0 0xe6540000 0 0x40>; 575 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 576 clocks = <&cpg CPG_MOD 928>; 577 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 578 resets = <&cpg 928>; 579 i2c-scl-internal-delay-ns = <110>; 580 status = "disabled"; 581 }; 582 583 iic0: i2c@e6500000 { 584 #address-cells = <1>; 585 #size-cells = <0>; 586 compatible = "renesas,iic-r8a7790", 587 "renesas,rcar-gen2-iic", 588 "renesas,rmobile-iic"; 589 reg = <0 0xe6500000 0 0x425>; 590 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 591 clocks = <&cpg CPG_MOD 318>; 592 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 593 <&dmac1 0x61>, <&dmac1 0x62>; 594 dma-names = "tx", "rx", "tx", "rx"; 595 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 596 resets = <&cpg 318>; 597 status = "disabled"; 598 }; 599 600 iic1: i2c@e6510000 { 601 #address-cells = <1>; 602 #size-cells = <0>; 603 compatible = "renesas,iic-r8a7790", 604 "renesas,rcar-gen2-iic", 605 "renesas,rmobile-iic"; 606 reg = <0 0xe6510000 0 0x425>; 607 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 608 clocks = <&cpg CPG_MOD 323>; 609 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 610 <&dmac1 0x65>, <&dmac1 0x66>; 611 dma-names = "tx", "rx", "tx", "rx"; 612 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 613 resets = <&cpg 323>; 614 status = "disabled"; 615 }; 616 617 iic2: i2c@e6520000 { 618 #address-cells = <1>; 619 #size-cells = <0>; 620 compatible = "renesas,iic-r8a7790", 621 "renesas,rcar-gen2-iic", 622 "renesas,rmobile-iic"; 623 reg = <0 0xe6520000 0 0x425>; 624 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 625 clocks = <&cpg CPG_MOD 300>; 626 dmas = <&dmac0 0x69>, <&dmac0 0x6a>, 627 <&dmac1 0x69>, <&dmac1 0x6a>; 628 dma-names = "tx", "rx", "tx", "rx"; 629 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 630 resets = <&cpg 300>; 631 status = "disabled"; 632 }; 633 634 iic3: i2c@e60b0000 { 635 #address-cells = <1>; 636 #size-cells = <0>; 637 compatible = "renesas,iic-r8a7790", 638 "renesas,rcar-gen2-iic", 639 "renesas,rmobile-iic"; 640 reg = <0 0xe60b0000 0 0x425>; 641 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 642 clocks = <&cpg CPG_MOD 926>; 643 dmas = <&dmac0 0x77>, <&dmac0 0x78>, 644 <&dmac1 0x77>, <&dmac1 0x78>; 645 dma-names = "tx", "rx", "tx", "rx"; 646 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 647 resets = <&cpg 926>; 648 status = "disabled"; 649 }; 650 651 hsusb: usb@e6590000 { 652 compatible = "renesas,usbhs-r8a7790", 653 "renesas,rcar-gen2-usbhs"; 654 reg = <0 0xe6590000 0 0x100>; 655 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 656 clocks = <&cpg CPG_MOD 704>; 657 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 658 <&usb_dmac1 0>, <&usb_dmac1 1>; 659 dma-names = "ch0", "ch1", "ch2", "ch3"; 660 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 661 resets = <&cpg 704>; 662 renesas,buswait = <4>; 663 phys = <&usb0 1>; 664 phy-names = "usb"; 665 status = "disabled"; 666 }; 667 668 usbphy: usb-phy-controller@e6590100 { 669 compatible = "renesas,usb-phy-r8a7790", 670 "renesas,rcar-gen2-usb-phy"; 671 reg = <0 0xe6590100 0 0x100>; 672 #address-cells = <1>; 673 #size-cells = <0>; 674 clocks = <&cpg CPG_MOD 704>; 675 clock-names = "usbhs"; 676 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 677 resets = <&cpg 704>; 678 status = "disabled"; 679 680 usb0: usb-phy@0 { 681 reg = <0>; 682 #phy-cells = <1>; 683 }; 684 usb2: usb-phy@2 { 685 reg = <2>; 686 #phy-cells = <1>; 687 }; 688 }; 689 690 usb_dmac0: dma-controller@e65a0000 { 691 compatible = "renesas,r8a7790-usb-dmac", 692 "renesas,usb-dmac"; 693 reg = <0 0xe65a0000 0 0x100>; 694 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 695 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 696 interrupt-names = "ch0", "ch1"; 697 clocks = <&cpg CPG_MOD 330>; 698 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 699 resets = <&cpg 330>; 700 #dma-cells = <1>; 701 dma-channels = <2>; 702 }; 703 704 usb_dmac1: dma-controller@e65b0000 { 705 compatible = "renesas,r8a7790-usb-dmac", 706 "renesas,usb-dmac"; 707 reg = <0 0xe65b0000 0 0x100>; 708 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 709 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 710 interrupt-names = "ch0", "ch1"; 711 clocks = <&cpg CPG_MOD 331>; 712 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 713 resets = <&cpg 331>; 714 #dma-cells = <1>; 715 dma-channels = <2>; 716 }; 717 718 dmac0: dma-controller@e6700000 { 719 compatible = "renesas,dmac-r8a7790", 720 "renesas,rcar-dmac"; 721 reg = <0 0xe6700000 0 0x20000>; 722 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 723 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 724 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 725 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 726 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 727 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 728 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 729 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 730 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 731 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 732 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 733 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 734 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 735 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 736 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 737 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 738 interrupt-names = "error", 739 "ch0", "ch1", "ch2", "ch3", 740 "ch4", "ch5", "ch6", "ch7", 741 "ch8", "ch9", "ch10", "ch11", 742 "ch12", "ch13", "ch14"; 743 clocks = <&cpg CPG_MOD 219>; 744 clock-names = "fck"; 745 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 746 resets = <&cpg 219>; 747 #dma-cells = <1>; 748 dma-channels = <15>; 749 }; 750 751 dmac1: dma-controller@e6720000 { 752 compatible = "renesas,dmac-r8a7790", 753 "renesas,rcar-dmac"; 754 reg = <0 0xe6720000 0 0x20000>; 755 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 756 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 757 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 758 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 759 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 760 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 761 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 762 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 763 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 765 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 771 interrupt-names = "error", 772 "ch0", "ch1", "ch2", "ch3", 773 "ch4", "ch5", "ch6", "ch7", 774 "ch8", "ch9", "ch10", "ch11", 775 "ch12", "ch13", "ch14"; 776 clocks = <&cpg CPG_MOD 218>; 777 clock-names = "fck"; 778 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 779 resets = <&cpg 218>; 780 #dma-cells = <1>; 781 dma-channels = <15>; 782 }; 783 784 avb: ethernet@e6800000 { 785 compatible = "renesas,etheravb-r8a7790", 786 "renesas,etheravb-rcar-gen2"; 787 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 788 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 789 clocks = <&cpg CPG_MOD 812>; 790 clock-names = "fck"; 791 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 792 resets = <&cpg 812>; 793 #address-cells = <1>; 794 #size-cells = <0>; 795 status = "disabled"; 796 }; 797 798 qspi: spi@e6b10000 { 799 compatible = "renesas,qspi-r8a7790", "renesas,qspi"; 800 reg = <0 0xe6b10000 0 0x2c>; 801 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 802 clocks = <&cpg CPG_MOD 917>; 803 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 804 <&dmac1 0x17>, <&dmac1 0x18>; 805 dma-names = "tx", "rx", "tx", "rx"; 806 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 807 resets = <&cpg 917>; 808 num-cs = <1>; 809 #address-cells = <1>; 810 #size-cells = <0>; 811 status = "disabled"; 812 }; 813 814 scifa0: serial@e6c40000 { 815 compatible = "renesas,scifa-r8a7790", 816 "renesas,rcar-gen2-scifa", "renesas,scifa"; 817 reg = <0 0xe6c40000 0 64>; 818 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 819 clocks = <&cpg CPG_MOD 204>; 820 clock-names = "fck"; 821 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 822 <&dmac1 0x21>, <&dmac1 0x22>; 823 dma-names = "tx", "rx", "tx", "rx"; 824 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 825 resets = <&cpg 204>; 826 status = "disabled"; 827 }; 828 829 scifa1: serial@e6c50000 { 830 compatible = "renesas,scifa-r8a7790", 831 "renesas,rcar-gen2-scifa", "renesas,scifa"; 832 reg = <0 0xe6c50000 0 64>; 833 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 834 clocks = <&cpg CPG_MOD 203>; 835 clock-names = "fck"; 836 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 837 <&dmac1 0x25>, <&dmac1 0x26>; 838 dma-names = "tx", "rx", "tx", "rx"; 839 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 840 resets = <&cpg 203>; 841 status = "disabled"; 842 }; 843 844 scifa2: serial@e6c60000 { 845 compatible = "renesas,scifa-r8a7790", 846 "renesas,rcar-gen2-scifa", "renesas,scifa"; 847 reg = <0 0xe6c60000 0 64>; 848 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 849 clocks = <&cpg CPG_MOD 202>; 850 clock-names = "fck"; 851 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 852 <&dmac1 0x27>, <&dmac1 0x28>; 853 dma-names = "tx", "rx", "tx", "rx"; 854 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 855 resets = <&cpg 202>; 856 status = "disabled"; 857 }; 858 859 scifb0: serial@e6c20000 { 860 compatible = "renesas,scifb-r8a7790", 861 "renesas,rcar-gen2-scifb", "renesas,scifb"; 862 reg = <0 0xe6c20000 0 0x100>; 863 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 864 clocks = <&cpg CPG_MOD 206>; 865 clock-names = "fck"; 866 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 867 <&dmac1 0x3d>, <&dmac1 0x3e>; 868 dma-names = "tx", "rx", "tx", "rx"; 869 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 870 resets = <&cpg 206>; 871 status = "disabled"; 872 }; 873 874 scifb1: serial@e6c30000 { 875 compatible = "renesas,scifb-r8a7790", 876 "renesas,rcar-gen2-scifb", "renesas,scifb"; 877 reg = <0 0xe6c30000 0 0x100>; 878 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 879 clocks = <&cpg CPG_MOD 207>; 880 clock-names = "fck"; 881 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 882 <&dmac1 0x19>, <&dmac1 0x1a>; 883 dma-names = "tx", "rx", "tx", "rx"; 884 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 885 resets = <&cpg 207>; 886 status = "disabled"; 887 }; 888 889 scifb2: serial@e6ce0000 { 890 compatible = "renesas,scifb-r8a7790", 891 "renesas,rcar-gen2-scifb", "renesas,scifb"; 892 reg = <0 0xe6ce0000 0 0x100>; 893 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 894 clocks = <&cpg CPG_MOD 216>; 895 clock-names = "fck"; 896 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 897 <&dmac1 0x1d>, <&dmac1 0x1e>; 898 dma-names = "tx", "rx", "tx", "rx"; 899 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 900 resets = <&cpg 216>; 901 status = "disabled"; 902 }; 903 904 scif0: serial@e6e60000 { 905 compatible = "renesas,scif-r8a7790", 906 "renesas,rcar-gen2-scif", 907 "renesas,scif"; 908 reg = <0 0xe6e60000 0 64>; 909 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 910 clocks = <&cpg CPG_MOD 721>, 911 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; 912 clock-names = "fck", "brg_int", "scif_clk"; 913 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 914 <&dmac1 0x29>, <&dmac1 0x2a>; 915 dma-names = "tx", "rx", "tx", "rx"; 916 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 917 resets = <&cpg 721>; 918 status = "disabled"; 919 }; 920 921 scif1: serial@e6e68000 { 922 compatible = "renesas,scif-r8a7790", 923 "renesas,rcar-gen2-scif", 924 "renesas,scif"; 925 reg = <0 0xe6e68000 0 64>; 926 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 927 clocks = <&cpg CPG_MOD 720>, 928 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; 929 clock-names = "fck", "brg_int", "scif_clk"; 930 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 931 <&dmac1 0x2d>, <&dmac1 0x2e>; 932 dma-names = "tx", "rx", "tx", "rx"; 933 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 934 resets = <&cpg 720>; 935 status = "disabled"; 936 }; 937 938 scif2: serial@e6e56000 { 939 compatible = "renesas,scif-r8a7790", 940 "renesas,rcar-gen2-scif", 941 "renesas,scif"; 942 reg = <0 0xe6e56000 0 64>; 943 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 944 clocks = <&cpg CPG_MOD 310>, 945 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; 946 clock-names = "fck", "brg_int", "scif_clk"; 947 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 948 <&dmac1 0x2b>, <&dmac1 0x2c>; 949 dma-names = "tx", "rx", "tx", "rx"; 950 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 951 resets = <&cpg 310>; 952 status = "disabled"; 953 }; 954 955 hscif0: serial@e62c0000 { 956 compatible = "renesas,hscif-r8a7790", 957 "renesas,rcar-gen2-hscif", "renesas,hscif"; 958 reg = <0 0xe62c0000 0 96>; 959 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 960 clocks = <&cpg CPG_MOD 717>, 961 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; 962 clock-names = "fck", "brg_int", "scif_clk"; 963 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 964 <&dmac1 0x39>, <&dmac1 0x3a>; 965 dma-names = "tx", "rx", "tx", "rx"; 966 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 967 resets = <&cpg 717>; 968 status = "disabled"; 969 }; 970 971 hscif1: serial@e62c8000 { 972 compatible = "renesas,hscif-r8a7790", 973 "renesas,rcar-gen2-hscif", "renesas,hscif"; 974 reg = <0 0xe62c8000 0 96>; 975 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 976 clocks = <&cpg CPG_MOD 716>, 977 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; 978 clock-names = "fck", "brg_int", "scif_clk"; 979 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 980 <&dmac1 0x4d>, <&dmac1 0x4e>; 981 dma-names = "tx", "rx", "tx", "rx"; 982 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 983 resets = <&cpg 716>; 984 status = "disabled"; 985 }; 986 987 msiof0: spi@e6e20000 { 988 compatible = "renesas,msiof-r8a7790", 989 "renesas,rcar-gen2-msiof"; 990 reg = <0 0xe6e20000 0 0x0064>; 991 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 992 clocks = <&cpg CPG_MOD 0>; 993 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 994 <&dmac1 0x51>, <&dmac1 0x52>; 995 dma-names = "tx", "rx", "tx", "rx"; 996 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 997 resets = <&cpg 0>; 998 #address-cells = <1>; 999 #size-cells = <0>; 1000 status = "disabled"; 1001 }; 1002 1003 msiof1: spi@e6e10000 { 1004 compatible = "renesas,msiof-r8a7790", 1005 "renesas,rcar-gen2-msiof"; 1006 reg = <0 0xe6e10000 0 0x0064>; 1007 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1008 clocks = <&cpg CPG_MOD 208>; 1009 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 1010 <&dmac1 0x55>, <&dmac1 0x56>; 1011 dma-names = "tx", "rx", "tx", "rx"; 1012 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1013 resets = <&cpg 208>; 1014 #address-cells = <1>; 1015 #size-cells = <0>; 1016 status = "disabled"; 1017 }; 1018 1019 msiof2: spi@e6e00000 { 1020 compatible = "renesas,msiof-r8a7790", 1021 "renesas,rcar-gen2-msiof"; 1022 reg = <0 0xe6e00000 0 0x0064>; 1023 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1024 clocks = <&cpg CPG_MOD 205>; 1025 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 1026 <&dmac1 0x41>, <&dmac1 0x42>; 1027 dma-names = "tx", "rx", "tx", "rx"; 1028 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1029 resets = <&cpg 205>; 1030 #address-cells = <1>; 1031 #size-cells = <0>; 1032 status = "disabled"; 1033 }; 1034 1035 msiof3: spi@e6c90000 { 1036 compatible = "renesas,msiof-r8a7790", 1037 "renesas,rcar-gen2-msiof"; 1038 reg = <0 0xe6c90000 0 0x0064>; 1039 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1040 clocks = <&cpg CPG_MOD 215>; 1041 dmas = <&dmac0 0x45>, <&dmac0 0x46>, 1042 <&dmac1 0x45>, <&dmac1 0x46>; 1043 dma-names = "tx", "rx", "tx", "rx"; 1044 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1045 resets = <&cpg 215>; 1046 #address-cells = <1>; 1047 #size-cells = <0>; 1048 status = "disabled"; 1049 }; 1050 1051 pwm0: pwm@e6e30000 { 1052 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1053 reg = <0 0xe6e30000 0 0x8>; 1054 clocks = <&cpg CPG_MOD 523>; 1055 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1056 resets = <&cpg 523>; 1057 #pwm-cells = <2>; 1058 status = "disabled"; 1059 }; 1060 1061 pwm1: pwm@e6e31000 { 1062 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1063 reg = <0 0xe6e31000 0 0x8>; 1064 clocks = <&cpg CPG_MOD 523>; 1065 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1066 resets = <&cpg 523>; 1067 #pwm-cells = <2>; 1068 status = "disabled"; 1069 }; 1070 1071 pwm2: pwm@e6e32000 { 1072 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1073 reg = <0 0xe6e32000 0 0x8>; 1074 clocks = <&cpg CPG_MOD 523>; 1075 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1076 resets = <&cpg 523>; 1077 #pwm-cells = <2>; 1078 status = "disabled"; 1079 }; 1080 1081 pwm3: pwm@e6e33000 { 1082 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1083 reg = <0 0xe6e33000 0 0x8>; 1084 clocks = <&cpg CPG_MOD 523>; 1085 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1086 resets = <&cpg 523>; 1087 #pwm-cells = <2>; 1088 status = "disabled"; 1089 }; 1090 1091 pwm4: pwm@e6e34000 { 1092 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1093 reg = <0 0xe6e34000 0 0x8>; 1094 clocks = <&cpg CPG_MOD 523>; 1095 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1096 resets = <&cpg 523>; 1097 #pwm-cells = <2>; 1098 status = "disabled"; 1099 }; 1100 1101 pwm5: pwm@e6e35000 { 1102 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1103 reg = <0 0xe6e35000 0 0x8>; 1104 clocks = <&cpg CPG_MOD 523>; 1105 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1106 resets = <&cpg 523>; 1107 #pwm-cells = <2>; 1108 status = "disabled"; 1109 }; 1110 1111 pwm6: pwm@e6e36000 { 1112 compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; 1113 reg = <0 0xe6e36000 0 0x8>; 1114 clocks = <&cpg CPG_MOD 523>; 1115 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1116 resets = <&cpg 523>; 1117 #pwm-cells = <2>; 1118 status = "disabled"; 1119 }; 1120 1121 can0: can@e6e80000 { 1122 compatible = "renesas,can-r8a7790", 1123 "renesas,rcar-gen2-can"; 1124 reg = <0 0xe6e80000 0 0x1000>; 1125 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1126 clocks = <&cpg CPG_MOD 916>, 1127 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>; 1128 clock-names = "clkp1", "clkp2", "can_clk"; 1129 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1130 resets = <&cpg 916>; 1131 status = "disabled"; 1132 }; 1133 1134 can1: can@e6e88000 { 1135 compatible = "renesas,can-r8a7790", 1136 "renesas,rcar-gen2-can"; 1137 reg = <0 0xe6e88000 0 0x1000>; 1138 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1139 clocks = <&cpg CPG_MOD 915>, 1140 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>; 1141 clock-names = "clkp1", "clkp2", "can_clk"; 1142 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1143 resets = <&cpg 915>; 1144 status = "disabled"; 1145 }; 1146 1147 vin0: video@e6ef0000 { 1148 compatible = "renesas,vin-r8a7790", 1149 "renesas,rcar-gen2-vin"; 1150 reg = <0 0xe6ef0000 0 0x1000>; 1151 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1152 clocks = <&cpg CPG_MOD 811>; 1153 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1154 resets = <&cpg 811>; 1155 status = "disabled"; 1156 }; 1157 1158 vin1: video@e6ef1000 { 1159 compatible = "renesas,vin-r8a7790", 1160 "renesas,rcar-gen2-vin"; 1161 reg = <0 0xe6ef1000 0 0x1000>; 1162 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1163 clocks = <&cpg CPG_MOD 810>; 1164 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1165 resets = <&cpg 810>; 1166 status = "disabled"; 1167 }; 1168 1169 vin2: video@e6ef2000 { 1170 compatible = "renesas,vin-r8a7790", 1171 "renesas,rcar-gen2-vin"; 1172 reg = <0 0xe6ef2000 0 0x1000>; 1173 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1174 clocks = <&cpg CPG_MOD 809>; 1175 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1176 resets = <&cpg 809>; 1177 status = "disabled"; 1178 }; 1179 1180 vin3: video@e6ef3000 { 1181 compatible = "renesas,vin-r8a7790", 1182 "renesas,rcar-gen2-vin"; 1183 reg = <0 0xe6ef3000 0 0x1000>; 1184 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1185 clocks = <&cpg CPG_MOD 808>; 1186 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1187 resets = <&cpg 808>; 1188 status = "disabled"; 1189 }; 1190 1191 rcar_sound: sound@ec500000 { 1192 /* 1193 * #sound-dai-cells is required if simple-card 1194 * 1195 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1196 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1197 */ 1198 compatible = "renesas,rcar_sound-r8a7790", 1199 "renesas,rcar_sound-gen2"; 1200 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1201 <0 0xec5a0000 0 0x100>, /* ADG */ 1202 <0 0xec540000 0 0x1000>, /* SSIU */ 1203 <0 0xec541000 0 0x280>, /* SSI */ 1204 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1205 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1206 1207 clocks = <&cpg CPG_MOD 1005>, 1208 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1209 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1210 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1211 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1212 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1213 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1214 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1215 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1216 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1217 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1218 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1219 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1220 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1221 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, 1222 <&cpg CPG_CORE R8A7790_CLK_M2>; 1223 clock-names = "ssi-all", 1224 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1225 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1226 "ssi.1", "ssi.0", 1227 "src.9", "src.8", "src.7", "src.6", 1228 "src.5", "src.4", "src.3", "src.2", 1229 "src.1", "src.0", 1230 "ctu.0", "ctu.1", 1231 "mix.0", "mix.1", 1232 "dvc.0", "dvc.1", 1233 "clk_a", "clk_b", "clk_c", "clk_i"; 1234 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1235 resets = <&cpg 1005>, 1236 <&cpg 1006>, <&cpg 1007>, 1237 <&cpg 1008>, <&cpg 1009>, 1238 <&cpg 1010>, <&cpg 1011>, 1239 <&cpg 1012>, <&cpg 1013>, 1240 <&cpg 1014>, <&cpg 1015>; 1241 reset-names = "ssi-all", 1242 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1243 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1244 "ssi.1", "ssi.0"; 1245 1246 status = "disabled"; 1247 1248 rcar_sound,dvc { 1249 dvc0: dvc-0 { 1250 dmas = <&audma1 0xbc>; 1251 dma-names = "tx"; 1252 }; 1253 dvc1: dvc-1 { 1254 dmas = <&audma1 0xbe>; 1255 dma-names = "tx"; 1256 }; 1257 }; 1258 1259 rcar_sound,mix { 1260 mix0: mix-0 { }; 1261 mix1: mix-1 { }; 1262 }; 1263 1264 rcar_sound,ctu { 1265 ctu00: ctu-0 { }; 1266 ctu01: ctu-1 { }; 1267 ctu02: ctu-2 { }; 1268 ctu03: ctu-3 { }; 1269 ctu10: ctu-4 { }; 1270 ctu11: ctu-5 { }; 1271 ctu12: ctu-6 { }; 1272 ctu13: ctu-7 { }; 1273 }; 1274 1275 rcar_sound,src { 1276 src0: src-0 { 1277 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1278 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1279 dma-names = "rx", "tx"; 1280 }; 1281 src1: src-1 { 1282 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1283 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1284 dma-names = "rx", "tx"; 1285 }; 1286 src2: src-2 { 1287 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1288 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1289 dma-names = "rx", "tx"; 1290 }; 1291 src3: src-3 { 1292 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1293 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1294 dma-names = "rx", "tx"; 1295 }; 1296 src4: src-4 { 1297 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1298 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1299 dma-names = "rx", "tx"; 1300 }; 1301 src5: src-5 { 1302 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1303 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1304 dma-names = "rx", "tx"; 1305 }; 1306 src6: src-6 { 1307 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1308 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1309 dma-names = "rx", "tx"; 1310 }; 1311 src7: src-7 { 1312 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1313 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1314 dma-names = "rx", "tx"; 1315 }; 1316 src8: src-8 { 1317 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1318 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1319 dma-names = "rx", "tx"; 1320 }; 1321 src9: src-9 { 1322 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1323 dmas = <&audma0 0x97>, <&audma1 0xba>; 1324 dma-names = "rx", "tx"; 1325 }; 1326 }; 1327 1328 rcar_sound,ssi { 1329 ssi0: ssi-0 { 1330 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1331 dmas = <&audma0 0x01>, <&audma1 0x02>, 1332 <&audma0 0x15>, <&audma1 0x16>; 1333 dma-names = "rx", "tx", "rxu", "txu"; 1334 }; 1335 ssi1: ssi-1 { 1336 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1337 dmas = <&audma0 0x03>, <&audma1 0x04>, 1338 <&audma0 0x49>, <&audma1 0x4a>; 1339 dma-names = "rx", "tx", "rxu", "txu"; 1340 }; 1341 ssi2: ssi-2 { 1342 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1343 dmas = <&audma0 0x05>, <&audma1 0x06>, 1344 <&audma0 0x63>, <&audma1 0x64>; 1345 dma-names = "rx", "tx", "rxu", "txu"; 1346 }; 1347 ssi3: ssi-3 { 1348 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1349 dmas = <&audma0 0x07>, <&audma1 0x08>, 1350 <&audma0 0x6f>, <&audma1 0x70>; 1351 dma-names = "rx", "tx", "rxu", "txu"; 1352 }; 1353 ssi4: ssi-4 { 1354 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1355 dmas = <&audma0 0x09>, <&audma1 0x0a>, 1356 <&audma0 0x71>, <&audma1 0x72>; 1357 dma-names = "rx", "tx", "rxu", "txu"; 1358 }; 1359 ssi5: ssi-5 { 1360 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1361 dmas = <&audma0 0x0b>, <&audma1 0x0c>, 1362 <&audma0 0x73>, <&audma1 0x74>; 1363 dma-names = "rx", "tx", "rxu", "txu"; 1364 }; 1365 ssi6: ssi-6 { 1366 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1367 dmas = <&audma0 0x0d>, <&audma1 0x0e>, 1368 <&audma0 0x75>, <&audma1 0x76>; 1369 dma-names = "rx", "tx", "rxu", "txu"; 1370 }; 1371 ssi7: ssi-7 { 1372 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1373 dmas = <&audma0 0x0f>, <&audma1 0x10>, 1374 <&audma0 0x79>, <&audma1 0x7a>; 1375 dma-names = "rx", "tx", "rxu", "txu"; 1376 }; 1377 ssi8: ssi-8 { 1378 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1379 dmas = <&audma0 0x11>, <&audma1 0x12>, 1380 <&audma0 0x7b>, <&audma1 0x7c>; 1381 dma-names = "rx", "tx", "rxu", "txu"; 1382 }; 1383 ssi9: ssi-9 { 1384 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1385 dmas = <&audma0 0x13>, <&audma1 0x14>, 1386 <&audma0 0x7d>, <&audma1 0x7e>; 1387 dma-names = "rx", "tx", "rxu", "txu"; 1388 }; 1389 }; 1390 }; 1391 1392 audma0: dma-controller@ec700000 { 1393 compatible = "renesas,dmac-r8a7790", 1394 "renesas,rcar-dmac"; 1395 reg = <0 0xec700000 0 0x10000>; 1396 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1397 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1398 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1399 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1400 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1401 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1402 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1403 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1404 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1405 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1406 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1407 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1408 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1409 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1410 interrupt-names = "error", 1411 "ch0", "ch1", "ch2", "ch3", 1412 "ch4", "ch5", "ch6", "ch7", 1413 "ch8", "ch9", "ch10", "ch11", 1414 "ch12"; 1415 clocks = <&cpg CPG_MOD 502>; 1416 clock-names = "fck"; 1417 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1418 resets = <&cpg 502>; 1419 #dma-cells = <1>; 1420 dma-channels = <13>; 1421 }; 1422 1423 audma1: dma-controller@ec720000 { 1424 compatible = "renesas,dmac-r8a7790", 1425 "renesas,rcar-dmac"; 1426 reg = <0 0xec720000 0 0x10000>; 1427 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 1428 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1429 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1430 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 1431 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1432 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1433 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1434 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1435 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1436 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1437 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1438 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1439 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1440 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; 1441 interrupt-names = "error", 1442 "ch0", "ch1", "ch2", "ch3", 1443 "ch4", "ch5", "ch6", "ch7", 1444 "ch8", "ch9", "ch10", "ch11", 1445 "ch12"; 1446 clocks = <&cpg CPG_MOD 501>; 1447 clock-names = "fck"; 1448 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1449 resets = <&cpg 501>; 1450 #dma-cells = <1>; 1451 dma-channels = <13>; 1452 }; 1453 1454 xhci: usb@ee000000 { 1455 compatible = "renesas,xhci-r8a7790", 1456 "renesas,rcar-gen2-xhci"; 1457 reg = <0 0xee000000 0 0xc00>; 1458 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 1459 clocks = <&cpg CPG_MOD 328>; 1460 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1461 resets = <&cpg 328>; 1462 phys = <&usb2 1>; 1463 phy-names = "usb"; 1464 status = "disabled"; 1465 }; 1466 1467 pci0: pci@ee090000 { 1468 compatible = "renesas,pci-r8a7790", 1469 "renesas,pci-rcar-gen2"; 1470 device_type = "pci"; 1471 reg = <0 0xee090000 0 0xc00>, 1472 <0 0xee080000 0 0x1100>; 1473 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1474 clocks = <&cpg CPG_MOD 703>; 1475 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1476 resets = <&cpg 703>; 1477 status = "disabled"; 1478 1479 bus-range = <0 0>; 1480 #address-cells = <3>; 1481 #size-cells = <2>; 1482 #interrupt-cells = <1>; 1483 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1484 interrupt-map-mask = <0xf800 0 0 0x7>; 1485 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1486 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1487 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1488 1489 usb@1,0 { 1490 reg = <0x800 0 0 0 0>; 1491 phys = <&usb0 0>; 1492 phy-names = "usb"; 1493 }; 1494 1495 usb@2,0 { 1496 reg = <0x1000 0 0 0 0>; 1497 phys = <&usb0 0>; 1498 phy-names = "usb"; 1499 }; 1500 }; 1501 1502 pci1: pci@ee0b0000 { 1503 compatible = "renesas,pci-r8a7790", 1504 "renesas,pci-rcar-gen2"; 1505 device_type = "pci"; 1506 reg = <0 0xee0b0000 0 0xc00>, 1507 <0 0xee0a0000 0 0x1100>; 1508 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1509 clocks = <&cpg CPG_MOD 703>; 1510 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1511 resets = <&cpg 703>; 1512 status = "disabled"; 1513 1514 bus-range = <1 1>; 1515 #address-cells = <3>; 1516 #size-cells = <2>; 1517 #interrupt-cells = <1>; 1518 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; 1519 interrupt-map-mask = <0xf800 0 0 0x7>; 1520 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1521 <0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1522 <0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1523 }; 1524 1525 pci2: pci@ee0d0000 { 1526 compatible = "renesas,pci-r8a7790", 1527 "renesas,pci-rcar-gen2"; 1528 device_type = "pci"; 1529 clocks = <&cpg CPG_MOD 703>; 1530 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1531 resets = <&cpg 703>; 1532 reg = <0 0xee0d0000 0 0xc00>, 1533 <0 0xee0c0000 0 0x1100>; 1534 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1535 status = "disabled"; 1536 1537 bus-range = <2 2>; 1538 #address-cells = <3>; 1539 #size-cells = <2>; 1540 #interrupt-cells = <1>; 1541 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1542 interrupt-map-mask = <0xf800 0 0 0x7>; 1543 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1544 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1545 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1546 1547 usb@1,0 { 1548 reg = <0x20800 0 0 0 0>; 1549 phys = <&usb2 0>; 1550 phy-names = "usb"; 1551 }; 1552 1553 usb@2,0 { 1554 reg = <0x21000 0 0 0 0>; 1555 phys = <&usb2 0>; 1556 phy-names = "usb"; 1557 }; 1558 }; 1559 1560 sdhi0: mmc@ee100000 { 1561 compatible = "renesas,sdhi-r8a7790", 1562 "renesas,rcar-gen2-sdhi"; 1563 reg = <0 0xee100000 0 0x328>; 1564 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1565 clocks = <&cpg CPG_MOD 314>; 1566 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1567 <&dmac1 0xcd>, <&dmac1 0xce>; 1568 dma-names = "tx", "rx", "tx", "rx"; 1569 max-frequency = <195000000>; 1570 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1571 resets = <&cpg 314>; 1572 status = "disabled"; 1573 }; 1574 1575 sdhi1: mmc@ee120000 { 1576 compatible = "renesas,sdhi-r8a7790", 1577 "renesas,rcar-gen2-sdhi"; 1578 reg = <0 0xee120000 0 0x328>; 1579 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1580 clocks = <&cpg CPG_MOD 313>; 1581 dmas = <&dmac0 0xc9>, <&dmac0 0xca>, 1582 <&dmac1 0xc9>, <&dmac1 0xca>; 1583 dma-names = "tx", "rx", "tx", "rx"; 1584 max-frequency = <195000000>; 1585 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1586 resets = <&cpg 313>; 1587 status = "disabled"; 1588 }; 1589 1590 sdhi2: mmc@ee140000 { 1591 compatible = "renesas,sdhi-r8a7790", 1592 "renesas,rcar-gen2-sdhi"; 1593 reg = <0 0xee140000 0 0x100>; 1594 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1595 clocks = <&cpg CPG_MOD 312>; 1596 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1597 <&dmac1 0xc1>, <&dmac1 0xc2>; 1598 dma-names = "tx", "rx", "tx", "rx"; 1599 max-frequency = <97500000>; 1600 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1601 resets = <&cpg 312>; 1602 status = "disabled"; 1603 }; 1604 1605 sdhi3: mmc@ee160000 { 1606 compatible = "renesas,sdhi-r8a7790", 1607 "renesas,rcar-gen2-sdhi"; 1608 reg = <0 0xee160000 0 0x100>; 1609 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1610 clocks = <&cpg CPG_MOD 311>; 1611 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1612 <&dmac1 0xd3>, <&dmac1 0xd4>; 1613 dma-names = "tx", "rx", "tx", "rx"; 1614 max-frequency = <97500000>; 1615 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1616 resets = <&cpg 311>; 1617 status = "disabled"; 1618 }; 1619 1620 mmcif0: mmc@ee200000 { 1621 compatible = "renesas,mmcif-r8a7790", 1622 "renesas,sh-mmcif"; 1623 reg = <0 0xee200000 0 0x80>; 1624 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1625 clocks = <&cpg CPG_MOD 315>; 1626 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1627 <&dmac1 0xd1>, <&dmac1 0xd2>; 1628 dma-names = "tx", "rx", "tx", "rx"; 1629 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1630 resets = <&cpg 315>; 1631 reg-io-width = <4>; 1632 status = "disabled"; 1633 max-frequency = <97500000>; 1634 }; 1635 1636 mmcif1: mmc@ee220000 { 1637 compatible = "renesas,mmcif-r8a7790", 1638 "renesas,sh-mmcif"; 1639 reg = <0 0xee220000 0 0x80>; 1640 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; 1641 clocks = <&cpg CPG_MOD 305>; 1642 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>, 1643 <&dmac1 0xe1>, <&dmac1 0xe2>; 1644 dma-names = "tx", "rx", "tx", "rx"; 1645 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1646 resets = <&cpg 305>; 1647 reg-io-width = <4>; 1648 status = "disabled"; 1649 max-frequency = <97500000>; 1650 }; 1651 1652 sata0: sata@ee300000 { 1653 compatible = "renesas,sata-r8a7790", 1654 "renesas,rcar-gen2-sata"; 1655 reg = <0 0xee300000 0 0x200000>; 1656 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 1657 clocks = <&cpg CPG_MOD 815>; 1658 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1659 resets = <&cpg 815>; 1660 status = "disabled"; 1661 }; 1662 1663 sata1: sata@ee500000 { 1664 compatible = "renesas,sata-r8a7790", 1665 "renesas,rcar-gen2-sata"; 1666 reg = <0 0xee500000 0 0x200000>; 1667 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 1668 clocks = <&cpg CPG_MOD 814>; 1669 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1670 resets = <&cpg 814>; 1671 status = "disabled"; 1672 }; 1673 1674 ether: ethernet@ee700000 { 1675 compatible = "renesas,ether-r8a7790", 1676 "renesas,rcar-gen2-ether"; 1677 reg = <0 0xee700000 0 0x400>; 1678 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1679 clocks = <&cpg CPG_MOD 813>; 1680 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1681 resets = <&cpg 813>; 1682 phy-mode = "rmii"; 1683 #address-cells = <1>; 1684 #size-cells = <0>; 1685 status = "disabled"; 1686 }; 1687 1688 gic: interrupt-controller@f1001000 { 1689 compatible = "arm,gic-400"; 1690 #interrupt-cells = <3>; 1691 #address-cells = <0>; 1692 interrupt-controller; 1693 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1694 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1695 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 1696 clocks = <&cpg CPG_MOD 408>; 1697 clock-names = "clk"; 1698 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1699 resets = <&cpg 408>; 1700 }; 1701 1702 pciec: pcie@fe000000 { 1703 compatible = "renesas,pcie-r8a7790", 1704 "renesas,pcie-rcar-gen2"; 1705 reg = <0 0xfe000000 0 0x80000>; 1706 #address-cells = <3>; 1707 #size-cells = <2>; 1708 bus-range = <0x00 0xff>; 1709 device_type = "pci"; 1710 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1711 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1712 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1713 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1714 /* Map all possible DDR as inbound ranges */ 1715 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>, 1716 <0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>; 1717 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1718 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1719 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1720 #interrupt-cells = <1>; 1721 interrupt-map-mask = <0 0 0 0>; 1722 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1723 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1724 clock-names = "pcie", "pcie_bus"; 1725 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1726 resets = <&cpg 319>; 1727 status = "disabled"; 1728 }; 1729 1730 vsp@fe920000 { 1731 compatible = "renesas,vsp1"; 1732 reg = <0 0xfe920000 0 0x8000>; 1733 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1734 clocks = <&cpg CPG_MOD 130>; 1735 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1736 resets = <&cpg 130>; 1737 }; 1738 1739 vsp@fe928000 { 1740 compatible = "renesas,vsp1"; 1741 reg = <0 0xfe928000 0 0x8000>; 1742 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1743 clocks = <&cpg CPG_MOD 131>; 1744 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1745 resets = <&cpg 131>; 1746 }; 1747 1748 vsp@fe930000 { 1749 compatible = "renesas,vsp1"; 1750 reg = <0 0xfe930000 0 0x8000>; 1751 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1752 clocks = <&cpg CPG_MOD 128>; 1753 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1754 resets = <&cpg 128>; 1755 }; 1756 1757 vsp@fe938000 { 1758 compatible = "renesas,vsp1"; 1759 reg = <0 0xfe938000 0 0x8000>; 1760 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 1761 clocks = <&cpg CPG_MOD 127>; 1762 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1763 resets = <&cpg 127>; 1764 }; 1765 1766 fdp1@fe940000 { 1767 compatible = "renesas,fdp1"; 1768 reg = <0 0xfe940000 0 0x2400>; 1769 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1770 clocks = <&cpg CPG_MOD 119>; 1771 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1772 resets = <&cpg 119>; 1773 }; 1774 1775 fdp1@fe944000 { 1776 compatible = "renesas,fdp1"; 1777 reg = <0 0xfe944000 0 0x2400>; 1778 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 1779 clocks = <&cpg CPG_MOD 118>; 1780 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1781 resets = <&cpg 118>; 1782 }; 1783 1784 fdp1@fe948000 { 1785 compatible = "renesas,fdp1"; 1786 reg = <0 0xfe948000 0 0x2400>; 1787 interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>; 1788 clocks = <&cpg CPG_MOD 117>; 1789 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1790 resets = <&cpg 117>; 1791 }; 1792 1793 jpu: jpeg-codec@fe980000 { 1794 compatible = "renesas,jpu-r8a7790", 1795 "renesas,rcar-gen2-jpu"; 1796 reg = <0 0xfe980000 0 0x10300>; 1797 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; 1798 clocks = <&cpg CPG_MOD 106>; 1799 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1800 resets = <&cpg 106>; 1801 }; 1802 1803 du: display@feb00000 { 1804 compatible = "renesas,du-r8a7790"; 1805 reg = <0 0xfeb00000 0 0x70000>; 1806 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1807 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 1808 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 1809 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 1810 <&cpg CPG_MOD 722>; 1811 clock-names = "du.0", "du.1", "du.2"; 1812 resets = <&cpg 724>; 1813 reset-names = "du.0"; 1814 status = "disabled"; 1815 1816 ports { 1817 #address-cells = <1>; 1818 #size-cells = <0>; 1819 1820 port@0 { 1821 reg = <0>; 1822 du_out_rgb: endpoint { 1823 }; 1824 }; 1825 port@1 { 1826 reg = <1>; 1827 du_out_lvds0: endpoint { 1828 remote-endpoint = <&lvds0_in>; 1829 }; 1830 }; 1831 port@2 { 1832 reg = <2>; 1833 du_out_lvds1: endpoint { 1834 remote-endpoint = <&lvds1_in>; 1835 }; 1836 }; 1837 }; 1838 }; 1839 1840 lvds0: lvds@feb90000 { 1841 compatible = "renesas,r8a7790-lvds"; 1842 reg = <0 0xfeb90000 0 0x1c>; 1843 clocks = <&cpg CPG_MOD 726>; 1844 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1845 resets = <&cpg 726>; 1846 status = "disabled"; 1847 1848 ports { 1849 #address-cells = <1>; 1850 #size-cells = <0>; 1851 1852 port@0 { 1853 reg = <0>; 1854 lvds0_in: endpoint { 1855 remote-endpoint = <&du_out_lvds0>; 1856 }; 1857 }; 1858 port@1 { 1859 reg = <1>; 1860 lvds0_out: endpoint { 1861 }; 1862 }; 1863 }; 1864 }; 1865 1866 lvds1: lvds@feb94000 { 1867 compatible = "renesas,r8a7790-lvds"; 1868 reg = <0 0xfeb94000 0 0x1c>; 1869 clocks = <&cpg CPG_MOD 725>; 1870 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1871 resets = <&cpg 725>; 1872 status = "disabled"; 1873 1874 ports { 1875 #address-cells = <1>; 1876 #size-cells = <0>; 1877 1878 port@0 { 1879 reg = <0>; 1880 lvds1_in: endpoint { 1881 remote-endpoint = <&du_out_lvds1>; 1882 }; 1883 }; 1884 port@1 { 1885 reg = <1>; 1886 lvds1_out: endpoint { 1887 }; 1888 }; 1889 }; 1890 }; 1891 1892 prr: chipid@ff000044 { 1893 compatible = "renesas,prr"; 1894 reg = <0 0xff000044 0 4>; 1895 }; 1896 1897 cmt0: timer@ffca0000 { 1898 compatible = "renesas,r8a7790-cmt0", 1899 "renesas,rcar-gen2-cmt0"; 1900 reg = <0 0xffca0000 0 0x1004>; 1901 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1902 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1903 clocks = <&cpg CPG_MOD 124>; 1904 clock-names = "fck"; 1905 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1906 resets = <&cpg 124>; 1907 1908 status = "disabled"; 1909 }; 1910 1911 cmt1: timer@e6130000 { 1912 compatible = "renesas,r8a7790-cmt1", 1913 "renesas,rcar-gen2-cmt1"; 1914 reg = <0 0xe6130000 0 0x1004>; 1915 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1916 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1917 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1918 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1919 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1920 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1921 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1922 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1923 clocks = <&cpg CPG_MOD 329>; 1924 clock-names = "fck"; 1925 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 1926 resets = <&cpg 329>; 1927 1928 status = "disabled"; 1929 }; 1930 }; 1931 1932 thermal-zones { 1933 cpu_thermal: cpu-thermal { 1934 polling-delay-passive = <0>; 1935 polling-delay = <0>; 1936 1937 thermal-sensors = <&thermal>; 1938 1939 trips { 1940 cpu-crit { 1941 temperature = <95000>; 1942 hysteresis = <0>; 1943 type = "critical"; 1944 }; 1945 }; 1946 cooling-maps { 1947 }; 1948 }; 1949 }; 1950 1951 timer { 1952 compatible = "arm,armv7-timer"; 1953 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 1954 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 1955 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 1956 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 1957 }; 1958 1959 /* External USB clock - can be overridden by the board */ 1960 usb_extal_clk: usb_extal { 1961 compatible = "fixed-clock"; 1962 #clock-cells = <0>; 1963 clock-frequency = <48000000>; 1964 }; 1965}; 1966