1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2// 3// Copyright 2013 Freescale Semiconductor, Inc. 4 5#include "vf610-pinfunc.h" 6#include <dt-bindings/clock/vf610-clock.h> 7#include <dt-bindings/interrupt-controller/irq.h> 8#include <dt-bindings/gpio/gpio.h> 9 10/ { 11 aliases { 12 can0 = &can0; 13 can1 = &can1; 14 ethernet0 = &fec0; 15 ethernet1 = &fec1; 16 serial0 = &uart0; 17 serial1 = &uart1; 18 serial2 = &uart2; 19 serial3 = &uart3; 20 serial4 = &uart4; 21 serial5 = &uart5; 22 gpio0 = &gpio0; 23 gpio1 = &gpio1; 24 gpio2 = &gpio2; 25 gpio3 = &gpio3; 26 gpio4 = &gpio4; 27 usbphy0 = &usbphy0; 28 usbphy1 = &usbphy1; 29 }; 30 31 fxosc: fxosc { 32 compatible = "fixed-clock"; 33 #clock-cells = <0>; 34 clock-frequency = <24000000>; 35 }; 36 37 sxosc: sxosc { 38 compatible = "fixed-clock"; 39 #clock-cells = <0>; 40 clock-frequency = <32768>; 41 }; 42 43 reboot: syscon-reboot { 44 compatible = "syscon-reboot"; 45 regmap = <&src>; 46 offset = <0x0>; 47 mask = <0x1000>; 48 }; 49 50 tempsensor: iio-hwmon { 51 compatible = "iio-hwmon"; 52 io-channels = <&adc0 16>, <&adc1 16>; 53 }; 54 55 soc { 56 #address-cells = <1>; 57 #size-cells = <1>; 58 compatible = "simple-bus"; 59 interrupt-parent = <&mscm_ir>; 60 ranges; 61 62 aips0: bus@40000000 { 63 compatible = "fsl,aips-bus", "simple-bus"; 64 #address-cells = <1>; 65 #size-cells = <1>; 66 reg = <0x40000000 0x00070000>; 67 ranges; 68 69 mscm_cpucfg: cpucfg@40001000 { 70 compatible = "fsl,vf610-mscm-cpucfg", "syscon"; 71 reg = <0x40001000 0x800>; 72 }; 73 74 mscm_ir: interrupt-controller@40001800 { 75 compatible = "fsl,vf610-mscm-ir"; 76 reg = <0x40001800 0x400>; 77 fsl,cpucfg = <&mscm_cpucfg>; 78 interrupt-controller; 79 #interrupt-cells = <2>; 80 }; 81 82 edma0: dma-controller@40018000 { 83 #dma-cells = <2>; 84 compatible = "fsl,vf610-edma"; 85 reg = <0x40018000 0x2000>, 86 <0x40024000 0x1000>, 87 <0x40025000 0x1000>; 88 dma-channels = <32>; 89 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, 90 <9 IRQ_TYPE_LEVEL_HIGH>; 91 interrupt-names = "edma-tx", "edma-err"; 92 clock-names = "dmamux0", "dmamux1"; 93 clocks = <&clks VF610_CLK_DMAMUX0>, 94 <&clks VF610_CLK_DMAMUX1>; 95 status = "disabled"; 96 }; 97 98 can0: can@40020000 { 99 compatible = "fsl,vf610-flexcan"; 100 reg = <0x40020000 0x4000>; 101 interrupts = <58 IRQ_TYPE_LEVEL_HIGH>; 102 clocks = <&clks VF610_CLK_FLEXCAN0>, 103 <&clks VF610_CLK_FLEXCAN0>; 104 clock-names = "ipg", "per"; 105 status = "disabled"; 106 }; 107 108 uart0: serial@40027000 { 109 compatible = "fsl,vf610-lpuart"; 110 reg = <0x40027000 0x1000>; 111 interrupts = <61 IRQ_TYPE_LEVEL_HIGH>; 112 clocks = <&clks VF610_CLK_UART0>; 113 clock-names = "ipg"; 114 dmas = <&edma0 0 2>, 115 <&edma0 0 3>; 116 dma-names = "rx","tx"; 117 status = "disabled"; 118 }; 119 120 uart1: serial@40028000 { 121 compatible = "fsl,vf610-lpuart"; 122 reg = <0x40028000 0x1000>; 123 interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; 124 clocks = <&clks VF610_CLK_UART1>; 125 clock-names = "ipg"; 126 dmas = <&edma0 0 4>, 127 <&edma0 0 5>; 128 dma-names = "rx","tx"; 129 status = "disabled"; 130 }; 131 132 uart2: serial@40029000 { 133 compatible = "fsl,vf610-lpuart"; 134 reg = <0x40029000 0x1000>; 135 interrupts = <63 IRQ_TYPE_LEVEL_HIGH>; 136 clocks = <&clks VF610_CLK_UART2>; 137 clock-names = "ipg"; 138 dmas = <&edma0 0 6>, 139 <&edma0 0 7>; 140 dma-names = "rx","tx"; 141 status = "disabled"; 142 }; 143 144 uart3: serial@4002a000 { 145 compatible = "fsl,vf610-lpuart"; 146 reg = <0x4002a000 0x1000>; 147 interrupts = <64 IRQ_TYPE_LEVEL_HIGH>; 148 clocks = <&clks VF610_CLK_UART3>; 149 clock-names = "ipg"; 150 dmas = <&edma0 0 8>, 151 <&edma0 0 9>; 152 dma-names = "rx","tx"; 153 status = "disabled"; 154 }; 155 156 dspi0: spi@4002c000 { 157 #address-cells = <1>; 158 #size-cells = <0>; 159 compatible = "fsl,vf610-dspi"; 160 reg = <0x4002c000 0x1000>; 161 interrupts = <67 IRQ_TYPE_LEVEL_HIGH>; 162 clocks = <&clks VF610_CLK_DSPI0>; 163 clock-names = "dspi"; 164 spi-num-chipselects = <6>; 165 dmas = <&edma1 1 12>, 166 <&edma1 1 13>; 167 dma-names = "rx", "tx"; 168 status = "disabled"; 169 }; 170 171 dspi1: spi@4002d000 { 172 #address-cells = <1>; 173 #size-cells = <0>; 174 compatible = "fsl,vf610-dspi"; 175 reg = <0x4002d000 0x1000>; 176 interrupts = <68 IRQ_TYPE_LEVEL_HIGH>; 177 clocks = <&clks VF610_CLK_DSPI1>; 178 clock-names = "dspi"; 179 spi-num-chipselects = <4>; 180 dmas = <&edma1 1 14>, 181 <&edma1 1 15>; 182 dma-names = "rx", "tx"; 183 status = "disabled"; 184 }; 185 186 sai0: sai@4002f000 { 187 compatible = "fsl,vf610-sai"; 188 reg = <0x4002f000 0x1000>; 189 interrupts = <84 IRQ_TYPE_LEVEL_HIGH>; 190 clocks = <&clks VF610_CLK_SAI0>, 191 <&clks VF610_CLK_SAI0_DIV>, 192 <&clks 0>, <&clks 0>; 193 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 194 dma-names = "rx", "tx"; 195 dmas = <&edma0 0 16>, <&edma0 0 17>; 196 status = "disabled"; 197 }; 198 199 sai1: sai@40030000 { 200 compatible = "fsl,vf610-sai"; 201 reg = <0x40030000 0x1000>; 202 interrupts = <85 IRQ_TYPE_LEVEL_HIGH>; 203 clocks = <&clks VF610_CLK_SAI1>, 204 <&clks VF610_CLK_SAI1_DIV>, 205 <&clks 0>, <&clks 0>; 206 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 207 dma-names = "rx", "tx"; 208 dmas = <&edma0 0 18>, <&edma0 0 19>; 209 status = "disabled"; 210 }; 211 212 sai2: sai@40031000 { 213 compatible = "fsl,vf610-sai"; 214 reg = <0x40031000 0x1000>; 215 interrupts = <86 IRQ_TYPE_LEVEL_HIGH>; 216 clocks = <&clks VF610_CLK_SAI2>, 217 <&clks VF610_CLK_SAI2_DIV>, 218 <&clks 0>, <&clks 0>; 219 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 220 dma-names = "rx", "tx"; 221 dmas = <&edma0 0 20>, <&edma0 0 21>; 222 status = "disabled"; 223 }; 224 225 sai3: sai@40032000 { 226 compatible = "fsl,vf610-sai"; 227 reg = <0x40032000 0x1000>; 228 interrupts = <87 IRQ_TYPE_LEVEL_HIGH>; 229 clocks = <&clks VF610_CLK_SAI3>, 230 <&clks VF610_CLK_SAI3_DIV>, 231 <&clks 0>, <&clks 0>; 232 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 233 dma-names = "rx", "tx"; 234 dmas = <&edma0 1 8>, <&edma0 1 9>; 235 status = "disabled"; 236 }; 237 238 pit: pit@40037000 { 239 compatible = "fsl,vf610-pit"; 240 reg = <0x40037000 0x1000>; 241 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; 242 clocks = <&clks VF610_CLK_PIT>; 243 clock-names = "pit"; 244 }; 245 246 pwm0: pwm@40038000 { 247 compatible = "fsl,vf610-ftm-pwm"; 248 #pwm-cells = <3>; 249 reg = <0x40038000 0x1000>; 250 clock-names = "ftm_sys", "ftm_ext", 251 "ftm_fix", "ftm_cnt_clk_en"; 252 clocks = <&clks VF610_CLK_FTM0>, 253 <&clks VF610_CLK_FTM0_EXT_SEL>, 254 <&clks VF610_CLK_FTM0_FIX_SEL>, 255 <&clks VF610_CLK_FTM0_EXT_FIX_EN>; 256 status = "disabled"; 257 }; 258 259 pwm1: pwm@40039000 { 260 compatible = "fsl,vf610-ftm-pwm"; 261 #pwm-cells = <3>; 262 reg = <0x40039000 0x1000>; 263 clock-names = "ftm_sys", "ftm_ext", 264 "ftm_fix", "ftm_cnt_clk_en"; 265 clocks = <&clks VF610_CLK_FTM1>, 266 <&clks VF610_CLK_FTM1_EXT_SEL>, 267 <&clks VF610_CLK_FTM1_FIX_SEL>, 268 <&clks VF610_CLK_FTM1_EXT_FIX_EN>; 269 status = "disabled"; 270 }; 271 272 adc0: adc@4003b000 { 273 compatible = "fsl,vf610-adc"; 274 reg = <0x4003b000 0x1000>; 275 interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; 276 clocks = <&clks VF610_CLK_ADC0>; 277 clock-names = "adc"; 278 #io-channel-cells = <1>; 279 status = "disabled"; 280 fsl,adck-max-frequency = <30000000>, <40000000>, 281 <20000000>; 282 }; 283 284 tcon0: timing-controller@4003d000 { 285 compatible = "fsl,vf610-tcon"; 286 reg = <0x4003d000 0x1000>; 287 clocks = <&clks VF610_CLK_TCON0>; 288 clock-names = "ipg"; 289 status = "disabled"; 290 }; 291 292 wdoga5: watchdog@4003e000 { 293 compatible = "fsl,vf610-wdt", "fsl,imx21-wdt"; 294 reg = <0x4003e000 0x1000>; 295 interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; 296 clocks = <&clks VF610_CLK_WDT>; 297 status = "disabled"; 298 }; 299 300 qspi0: spi@40044000 { 301 #address-cells = <1>; 302 #size-cells = <0>; 303 compatible = "fsl,vf610-qspi"; 304 reg = <0x40044000 0x1000>, <0x20000000 0x10000000>; 305 reg-names = "QuadSPI", "QuadSPI-memory"; 306 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 307 clocks = <&clks VF610_CLK_QSPI0_EN>, 308 <&clks VF610_CLK_QSPI0>; 309 clock-names = "qspi_en", "qspi"; 310 status = "disabled"; 311 }; 312 313 iomuxc: iomuxc@40048000 { 314 compatible = "fsl,vf610-iomuxc"; 315 reg = <0x40048000 0x1000>; 316 }; 317 318 gpio0: gpio@40049000 { 319 compatible = "fsl,vf610-gpio"; 320 reg = <0x40049000 0x1000 0x400ff000 0x40>; 321 gpio-controller; 322 #gpio-cells = <2>; 323 interrupts = <107 IRQ_TYPE_LEVEL_HIGH>; 324 interrupt-controller; 325 #interrupt-cells = <2>; 326 gpio-ranges = <&iomuxc 0 0 32>; 327 }; 328 329 gpio1: gpio@4004a000 { 330 compatible = "fsl,vf610-gpio"; 331 reg = <0x4004a000 0x1000 0x400ff040 0x40>; 332 gpio-controller; 333 #gpio-cells = <2>; 334 interrupts = <108 IRQ_TYPE_LEVEL_HIGH>; 335 interrupt-controller; 336 #interrupt-cells = <2>; 337 gpio-ranges = <&iomuxc 0 32 32>; 338 }; 339 340 gpio2: gpio@4004b000 { 341 compatible = "fsl,vf610-gpio"; 342 reg = <0x4004b000 0x1000 0x400ff080 0x40>; 343 gpio-controller; 344 #gpio-cells = <2>; 345 interrupts = <109 IRQ_TYPE_LEVEL_HIGH>; 346 interrupt-controller; 347 #interrupt-cells = <2>; 348 gpio-ranges = <&iomuxc 0 64 32>; 349 }; 350 351 gpio3: gpio@4004c000 { 352 compatible = "fsl,vf610-gpio"; 353 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>; 354 gpio-controller; 355 #gpio-cells = <2>; 356 interrupts = <110 IRQ_TYPE_LEVEL_HIGH>; 357 interrupt-controller; 358 #interrupt-cells = <2>; 359 gpio-ranges = <&iomuxc 0 96 32>; 360 }; 361 362 gpio4: gpio@4004d000 { 363 compatible = "fsl,vf610-gpio"; 364 reg = <0x4004d000 0x1000 0x400ff100 0x40>; 365 gpio-controller; 366 #gpio-cells = <2>; 367 interrupts = <111 IRQ_TYPE_LEVEL_HIGH>; 368 interrupt-controller; 369 #interrupt-cells = <2>; 370 gpio-ranges = <&iomuxc 0 128 7>; 371 }; 372 373 anatop: anatop@40050000 { 374 compatible = "fsl,vf610-anatop", "syscon"; 375 reg = <0x40050000 0x400>; 376 }; 377 378 usbphy0: usbphy@40050800 { 379 compatible = "fsl,vf610-usbphy"; 380 reg = <0x40050800 0x400>; 381 interrupts = <50 IRQ_TYPE_LEVEL_HIGH>; 382 clocks = <&clks VF610_CLK_USBPHY0>; 383 fsl,anatop = <&anatop>; 384 status = "disabled"; 385 }; 386 387 usbphy1: usbphy@40050c00 { 388 compatible = "fsl,vf610-usbphy"; 389 reg = <0x40050c00 0x400>; 390 interrupts = <51 IRQ_TYPE_LEVEL_HIGH>; 391 clocks = <&clks VF610_CLK_USBPHY1>; 392 fsl,anatop = <&anatop>; 393 status = "disabled"; 394 }; 395 396 dcu0: dcu@40058000 { 397 compatible = "fsl,vf610-dcu"; 398 reg = <0x40058000 0x1200>; 399 interrupts = <30 IRQ_TYPE_LEVEL_HIGH>; 400 clocks = <&clks VF610_CLK_DCU0>, 401 <&clks VF610_CLK_DCU0_DIV>; 402 clock-names = "dcu", "pix"; 403 fsl,tcon = <&tcon0>; 404 status = "disabled"; 405 }; 406 407 i2c0: i2c@40066000 { 408 #address-cells = <1>; 409 #size-cells = <0>; 410 compatible = "fsl,vf610-i2c"; 411 reg = <0x40066000 0x1000>; 412 interrupts = <71 IRQ_TYPE_LEVEL_HIGH>; 413 clocks = <&clks VF610_CLK_I2C0>; 414 clock-names = "ipg"; 415 dmas = <&edma0 0 50>, 416 <&edma0 0 51>; 417 dma-names = "rx","tx"; 418 status = "disabled"; 419 }; 420 421 i2c1: i2c@40067000 { 422 #address-cells = <1>; 423 #size-cells = <0>; 424 compatible = "fsl,vf610-i2c"; 425 reg = <0x40067000 0x1000>; 426 interrupts = <72 IRQ_TYPE_LEVEL_HIGH>; 427 clocks = <&clks VF610_CLK_I2C1>; 428 clock-names = "ipg"; 429 dmas = <&edma0 0 52>, 430 <&edma0 0 53>; 431 dma-names = "rx","tx"; 432 status = "disabled"; 433 }; 434 435 clks: ccm@4006b000 { 436 compatible = "fsl,vf610-ccm"; 437 reg = <0x4006b000 0x1000>; 438 clocks = <&sxosc>, <&fxosc>; 439 clock-names = "sxosc", "fxosc"; 440 #clock-cells = <1>; 441 }; 442 443 usbdev0: usb@40034000 { 444 compatible = "fsl,vf610-usb", "fsl,imx27-usb"; 445 reg = <0x40034000 0x800>; 446 interrupts = <75 IRQ_TYPE_LEVEL_HIGH>; 447 clocks = <&clks VF610_CLK_USBC0>; 448 fsl,usbphy = <&usbphy0>; 449 fsl,usbmisc = <&usbmisc0 0>; 450 dr_mode = "peripheral"; 451 status = "disabled"; 452 }; 453 454 usbmisc0: usb@40034800 { 455 #index-cells = <1>; 456 compatible = "fsl,vf610-usbmisc"; 457 reg = <0x40034800 0x200>; 458 clocks = <&clks VF610_CLK_USBC0>; 459 status = "disabled"; 460 }; 461 462 src: src@4006e000 { 463 compatible = "fsl,vf610-src", "syscon"; 464 reg = <0x4006e000 0x1000>; 465 interrupts = <96 IRQ_TYPE_LEVEL_HIGH>; 466 }; 467 }; 468 469 aips1: bus@40080000 { 470 compatible = "fsl,aips-bus", "simple-bus"; 471 #address-cells = <1>; 472 #size-cells = <1>; 473 reg = <0x40080000 0x0007f000>; 474 ranges; 475 476 edma1: dma-controller@40098000 { 477 #dma-cells = <2>; 478 compatible = "fsl,vf610-edma"; 479 reg = <0x40098000 0x2000>, 480 <0x400a1000 0x1000>, 481 <0x400a2000 0x1000>; 482 dma-channels = <32>; 483 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>, 484 <11 IRQ_TYPE_LEVEL_HIGH>; 485 interrupt-names = "edma-tx", "edma-err"; 486 clock-names = "dmamux0", "dmamux1"; 487 clocks = <&clks VF610_CLK_DMAMUX2>, 488 <&clks VF610_CLK_DMAMUX3>; 489 status = "disabled"; 490 }; 491 492 ocotp: ocotp@400a5000 { 493 compatible = "fsl,vf610-ocotp", "syscon"; 494 reg = <0x400a5000 0x1000>; 495 clocks = <&clks VF610_CLK_OCOTP>; 496 }; 497 498 snvs0: snvs@400a7000 { 499 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; 500 reg = <0x400a7000 0x2000>; 501 502 snvsrtc: snvs-rtc-lp { 503 compatible = "fsl,sec-v4.0-mon-rtc-lp"; 504 regmap = <&snvs0>; 505 offset = <0x34>; 506 interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; 507 clocks = <&clks VF610_CLK_SNVS>; 508 clock-names = "snvs-rtc"; 509 }; 510 }; 511 512 uart4: serial@400a9000 { 513 compatible = "fsl,vf610-lpuart"; 514 reg = <0x400a9000 0x1000>; 515 interrupts = <65 IRQ_TYPE_LEVEL_HIGH>; 516 clocks = <&clks VF610_CLK_UART4>; 517 clock-names = "ipg"; 518 status = "disabled"; 519 }; 520 521 uart5: serial@400aa000 { 522 compatible = "fsl,vf610-lpuart"; 523 reg = <0x400aa000 0x1000>; 524 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; 525 clocks = <&clks VF610_CLK_UART5>; 526 clock-names = "ipg"; 527 status = "disabled"; 528 }; 529 530 dspi2: spi@400ac000 { 531 #address-cells = <1>; 532 #size-cells = <0>; 533 compatible = "fsl,vf610-dspi"; 534 reg = <0x400ac000 0x1000>; 535 interrupts = <69 IRQ_TYPE_LEVEL_HIGH>; 536 clocks = <&clks VF610_CLK_DSPI2>; 537 clock-names = "dspi"; 538 spi-num-chipselects = <2>; 539 dmas = <&edma1 0 10>, 540 <&edma1 0 11>; 541 dma-names = "rx", "tx"; 542 status = "disabled"; 543 }; 544 545 dspi3: spi@400ad000 { 546 #address-cells = <1>; 547 #size-cells = <0>; 548 compatible = "fsl,vf610-dspi"; 549 reg = <0x400ad000 0x1000>; 550 interrupts = <70 IRQ_TYPE_LEVEL_HIGH>; 551 clocks = <&clks VF610_CLK_DSPI3>; 552 clock-names = "dspi"; 553 spi-num-chipselects = <2>; 554 dmas = <&edma1 0 12>, 555 <&edma1 0 13>; 556 dma-names = "rx", "tx"; 557 status = "disabled"; 558 }; 559 560 adc1: adc@400bb000 { 561 compatible = "fsl,vf610-adc"; 562 reg = <0x400bb000 0x1000>; 563 interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; 564 clocks = <&clks VF610_CLK_ADC1>; 565 clock-names = "adc"; 566 #io-channel-cells = <1>; 567 status = "disabled"; 568 fsl,adck-max-frequency = <30000000>, <40000000>, 569 <20000000>; 570 }; 571 572 esdhc0: mmc@400b1000 { 573 compatible = "fsl,imx53-esdhc"; 574 reg = <0x400b1000 0x1000>; 575 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 576 clocks = <&clks VF610_CLK_IPG_BUS>, 577 <&clks VF610_CLK_PLATFORM_BUS>, 578 <&clks VF610_CLK_ESDHC0>; 579 clock-names = "ipg", "ahb", "per"; 580 status = "disabled"; 581 }; 582 583 esdhc1: mmc@400b2000 { 584 compatible = "fsl,imx53-esdhc"; 585 reg = <0x400b2000 0x1000>; 586 interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; 587 clocks = <&clks VF610_CLK_IPG_BUS>, 588 <&clks VF610_CLK_PLATFORM_BUS>, 589 <&clks VF610_CLK_ESDHC1>; 590 clock-names = "ipg", "ahb", "per"; 591 status = "disabled"; 592 }; 593 594 usbh1: usb@400b4000 { 595 compatible = "fsl,vf610-usb", "fsl,imx27-usb"; 596 reg = <0x400b4000 0x800>; 597 interrupts = <76 IRQ_TYPE_LEVEL_HIGH>; 598 clocks = <&clks VF610_CLK_USBC1>; 599 fsl,usbphy = <&usbphy1>; 600 fsl,usbmisc = <&usbmisc1 0>; 601 dr_mode = "host"; 602 status = "disabled"; 603 }; 604 605 usbmisc1: usb@400b4800 { 606 #index-cells = <1>; 607 compatible = "fsl,vf610-usbmisc"; 608 reg = <0x400b4800 0x200>; 609 clocks = <&clks VF610_CLK_USBC1>; 610 status = "disabled"; 611 }; 612 613 ftm: ftm@400b8000 { 614 compatible = "fsl,ftm-timer"; 615 reg = <0x400b8000 0x1000 0x400b9000 0x1000>; 616 interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; 617 clock-names = "ftm-evt", "ftm-src", 618 "ftm-evt-counter-en", "ftm-src-counter-en"; 619 clocks = <&clks VF610_CLK_FTM2>, 620 <&clks VF610_CLK_FTM3>, 621 <&clks VF610_CLK_FTM2_EXT_FIX_EN>, 622 <&clks VF610_CLK_FTM3_EXT_FIX_EN>; 623 status = "disabled"; 624 }; 625 626 qspi1: spi@400c4000 { 627 #address-cells = <1>; 628 #size-cells = <0>; 629 compatible = "fsl,vf610-qspi"; 630 reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>; 631 reg-names = "QuadSPI", "QuadSPI-memory"; 632 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 633 clocks = <&clks VF610_CLK_QSPI1_EN>, 634 <&clks VF610_CLK_QSPI1>; 635 clock-names = "qspi_en", "qspi"; 636 status = "disabled"; 637 }; 638 639 dac0: dac@400cc000 { 640 compatible = "fsl,vf610-dac"; 641 reg = <0x400cc000 1000>; 642 interrupts = <55 IRQ_TYPE_LEVEL_HIGH>; 643 clock-names = "dac"; 644 clocks = <&clks VF610_CLK_DAC0>; 645 status = "disabled"; 646 }; 647 648 dac1: dac@400cd000 { 649 compatible = "fsl,vf610-dac"; 650 reg = <0x400cd000 1000>; 651 interrupts = <56 IRQ_TYPE_LEVEL_HIGH>; 652 clock-names = "dac"; 653 clocks = <&clks VF610_CLK_DAC1>; 654 status = "disabled"; 655 }; 656 657 fec0: ethernet@400d0000 { 658 compatible = "fsl,mvf600-fec"; 659 reg = <0x400d0000 0x1000>; 660 interrupts = <78 IRQ_TYPE_LEVEL_HIGH>; 661 clocks = <&clks VF610_CLK_ENET0>, 662 <&clks VF610_CLK_ENET0>, 663 <&clks VF610_CLK_ENET>; 664 clock-names = "ipg", "ahb", "ptp"; 665 status = "disabled"; 666 }; 667 668 fec1: ethernet@400d1000 { 669 compatible = "fsl,mvf600-fec"; 670 reg = <0x400d1000 0x1000>; 671 interrupts = <79 IRQ_TYPE_LEVEL_HIGH>; 672 clocks = <&clks VF610_CLK_ENET1>, 673 <&clks VF610_CLK_ENET1>, 674 <&clks VF610_CLK_ENET>; 675 clock-names = "ipg", "ahb", "ptp"; 676 status = "disabled"; 677 }; 678 679 can1: can@400d4000 { 680 compatible = "fsl,vf610-flexcan"; 681 reg = <0x400d4000 0x4000>; 682 interrupts = <59 IRQ_TYPE_LEVEL_HIGH>; 683 clocks = <&clks VF610_CLK_FLEXCAN1>, 684 <&clks VF610_CLK_FLEXCAN1>; 685 clock-names = "ipg", "per"; 686 status = "disabled"; 687 }; 688 689 nfc: nand@400e0000 { 690 #address-cells = <1>; 691 #size-cells = <0>; 692 compatible = "fsl,vf610-nfc"; 693 reg = <0x400e0000 0x4000>; 694 interrupts = <83 IRQ_TYPE_LEVEL_HIGH>; 695 clocks = <&clks VF610_CLK_NFC>; 696 clock-names = "nfc"; 697 status = "disabled"; 698 }; 699 700 i2c2: i2c@400e6000 { 701 #address-cells = <1>; 702 #size-cells = <0>; 703 compatible = "fsl,vf610-i2c"; 704 reg = <0x400e6000 0x1000>; 705 interrupts = <73 IRQ_TYPE_LEVEL_HIGH>; 706 clocks = <&clks VF610_CLK_I2C2>; 707 clock-names = "ipg"; 708 dmas = <&edma0 1 36>, 709 <&edma0 1 37>; 710 dma-names = "rx","tx"; 711 status = "disabled"; 712 }; 713 714 i2c3: i2c@400e7000 { 715 #address-cells = <1>; 716 #size-cells = <0>; 717 compatible = "fsl,vf610-i2c"; 718 reg = <0x400e7000 0x1000>; 719 interrupts = <74 IRQ_TYPE_LEVEL_HIGH>; 720 clocks = <&clks VF610_CLK_I2C3>; 721 clock-names = "ipg"; 722 dmas = <&edma0 1 38>, 723 <&edma0 1 39>; 724 dma-names = "rx","tx"; 725 status = "disabled"; 726 }; 727 728 crypto: crypto@400f0000 { 729 compatible = "fsl,sec-v4.0"; 730 #address-cells = <1>; 731 #size-cells = <1>; 732 reg = <0x400f0000 0x9000>; 733 ranges = <0 0x400f0000 0x9000>; 734 clocks = <&clks VF610_CLK_CAAM>; 735 clock-names = "ipg"; 736 737 sec_jr0: jr0@1000 { 738 compatible = "fsl,sec-v4.0-job-ring"; 739 reg = <0x1000 0x1000>; 740 interrupts = <102 IRQ_TYPE_LEVEL_HIGH>; 741 }; 742 743 sec_jr1: jr1@2000 { 744 compatible = "fsl,sec-v4.0-job-ring"; 745 reg = <0x2000 0x1000>; 746 interrupts = <102 IRQ_TYPE_LEVEL_HIGH>; 747 }; 748 }; 749 }; 750 }; 751}; 752