1// SPDX-License-Identifier: GPL-2.0+ 2// 3// Copyright 2012 Freescale Semiconductor, Inc. 4 5#include "imx23-pinfunc.h" 6 7/ { 8 #address-cells = <1>; 9 #size-cells = <1>; 10 11 interrupt-parent = <&icoll>; 12 /* 13 * The decompressor and also some bootloaders rely on a 14 * pre-existing /chosen node to be available to insert the 15 * command line and merge other ATAGS info. 16 */ 17 chosen {}; 18 19 aliases { 20 gpio0 = &gpio0; 21 gpio1 = &gpio1; 22 gpio2 = &gpio2; 23 serial0 = &auart0; 24 serial1 = &auart1; 25 spi0 = &ssp0; 26 spi1 = &ssp1; 27 usbphy0 = &usbphy0; 28 }; 29 30 cpus { 31 #address-cells = <1>; 32 #size-cells = <0>; 33 34 cpu@0 { 35 compatible = "arm,arm926ej-s"; 36 device_type = "cpu"; 37 reg = <0>; 38 }; 39 }; 40 41 apb@80000000 { 42 compatible = "simple-bus"; 43 #address-cells = <1>; 44 #size-cells = <1>; 45 reg = <0x80000000 0x80000>; 46 ranges; 47 48 apbh@80000000 { 49 compatible = "simple-bus"; 50 #address-cells = <1>; 51 #size-cells = <1>; 52 reg = <0x80000000 0x40000>; 53 ranges; 54 55 icoll: interrupt-controller@80000000 { 56 compatible = "fsl,imx23-icoll", "fsl,icoll"; 57 interrupt-controller; 58 #interrupt-cells = <1>; 59 reg = <0x80000000 0x2000>; 60 }; 61 62 dma_apbh: dma-controller@80004000 { 63 compatible = "fsl,imx23-dma-apbh"; 64 reg = <0x80004000 0x2000>; 65 interrupts = <0>, <14>, <20>, <0>, 66 <13>, <13>, <13>, <13>; 67 #dma-cells = <1>; 68 dma-channels = <8>; 69 clocks = <&clks 15>; 70 }; 71 72 ecc@80008000 { 73 reg = <0x80008000 0x2000>; 74 status = "disabled"; 75 }; 76 77 nand-controller@8000c000 { 78 compatible = "fsl,imx23-gpmi-nand"; 79 #address-cells = <1>; 80 #size-cells = <1>; 81 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>; 82 reg-names = "gpmi-nand", "bch"; 83 interrupts = <56>; 84 interrupt-names = "bch"; 85 clocks = <&clks 34>; 86 clock-names = "gpmi_io"; 87 dmas = <&dma_apbh 4>; 88 dma-names = "rx-tx"; 89 status = "disabled"; 90 }; 91 92 ssp0: spi@80010000 { 93 reg = <0x80010000 0x2000>; 94 interrupts = <15>; 95 clocks = <&clks 33>; 96 dmas = <&dma_apbh 1>; 97 dma-names = "rx-tx"; 98 status = "disabled"; 99 }; 100 101 etm@80014000 { 102 reg = <0x80014000 0x2000>; 103 status = "disabled"; 104 }; 105 106 pinctrl@80018000 { 107 #address-cells = <1>; 108 #size-cells = <0>; 109 compatible = "fsl,imx23-pinctrl", "simple-bus"; 110 reg = <0x80018000 0x2000>; 111 112 gpio0: gpio@0 { 113 compatible = "fsl,imx23-gpio"; 114 reg = <0>; 115 interrupts = <16>; 116 gpio-controller; 117 #gpio-cells = <2>; 118 interrupt-controller; 119 #interrupt-cells = <2>; 120 }; 121 122 gpio1: gpio@1 { 123 compatible = "fsl,imx23-gpio"; 124 reg = <1>; 125 interrupts = <17>; 126 gpio-controller; 127 #gpio-cells = <2>; 128 interrupt-controller; 129 #interrupt-cells = <2>; 130 }; 131 132 gpio2: gpio@2 { 133 compatible = "fsl,imx23-gpio"; 134 reg = <2>; 135 interrupts = <18>; 136 gpio-controller; 137 #gpio-cells = <2>; 138 interrupt-controller; 139 #interrupt-cells = <2>; 140 }; 141 142 duart_pins_a: duart@0 { 143 reg = <0>; 144 fsl,pinmux-ids = < 145 MX23_PAD_PWM0__DUART_RX 146 MX23_PAD_PWM1__DUART_TX 147 >; 148 fsl,drive-strength = <MXS_DRIVE_4mA>; 149 fsl,voltage = <MXS_VOLTAGE_HIGH>; 150 fsl,pull-up = <MXS_PULL_DISABLE>; 151 }; 152 153 auart0_pins_a: auart0@0 { 154 reg = <0>; 155 fsl,pinmux-ids = < 156 MX23_PAD_AUART1_RX__AUART1_RX 157 MX23_PAD_AUART1_TX__AUART1_TX 158 MX23_PAD_AUART1_CTS__AUART1_CTS 159 MX23_PAD_AUART1_RTS__AUART1_RTS 160 >; 161 fsl,drive-strength = <MXS_DRIVE_4mA>; 162 fsl,voltage = <MXS_VOLTAGE_HIGH>; 163 fsl,pull-up = <MXS_PULL_DISABLE>; 164 }; 165 166 auart0_2pins_a: auart0-2pins@0 { 167 reg = <0>; 168 fsl,pinmux-ids = < 169 MX23_PAD_I2C_SCL__AUART1_TX 170 MX23_PAD_I2C_SDA__AUART1_RX 171 >; 172 fsl,drive-strength = <MXS_DRIVE_4mA>; 173 fsl,voltage = <MXS_VOLTAGE_HIGH>; 174 fsl,pull-up = <MXS_PULL_DISABLE>; 175 }; 176 177 auart1_2pins_a: auart1-2pins@0 { 178 reg = <0>; 179 fsl,pinmux-ids = < 180 MX23_PAD_GPMI_D14__AUART2_RX 181 MX23_PAD_GPMI_D15__AUART2_TX 182 >; 183 fsl,drive-strength = <MXS_DRIVE_4mA>; 184 fsl,voltage = <MXS_VOLTAGE_HIGH>; 185 fsl,pull-up = <MXS_PULL_DISABLE>; 186 }; 187 188 gpmi_pins_a: gpmi-nand@0 { 189 reg = <0>; 190 fsl,pinmux-ids = < 191 MX23_PAD_GPMI_D00__GPMI_D00 192 MX23_PAD_GPMI_D01__GPMI_D01 193 MX23_PAD_GPMI_D02__GPMI_D02 194 MX23_PAD_GPMI_D03__GPMI_D03 195 MX23_PAD_GPMI_D04__GPMI_D04 196 MX23_PAD_GPMI_D05__GPMI_D05 197 MX23_PAD_GPMI_D06__GPMI_D06 198 MX23_PAD_GPMI_D07__GPMI_D07 199 MX23_PAD_GPMI_CLE__GPMI_CLE 200 MX23_PAD_GPMI_ALE__GPMI_ALE 201 MX23_PAD_GPMI_RDY0__GPMI_RDY0 202 MX23_PAD_GPMI_RDY1__GPMI_RDY1 203 MX23_PAD_GPMI_WPN__GPMI_WPN 204 MX23_PAD_GPMI_WRN__GPMI_WRN 205 MX23_PAD_GPMI_RDN__GPMI_RDN 206 MX23_PAD_GPMI_CE1N__GPMI_CE1N 207 MX23_PAD_GPMI_CE0N__GPMI_CE0N 208 >; 209 fsl,drive-strength = <MXS_DRIVE_4mA>; 210 fsl,voltage = <MXS_VOLTAGE_HIGH>; 211 fsl,pull-up = <MXS_PULL_DISABLE>; 212 }; 213 214 gpmi_pins_fixup: gpmi-pins-fixup@0 { 215 reg = <0>; 216 fsl,pinmux-ids = < 217 MX23_PAD_GPMI_WPN__GPMI_WPN 218 MX23_PAD_GPMI_WRN__GPMI_WRN 219 MX23_PAD_GPMI_RDN__GPMI_RDN 220 >; 221 fsl,drive-strength = <MXS_DRIVE_12mA>; 222 }; 223 224 mmc0_4bit_pins_a: mmc0-4bit@0 { 225 reg = <0>; 226 fsl,pinmux-ids = < 227 MX23_PAD_SSP1_DATA0__SSP1_DATA0 228 MX23_PAD_SSP1_DATA1__SSP1_DATA1 229 MX23_PAD_SSP1_DATA2__SSP1_DATA2 230 MX23_PAD_SSP1_DATA3__SSP1_DATA3 231 MX23_PAD_SSP1_CMD__SSP1_CMD 232 MX23_PAD_SSP1_SCK__SSP1_SCK 233 >; 234 fsl,drive-strength = <MXS_DRIVE_8mA>; 235 fsl,voltage = <MXS_VOLTAGE_HIGH>; 236 fsl,pull-up = <MXS_PULL_ENABLE>; 237 }; 238 239 mmc0_8bit_pins_a: mmc0-8bit@0 { 240 reg = <0>; 241 fsl,pinmux-ids = < 242 MX23_PAD_SSP1_DATA0__SSP1_DATA0 243 MX23_PAD_SSP1_DATA1__SSP1_DATA1 244 MX23_PAD_SSP1_DATA2__SSP1_DATA2 245 MX23_PAD_SSP1_DATA3__SSP1_DATA3 246 MX23_PAD_GPMI_D08__SSP1_DATA4 247 MX23_PAD_GPMI_D09__SSP1_DATA5 248 MX23_PAD_GPMI_D10__SSP1_DATA6 249 MX23_PAD_GPMI_D11__SSP1_DATA7 250 MX23_PAD_SSP1_CMD__SSP1_CMD 251 MX23_PAD_SSP1_DETECT__SSP1_DETECT 252 MX23_PAD_SSP1_SCK__SSP1_SCK 253 >; 254 fsl,drive-strength = <MXS_DRIVE_8mA>; 255 fsl,voltage = <MXS_VOLTAGE_HIGH>; 256 fsl,pull-up = <MXS_PULL_ENABLE>; 257 }; 258 259 mmc0_pins_fixup: mmc0-pins-fixup@0 { 260 reg = <0>; 261 fsl,pinmux-ids = < 262 MX23_PAD_SSP1_DETECT__SSP1_DETECT 263 MX23_PAD_SSP1_SCK__SSP1_SCK 264 >; 265 fsl,pull-up = <MXS_PULL_DISABLE>; 266 }; 267 268 mmc0_sck_cfg: mmc0-sck-cfg@0 { 269 reg = <0>; 270 fsl,pinmux-ids = < 271 MX23_PAD_SSP1_SCK__SSP1_SCK 272 >; 273 fsl,pull-up = <MXS_PULL_DISABLE>; 274 }; 275 276 mmc1_4bit_pins_a: mmc1-4bit@0 { 277 reg = <0>; 278 fsl,pinmux-ids = < 279 MX23_PAD_GPMI_D00__SSP2_DATA0 280 MX23_PAD_GPMI_D01__SSP2_DATA1 281 MX23_PAD_GPMI_D02__SSP2_DATA2 282 MX23_PAD_GPMI_D03__SSP2_DATA3 283 MX23_PAD_GPMI_RDY1__SSP2_CMD 284 MX23_PAD_GPMI_WRN__SSP2_SCK 285 >; 286 fsl,drive-strength = <MXS_DRIVE_8mA>; 287 fsl,voltage = <MXS_VOLTAGE_HIGH>; 288 fsl,pull-up = <MXS_PULL_ENABLE>; 289 }; 290 291 mmc1_8bit_pins_a: mmc1-8bit@0 { 292 reg = <0>; 293 fsl,pinmux-ids = < 294 MX23_PAD_GPMI_D00__SSP2_DATA0 295 MX23_PAD_GPMI_D01__SSP2_DATA1 296 MX23_PAD_GPMI_D02__SSP2_DATA2 297 MX23_PAD_GPMI_D03__SSP2_DATA3 298 MX23_PAD_GPMI_D04__SSP2_DATA4 299 MX23_PAD_GPMI_D05__SSP2_DATA5 300 MX23_PAD_GPMI_D06__SSP2_DATA6 301 MX23_PAD_GPMI_D07__SSP2_DATA7 302 MX23_PAD_GPMI_RDY1__SSP2_CMD 303 MX23_PAD_GPMI_WRN__SSP2_SCK 304 >; 305 fsl,drive-strength = <MXS_DRIVE_8mA>; 306 fsl,voltage = <MXS_VOLTAGE_HIGH>; 307 fsl,pull-up = <MXS_PULL_ENABLE>; 308 }; 309 310 pwm2_pins_a: pwm2@0 { 311 reg = <0>; 312 fsl,pinmux-ids = < 313 MX23_PAD_PWM2__PWM2 314 >; 315 fsl,drive-strength = <MXS_DRIVE_4mA>; 316 fsl,voltage = <MXS_VOLTAGE_HIGH>; 317 fsl,pull-up = <MXS_PULL_DISABLE>; 318 }; 319 320 lcdif_24bit_pins_a: lcdif-24bit@0 { 321 reg = <0>; 322 fsl,pinmux-ids = < 323 MX23_PAD_LCD_D00__LCD_D00 324 MX23_PAD_LCD_D01__LCD_D01 325 MX23_PAD_LCD_D02__LCD_D02 326 MX23_PAD_LCD_D03__LCD_D03 327 MX23_PAD_LCD_D04__LCD_D04 328 MX23_PAD_LCD_D05__LCD_D05 329 MX23_PAD_LCD_D06__LCD_D06 330 MX23_PAD_LCD_D07__LCD_D07 331 MX23_PAD_LCD_D08__LCD_D08 332 MX23_PAD_LCD_D09__LCD_D09 333 MX23_PAD_LCD_D10__LCD_D10 334 MX23_PAD_LCD_D11__LCD_D11 335 MX23_PAD_LCD_D12__LCD_D12 336 MX23_PAD_LCD_D13__LCD_D13 337 MX23_PAD_LCD_D14__LCD_D14 338 MX23_PAD_LCD_D15__LCD_D15 339 MX23_PAD_LCD_D16__LCD_D16 340 MX23_PAD_LCD_D17__LCD_D17 341 MX23_PAD_GPMI_D08__LCD_D18 342 MX23_PAD_GPMI_D09__LCD_D19 343 MX23_PAD_GPMI_D10__LCD_D20 344 MX23_PAD_GPMI_D11__LCD_D21 345 MX23_PAD_GPMI_D12__LCD_D22 346 MX23_PAD_GPMI_D13__LCD_D23 347 MX23_PAD_LCD_DOTCK__LCD_DOTCK 348 MX23_PAD_LCD_ENABLE__LCD_ENABLE 349 MX23_PAD_LCD_HSYNC__LCD_HSYNC 350 MX23_PAD_LCD_VSYNC__LCD_VSYNC 351 >; 352 fsl,drive-strength = <MXS_DRIVE_4mA>; 353 fsl,voltage = <MXS_VOLTAGE_HIGH>; 354 fsl,pull-up = <MXS_PULL_DISABLE>; 355 }; 356 357 spi2_pins_a: spi2@0 { 358 reg = <0>; 359 fsl,pinmux-ids = < 360 MX23_PAD_GPMI_WRN__SSP2_SCK 361 MX23_PAD_GPMI_RDY1__SSP2_CMD 362 MX23_PAD_GPMI_D00__SSP2_DATA0 363 MX23_PAD_GPMI_D03__SSP2_DATA3 364 >; 365 fsl,drive-strength = <MXS_DRIVE_8mA>; 366 fsl,voltage = <MXS_VOLTAGE_HIGH>; 367 fsl,pull-up = <MXS_PULL_ENABLE>; 368 }; 369 370 i2c_pins_a: i2c@0 { 371 reg = <0>; 372 fsl,pinmux-ids = < 373 MX23_PAD_I2C_SCL__I2C_SCL 374 MX23_PAD_I2C_SDA__I2C_SDA 375 >; 376 fsl,drive-strength = <MXS_DRIVE_8mA>; 377 fsl,voltage = <MXS_VOLTAGE_HIGH>; 378 fsl,pull-up = <MXS_PULL_ENABLE>; 379 }; 380 381 i2c_pins_b: i2c@1 { 382 reg = <1>; 383 fsl,pinmux-ids = < 384 MX23_PAD_LCD_ENABLE__I2C_SCL 385 MX23_PAD_LCD_HSYNC__I2C_SDA 386 >; 387 fsl,drive-strength = <MXS_DRIVE_8mA>; 388 fsl,voltage = <MXS_VOLTAGE_HIGH>; 389 fsl,pull-up = <MXS_PULL_ENABLE>; 390 }; 391 392 i2c_pins_c: i2c@2 { 393 reg = <2>; 394 fsl,pinmux-ids = < 395 MX23_PAD_SSP1_DATA1__I2C_SCL 396 MX23_PAD_SSP1_DATA2__I2C_SDA 397 >; 398 fsl,drive-strength = <MXS_DRIVE_8mA>; 399 fsl,voltage = <MXS_VOLTAGE_HIGH>; 400 fsl,pull-up = <MXS_PULL_ENABLE>; 401 }; 402 }; 403 404 digctl@8001c000 { 405 compatible = "fsl,imx23-digctl"; 406 reg = <0x8001c000 2000>; 407 status = "disabled"; 408 }; 409 410 emi@80020000 { 411 reg = <0x80020000 0x2000>; 412 status = "disabled"; 413 }; 414 415 dma_apbx: dma-controller@80024000 { 416 compatible = "fsl,imx23-dma-apbx"; 417 reg = <0x80024000 0x2000>; 418 interrupts = <7>, <5>, <9>, <26>, 419 <19>, <0>, <25>, <23>, 420 <60>, <58>, <9>, <0>, 421 <0>, <0>, <0>, <0>; 422 interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c", 423 "saif0", "empty", "auart0-rx", "auart0-tx", 424 "auart1-rx", "auart1-tx", "saif1", "empty", 425 "empty", "empty", "empty", "empty"; 426 #dma-cells = <1>; 427 dma-channels = <16>; 428 clocks = <&clks 16>; 429 }; 430 431 dcp: crypto@80028000 { 432 compatible = "fsl,imx23-dcp"; 433 reg = <0x80028000 0x2000>; 434 interrupts = <53>, <54>; 435 status = "okay"; 436 }; 437 438 pxp@8002a000 { 439 reg = <0x8002a000 0x2000>; 440 status = "disabled"; 441 }; 442 443 efuse@8002c000 { 444 compatible = "fsl,imx23-ocotp", "fsl,ocotp"; 445 #address-cells = <1>; 446 #size-cells = <1>; 447 reg = <0x8002c000 0x2000>; 448 clocks = <&clks 15>; 449 }; 450 451 axi-ahb@8002e000 { 452 reg = <0x8002e000 0x2000>; 453 status = "disabled"; 454 }; 455 456 lcdif@80030000 { 457 compatible = "fsl,imx23-lcdif"; 458 reg = <0x80030000 2000>; 459 interrupts = <46>, <45>; 460 clocks = <&clks 38>; 461 status = "disabled"; 462 }; 463 464 ssp1: spi@80034000 { 465 reg = <0x80034000 0x2000>; 466 interrupts = <2>; 467 clocks = <&clks 33>; 468 dmas = <&dma_apbh 2>; 469 dma-names = "rx-tx"; 470 status = "disabled"; 471 }; 472 473 tvenc@80038000 { 474 reg = <0x80038000 0x2000>; 475 status = "disabled"; 476 }; 477 }; 478 479 apbx@80040000 { 480 compatible = "simple-bus"; 481 #address-cells = <1>; 482 #size-cells = <1>; 483 reg = <0x80040000 0x40000>; 484 ranges; 485 486 clks: clkctrl@80040000 { 487 compatible = "fsl,imx23-clkctrl"; 488 reg = <0x80040000 0x2000>; 489 #clock-cells = <1>; 490 }; 491 492 saif0: saif@80042000 { 493 reg = <0x80042000 0x2000>; 494 dmas = <&dma_apbx 4>; 495 dma-names = "rx-tx"; 496 status = "disabled"; 497 }; 498 499 power@80044000 { 500 reg = <0x80044000 0x2000>; 501 status = "disabled"; 502 }; 503 504 saif1: saif@80046000 { 505 reg = <0x80046000 0x2000>; 506 dmas = <&dma_apbx 10>; 507 dma-names = "rx-tx"; 508 status = "disabled"; 509 }; 510 511 audio-out@80048000 { 512 reg = <0x80048000 0x2000>; 513 dmas = <&dma_apbx 1>; 514 dma-names = "tx"; 515 status = "disabled"; 516 }; 517 518 audio-in@8004c000 { 519 reg = <0x8004c000 0x2000>; 520 dmas = <&dma_apbx 0>; 521 dma-names = "rx"; 522 status = "disabled"; 523 }; 524 525 lradc: lradc@80050000 { 526 compatible = "fsl,imx23-lradc"; 527 reg = <0x80050000 0x2000>; 528 interrupts = <36>, <37>, <38>, <39>, <40>, 529 <41>, <42>, <43>, <44>; 530 status = "disabled"; 531 clocks = <&clks 26>; 532 #io-channel-cells = <1>; 533 }; 534 535 spdif@80054000 { 536 reg = <0x80054000 2000>; 537 dmas = <&dma_apbx 2>; 538 dma-names = "tx"; 539 status = "disabled"; 540 }; 541 542 i2c: i2c@80058000 { 543 #address-cells = <1>; 544 #size-cells = <0>; 545 compatible = "fsl,imx23-i2c"; 546 reg = <0x80058000 0x2000>; 547 interrupts = <27>; 548 clock-frequency = <100000>; 549 dmas = <&dma_apbx 3>; 550 dma-names = "rx-tx"; 551 status = "disabled"; 552 }; 553 554 rtc@8005c000 { 555 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc"; 556 reg = <0x8005c000 0x2000>; 557 interrupts = <22>; 558 }; 559 560 pwm: pwm@80064000 { 561 compatible = "fsl,imx23-pwm"; 562 reg = <0x80064000 0x2000>; 563 clocks = <&clks 30>; 564 #pwm-cells = <3>; 565 fsl,pwm-number = <5>; 566 status = "disabled"; 567 }; 568 569 timrot@80068000 { 570 compatible = "fsl,imx23-timrot", "fsl,timrot"; 571 reg = <0x80068000 0x2000>; 572 interrupts = <28>, <29>, <30>, <31>; 573 clocks = <&clks 28>; 574 }; 575 576 auart0: serial@8006c000 { 577 compatible = "fsl,imx23-auart"; 578 reg = <0x8006c000 0x2000>; 579 interrupts = <24>; 580 clocks = <&clks 32>; 581 dmas = <&dma_apbx 6>, <&dma_apbx 7>; 582 dma-names = "rx", "tx"; 583 status = "disabled"; 584 }; 585 586 auart1: serial@8006e000 { 587 compatible = "fsl,imx23-auart"; 588 reg = <0x8006e000 0x2000>; 589 interrupts = <59>; 590 clocks = <&clks 32>; 591 dmas = <&dma_apbx 8>, <&dma_apbx 9>; 592 dma-names = "rx", "tx"; 593 status = "disabled"; 594 }; 595 596 duart: serial@80070000 { 597 compatible = "arm,pl011", "arm,primecell"; 598 reg = <0x80070000 0x2000>; 599 interrupts = <0>; 600 clocks = <&clks 32>, <&clks 16>; 601 clock-names = "uartclk", "apb_pclk"; 602 status = "disabled"; 603 }; 604 605 usbphy0: usbphy@8007c000 { 606 compatible = "fsl,imx23-usbphy"; 607 reg = <0x8007c000 0x2000>; 608 clocks = <&clks 41>; 609 status = "disabled"; 610 }; 611 }; 612 }; 613 614 ahb@80080000 { 615 compatible = "simple-bus"; 616 #address-cells = <1>; 617 #size-cells = <1>; 618 reg = <0x80080000 0x80000>; 619 ranges; 620 621 usb0: usb@80080000 { 622 compatible = "fsl,imx23-usb", "fsl,imx27-usb"; 623 reg = <0x80080000 0x40000>; 624 interrupts = <11>; 625 fsl,usbphy = <&usbphy0>; 626 clocks = <&clks 40>; 627 status = "disabled"; 628 }; 629 }; 630 631 iio-hwmon { 632 compatible = "iio-hwmon"; 633 io-channels = <&lradc 8>; 634 }; 635}; 636