xref: /freebsd/sys/contrib/device-tree/src/arm/nxp/imx/imx6ull-jozacp.dts (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2*f126890aSEmmanuel Vadot/*
3*f126890aSEmmanuel Vadot * Copyright (c) 2020 Protonic Holland
4*f126890aSEmmanuel Vadot * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
5*f126890aSEmmanuel Vadot */
6*f126890aSEmmanuel Vadot
7*f126890aSEmmanuel Vadot/dts-v1/;
8*f126890aSEmmanuel Vadot
9*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h>
10*f126890aSEmmanuel Vadot#include <dt-bindings/leds/common.h>
11*f126890aSEmmanuel Vadot#include "imx6ull.dtsi"
12*f126890aSEmmanuel Vadot
13*f126890aSEmmanuel Vadot/ {
14*f126890aSEmmanuel Vadot	model = "JOZ Access Point";
15*f126890aSEmmanuel Vadot	compatible = "joz,jozacp", "fsl,imx6ull";
16*f126890aSEmmanuel Vadot
17*f126890aSEmmanuel Vadot	chosen {
18*f126890aSEmmanuel Vadot		stdout-path = &uart1;
19*f126890aSEmmanuel Vadot	};
20*f126890aSEmmanuel Vadot
21*f126890aSEmmanuel Vadot	/* On board name LED_RGB1 */
22*f126890aSEmmanuel Vadot	led-controller-1 {
23*f126890aSEmmanuel Vadot		compatible = "pwm-leds";
24*f126890aSEmmanuel Vadot
25*f126890aSEmmanuel Vadot		led-0 {
26*f126890aSEmmanuel Vadot			color = <LED_COLOR_ID_RED>;
27*f126890aSEmmanuel Vadot			function = LED_FUNCTION_INDICATOR;
28*f126890aSEmmanuel Vadot			function-enumerator = <0>;
29*f126890aSEmmanuel Vadot			pwms = <&pwm1 0 10000000 0>;
30*f126890aSEmmanuel Vadot			max-brightness = <255>;
31*f126890aSEmmanuel Vadot		};
32*f126890aSEmmanuel Vadot
33*f126890aSEmmanuel Vadot		led-1 {
34*f126890aSEmmanuel Vadot			color = <LED_COLOR_ID_GREEN>;
35*f126890aSEmmanuel Vadot			function = LED_FUNCTION_INDICATOR;
36*f126890aSEmmanuel Vadot			function-enumerator = <1>;
37*f126890aSEmmanuel Vadot			pwms = <&pwm3 0 10000000 0>;
38*f126890aSEmmanuel Vadot			max-brightness = <255>;
39*f126890aSEmmanuel Vadot		};
40*f126890aSEmmanuel Vadot
41*f126890aSEmmanuel Vadot		led-2 {
42*f126890aSEmmanuel Vadot			color = <LED_COLOR_ID_BLUE>;
43*f126890aSEmmanuel Vadot			function = LED_FUNCTION_INDICATOR;
44*f126890aSEmmanuel Vadot			function-enumerator = <2>;
45*f126890aSEmmanuel Vadot			pwms = <&pwm5 0 10000000 0>;
46*f126890aSEmmanuel Vadot			max-brightness = <255>;
47*f126890aSEmmanuel Vadot			linux,default-trigger = "heartbeat";
48*f126890aSEmmanuel Vadot		};
49*f126890aSEmmanuel Vadot	};
50*f126890aSEmmanuel Vadot
51*f126890aSEmmanuel Vadot	/* On board name LED_RGB2 */
52*f126890aSEmmanuel Vadot	led-controller-2 {
53*f126890aSEmmanuel Vadot		compatible = "pwm-leds";
54*f126890aSEmmanuel Vadot
55*f126890aSEmmanuel Vadot		led-3 {
56*f126890aSEmmanuel Vadot			color = <LED_COLOR_ID_RED>;
57*f126890aSEmmanuel Vadot			function = LED_FUNCTION_INDICATOR;
58*f126890aSEmmanuel Vadot			function-enumerator = <3>;
59*f126890aSEmmanuel Vadot			pwms = <&pwm2 0 10000000 0>;
60*f126890aSEmmanuel Vadot			max-brightness = <255>;
61*f126890aSEmmanuel Vadot		};
62*f126890aSEmmanuel Vadot
63*f126890aSEmmanuel Vadot		led-4 {
64*f126890aSEmmanuel Vadot			color = <LED_COLOR_ID_GREEN>;
65*f126890aSEmmanuel Vadot			function = LED_FUNCTION_INDICATOR;
66*f126890aSEmmanuel Vadot			function-enumerator = <4>;
67*f126890aSEmmanuel Vadot			pwms = <&pwm4 0 10000000 0>;
68*f126890aSEmmanuel Vadot			max-brightness = <255>;
69*f126890aSEmmanuel Vadot		};
70*f126890aSEmmanuel Vadot
71*f126890aSEmmanuel Vadot		led-5 {
72*f126890aSEmmanuel Vadot			color = <LED_COLOR_ID_BLUE>;
73*f126890aSEmmanuel Vadot			function = LED_FUNCTION_INDICATOR;
74*f126890aSEmmanuel Vadot			function-enumerator = <5>;
75*f126890aSEmmanuel Vadot			pwms = <&pwm6 0 10000000 0>;
76*f126890aSEmmanuel Vadot			max-brightness = <255>;
77*f126890aSEmmanuel Vadot		};
78*f126890aSEmmanuel Vadot	};
79*f126890aSEmmanuel Vadot
80*f126890aSEmmanuel Vadot	reg_3v3: regulator-3v3 {
81*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
82*f126890aSEmmanuel Vadot		regulator-name = "3v3";
83*f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
84*f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
85*f126890aSEmmanuel Vadot		vin-supply = <&reg_5v0>;
86*f126890aSEmmanuel Vadot	};
87*f126890aSEmmanuel Vadot
88*f126890aSEmmanuel Vadot	reg_5v0: regulator-5v0 {
89*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
90*f126890aSEmmanuel Vadot		regulator-name = "5v0";
91*f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
92*f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
93*f126890aSEmmanuel Vadot	};
94*f126890aSEmmanuel Vadot
95*f126890aSEmmanuel Vadot	reg_vbus: regulator-vbus {
96*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
97*f126890aSEmmanuel Vadot		pinctrl-names = "default";
98*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_vbus>;
99*f126890aSEmmanuel Vadot		regulator-name = "vbus";
100*f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
101*f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
102*f126890aSEmmanuel Vadot		vin-supply = <&reg_5v0>;
103*f126890aSEmmanuel Vadot		gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
104*f126890aSEmmanuel Vadot		enable-active-high;
105*f126890aSEmmanuel Vadot	};
106*f126890aSEmmanuel Vadot
107*f126890aSEmmanuel Vadot	usdhc2_wifi_pwrseq: usdhc2-wifi-pwrseq {
108*f126890aSEmmanuel Vadot		compatible = "mmc-pwrseq-simple";
109*f126890aSEmmanuel Vadot		pinctrl-names = "default";
110*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_wifi_npd>;
111*f126890aSEmmanuel Vadot		reset-gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;
112*f126890aSEmmanuel Vadot	};
113*f126890aSEmmanuel Vadot};
114*f126890aSEmmanuel Vadot
115*f126890aSEmmanuel Vadot&can1 {
116*f126890aSEmmanuel Vadot	pinctrl-names = "default";
117*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_can1>;
118*f126890aSEmmanuel Vadot	status = "okay";
119*f126890aSEmmanuel Vadot};
120*f126890aSEmmanuel Vadot
121*f126890aSEmmanuel Vadot&cpu0 {
122*f126890aSEmmanuel Vadot	clock-frequency = <792000000>;
123*f126890aSEmmanuel Vadot};
124*f126890aSEmmanuel Vadot
125*f126890aSEmmanuel Vadot&fec1 {
126*f126890aSEmmanuel Vadot	pinctrl-names = "default";
127*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_enet1>;
128*f126890aSEmmanuel Vadot	phy-mode = "rmii";
129*f126890aSEmmanuel Vadot	phy-handle = <&ethphy0>;
130*f126890aSEmmanuel Vadot	status = "okay";
131*f126890aSEmmanuel Vadot
132*f126890aSEmmanuel Vadot	mdio {
133*f126890aSEmmanuel Vadot		#address-cells = <1>;
134*f126890aSEmmanuel Vadot		#size-cells = <0>;
135*f126890aSEmmanuel Vadot
136*f126890aSEmmanuel Vadot		ethphy0: ethernet-phy@0 {
137*f126890aSEmmanuel Vadot			reg = <0>;
138*f126890aSEmmanuel Vadot			clocks = <&clks IMX6UL_CLK_ENET_REF>;
139*f126890aSEmmanuel Vadot			clock-names = "rmii-ref";
140*f126890aSEmmanuel Vadot			interrupts-extended = <&gpio1 29 IRQ_TYPE_LEVEL_LOW>;
141*f126890aSEmmanuel Vadot			reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
142*f126890aSEmmanuel Vadot			reset-assert-us = <10000>;
143*f126890aSEmmanuel Vadot			reset-deassert-us = <300>;
144*f126890aSEmmanuel Vadot		};
145*f126890aSEmmanuel Vadot	};
146*f126890aSEmmanuel Vadot};
147*f126890aSEmmanuel Vadot
148*f126890aSEmmanuel Vadot&i2c1 {
149*f126890aSEmmanuel Vadot	pinctrl-names = "default";
150*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_i2c1>;
151*f126890aSEmmanuel Vadot	clock-frequency = <100000>;
152*f126890aSEmmanuel Vadot	status = "okay";
153*f126890aSEmmanuel Vadot};
154*f126890aSEmmanuel Vadot
155*f126890aSEmmanuel Vadot&i2c2 {
156*f126890aSEmmanuel Vadot	pinctrl-names = "default";
157*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_i2c2>;
158*f126890aSEmmanuel Vadot	clock-frequency = <100000>;
159*f126890aSEmmanuel Vadot	status = "okay";
160*f126890aSEmmanuel Vadot
161*f126890aSEmmanuel Vadot	rtc@51 {
162*f126890aSEmmanuel Vadot		compatible = "nxp,pcf8563";
163*f126890aSEmmanuel Vadot		reg = <0x51>;
164*f126890aSEmmanuel Vadot	};
165*f126890aSEmmanuel Vadot};
166*f126890aSEmmanuel Vadot
167*f126890aSEmmanuel Vadot&pwm1 {
168*f126890aSEmmanuel Vadot	pinctrl-names = "default";
169*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm1>;
170*f126890aSEmmanuel Vadot	status = "okay";
171*f126890aSEmmanuel Vadot};
172*f126890aSEmmanuel Vadot
173*f126890aSEmmanuel Vadot&pwm2 {
174*f126890aSEmmanuel Vadot	pinctrl-names = "default";
175*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm2>;
176*f126890aSEmmanuel Vadot	status = "okay";
177*f126890aSEmmanuel Vadot};
178*f126890aSEmmanuel Vadot
179*f126890aSEmmanuel Vadot&pwm3 {
180*f126890aSEmmanuel Vadot	pinctrl-names = "default";
181*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm3>;
182*f126890aSEmmanuel Vadot	status = "okay";
183*f126890aSEmmanuel Vadot};
184*f126890aSEmmanuel Vadot
185*f126890aSEmmanuel Vadot&pwm4 {
186*f126890aSEmmanuel Vadot	pinctrl-names = "default";
187*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm4>;
188*f126890aSEmmanuel Vadot	status = "okay";
189*f126890aSEmmanuel Vadot};
190*f126890aSEmmanuel Vadot
191*f126890aSEmmanuel Vadot&pwm5 {
192*f126890aSEmmanuel Vadot	pinctrl-names = "default";
193*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm5>;
194*f126890aSEmmanuel Vadot	status = "okay";
195*f126890aSEmmanuel Vadot};
196*f126890aSEmmanuel Vadot
197*f126890aSEmmanuel Vadot&pwm6 {
198*f126890aSEmmanuel Vadot	pinctrl-names = "default";
199*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm6>;
200*f126890aSEmmanuel Vadot	status = "okay";
201*f126890aSEmmanuel Vadot};
202*f126890aSEmmanuel Vadot
203*f126890aSEmmanuel Vadot&snvs_rtc {
204*f126890aSEmmanuel Vadot	status = "disabled";
205*f126890aSEmmanuel Vadot};
206*f126890aSEmmanuel Vadot
207*f126890aSEmmanuel Vadot&uart1 {
208*f126890aSEmmanuel Vadot	pinctrl-names = "default";
209*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart1>;
210*f126890aSEmmanuel Vadot	status = "okay";
211*f126890aSEmmanuel Vadot};
212*f126890aSEmmanuel Vadot
213*f126890aSEmmanuel Vadot&uart4 {
214*f126890aSEmmanuel Vadot	pinctrl-names = "default";
215*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart4>;
216*f126890aSEmmanuel Vadot	dtr-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
217*f126890aSEmmanuel Vadot	uart-has-rtscts;
218*f126890aSEmmanuel Vadot	status = "okay";
219*f126890aSEmmanuel Vadot};
220*f126890aSEmmanuel Vadot
221*f126890aSEmmanuel Vadot&usbotg1 {
222*f126890aSEmmanuel Vadot	pinctrl-names = "default";
223*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usbotg1>;
224*f126890aSEmmanuel Vadot	vbus-supply = <&reg_vbus>;
225*f126890aSEmmanuel Vadot	dr_mode = "host";
226*f126890aSEmmanuel Vadot	over-current-active-low;
227*f126890aSEmmanuel Vadot	status = "okay";
228*f126890aSEmmanuel Vadot};
229*f126890aSEmmanuel Vadot
230*f126890aSEmmanuel Vadot&usdhc1 {
231*f126890aSEmmanuel Vadot	pinctrl-names = "default";
232*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc1>;
233*f126890aSEmmanuel Vadot	vmmc-supply = <&reg_3v3>;
234*f126890aSEmmanuel Vadot	bus-width = <8>;
235*f126890aSEmmanuel Vadot	no-1-8-v;
236*f126890aSEmmanuel Vadot	non-removable;
237*f126890aSEmmanuel Vadot	cap-mmc-hw-reset;
238*f126890aSEmmanuel Vadot	no-sd;
239*f126890aSEmmanuel Vadot	no-sdio;
240*f126890aSEmmanuel Vadot	status = "okay";
241*f126890aSEmmanuel Vadot};
242*f126890aSEmmanuel Vadot
243*f126890aSEmmanuel Vadot&usdhc2 {
244*f126890aSEmmanuel Vadot	pinctrl-names = "default";
245*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc2>;
246*f126890aSEmmanuel Vadot	mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
247*f126890aSEmmanuel Vadot	bus-width = <4>;
248*f126890aSEmmanuel Vadot	no-1-8-v;
249*f126890aSEmmanuel Vadot	no-mmc;
250*f126890aSEmmanuel Vadot	no-sd;
251*f126890aSEmmanuel Vadot	non-removable;
252*f126890aSEmmanuel Vadot	#address-cells = <1>;
253*f126890aSEmmanuel Vadot	#size-cells = <0>;
254*f126890aSEmmanuel Vadot	status = "okay";
255*f126890aSEmmanuel Vadot
256*f126890aSEmmanuel Vadot	wifi@1 {
257*f126890aSEmmanuel Vadot		compatible = "brcm,bcm4329-fmac";
258*f126890aSEmmanuel Vadot		reg = <1>;
259*f126890aSEmmanuel Vadot	};
260*f126890aSEmmanuel Vadot};
261*f126890aSEmmanuel Vadot
262*f126890aSEmmanuel Vadot&iomuxc {
263*f126890aSEmmanuel Vadot	pinctrl-names = "default";
264*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_hog>;
265*f126890aSEmmanuel Vadot
266*f126890aSEmmanuel Vadot	pinctrl_can1: can1grp {
267*f126890aSEmmanuel Vadot		fsl,pins = <
268*f126890aSEmmanuel Vadot			MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	0x1b0b0
269*f126890aSEmmanuel Vadot			MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	0x1b0b0
270*f126890aSEmmanuel Vadot		>;
271*f126890aSEmmanuel Vadot	};
272*f126890aSEmmanuel Vadot
273*f126890aSEmmanuel Vadot	pinctrl_enet1: enet1grp {
274*f126890aSEmmanuel Vadot		fsl,pins = <
275*f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO07__ENET1_MDC	 0x1b0b0
276*f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO06__ENET1_MDIO	0x1b0b0
277*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	0x1b0b0
278*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER	0x1b0b0
279*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00	0x1b0b0
280*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01	0x1b0b0
281*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	0x1b0b0
282*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	0x1b0b0
283*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	0x1b0b0
284*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x4001b031
285*f126890aSEmmanuel Vadot
286*f126890aSEmmanuel Vadot			MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28	0x038b0
287*f126890aSEmmanuel Vadot			MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29	0x170b0
288*f126890aSEmmanuel Vadot		>;
289*f126890aSEmmanuel Vadot	};
290*f126890aSEmmanuel Vadot
291*f126890aSEmmanuel Vadot	pinctrl_hog: hoggrp {
292*f126890aSEmmanuel Vadot		fsl,pins = <
293*f126890aSEmmanuel Vadot			/* HW Revision */
294*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08	0x1b0b0
295*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09	0x1b0b0
296*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10	0x1b0b0
297*f126890aSEmmanuel Vadot
298*f126890aSEmmanuel Vadot			/* HW ID */
299*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11	0x1b0b0
300*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12	0x1b0b0
301*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13	0x1b0b0
302*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14	0x1b0b0
303*f126890aSEmmanuel Vadot			MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15	0x1b0b0
304*f126890aSEmmanuel Vadot
305*f126890aSEmmanuel Vadot			/* Digital inputs */
306*f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0x11000
307*f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO04__GPIO1_IO04	0x11000
308*f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO05__GPIO1_IO05	0x11000
309*f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO08__GPIO1_IO08	0x11000
310*f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO09__GPIO1_IO09	0x11000
311*f126890aSEmmanuel Vadot
312*f126890aSEmmanuel Vadot			/* Isolated outputs */
313*f126890aSEmmanuel Vadot			MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20	0x01020
314*f126890aSEmmanuel Vadot			MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21	0x01020
315*f126890aSEmmanuel Vadot			MX6UL_PAD_UART2_RTS_B__GPIO1_IO23	0x01020
316*f126890aSEmmanuel Vadot			MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24	0x01020
317*f126890aSEmmanuel Vadot			MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25	0x01020
318*f126890aSEmmanuel Vadot		>;
319*f126890aSEmmanuel Vadot	};
320*f126890aSEmmanuel Vadot
321*f126890aSEmmanuel Vadot	pinctrl_i2c1: i2c1grp {
322*f126890aSEmmanuel Vadot		fsl,pins = <
323*f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_MCLK__I2C1_SDA		0x4001f8b1
324*f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_PIXCLK__I2C1_SCL		0x4001f8b1
325*f126890aSEmmanuel Vadot		>;
326*f126890aSEmmanuel Vadot	};
327*f126890aSEmmanuel Vadot
328*f126890aSEmmanuel Vadot	pinctrl_i2c2: i2c2grp {
329*f126890aSEmmanuel Vadot		fsl,pins = <
330*f126890aSEmmanuel Vadot			MX6UL_PAD_UART5_RX_DATA__I2C2_SDA	0x4001f8b1
331*f126890aSEmmanuel Vadot			MX6UL_PAD_UART5_TX_DATA__I2C2_SCL	0x4001f8b1
332*f126890aSEmmanuel Vadot		>;
333*f126890aSEmmanuel Vadot	};
334*f126890aSEmmanuel Vadot
335*f126890aSEmmanuel Vadot	pinctrl_pwm1: pwm1grp {
336*f126890aSEmmanuel Vadot		fsl,pins = <
337*f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA00__PWM1_OUT		0x01010
338*f126890aSEmmanuel Vadot		>;
339*f126890aSEmmanuel Vadot	};
340*f126890aSEmmanuel Vadot
341*f126890aSEmmanuel Vadot	pinctrl_pwm2: pwm2grp {
342*f126890aSEmmanuel Vadot		fsl,pins = <
343*f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA01__PWM2_OUT		0x01010
344*f126890aSEmmanuel Vadot		>;
345*f126890aSEmmanuel Vadot	};
346*f126890aSEmmanuel Vadot
347*f126890aSEmmanuel Vadot	pinctrl_pwm3: pwm3grp {
348*f126890aSEmmanuel Vadot		fsl,pins = <
349*f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA02__PWM3_OUT		0x01010
350*f126890aSEmmanuel Vadot		>;
351*f126890aSEmmanuel Vadot	};
352*f126890aSEmmanuel Vadot
353*f126890aSEmmanuel Vadot	pinctrl_pwm4: pwm4grp {
354*f126890aSEmmanuel Vadot		fsl,pins = <
355*f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA03__PWM4_OUT		0x01010
356*f126890aSEmmanuel Vadot		>;
357*f126890aSEmmanuel Vadot	};
358*f126890aSEmmanuel Vadot
359*f126890aSEmmanuel Vadot	pinctrl_pwm5: pwm5grp {
360*f126890aSEmmanuel Vadot		fsl,pins = <
361*f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA18__PWM5_OUT		0x01010
362*f126890aSEmmanuel Vadot		>;
363*f126890aSEmmanuel Vadot	};
364*f126890aSEmmanuel Vadot
365*f126890aSEmmanuel Vadot	pinctrl_pwm6: pwm6grp {
366*f126890aSEmmanuel Vadot		fsl,pins = <
367*f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_DATA19__PWM6_OUT		0x01010
368*f126890aSEmmanuel Vadot		>;
369*f126890aSEmmanuel Vadot	};
370*f126890aSEmmanuel Vadot
371*f126890aSEmmanuel Vadot	pinctrl_uart1: uart1grp {
372*f126890aSEmmanuel Vadot		fsl,pins = <
373*f126890aSEmmanuel Vadot			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1
374*f126890aSEmmanuel Vadot			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1
375*f126890aSEmmanuel Vadot		>;
376*f126890aSEmmanuel Vadot	};
377*f126890aSEmmanuel Vadot
378*f126890aSEmmanuel Vadot	pinctrl_uart4: uart4grp {
379*f126890aSEmmanuel Vadot		fsl,pins = <
380*f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_CLK__UART4_DCE_TX		0x1b0b0
381*f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_ENABLE__UART4_DCE_RX	0x1b0b0
382*f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_HSYNC__UART4_DCE_CTS	0x1b0b0
383*f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_VSYNC__UART4_DCE_RTS	0x1b0b0
384*f126890aSEmmanuel Vadot			MX6UL_PAD_LCD_RESET__GPIO3_IO04		0x1b0b0
385*f126890aSEmmanuel Vadot		>;
386*f126890aSEmmanuel Vadot	};
387*f126890aSEmmanuel Vadot
388*f126890aSEmmanuel Vadot	pinctrl_usbotg1: usbotg1grp {
389*f126890aSEmmanuel Vadot		fsl,pins = <
390*f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO01__USB_OTG1_OC	0x1b0b0
391*f126890aSEmmanuel Vadot		>;
392*f126890aSEmmanuel Vadot	};
393*f126890aSEmmanuel Vadot
394*f126890aSEmmanuel Vadot	pinctrl_usdhc1: usdhc1grp {
395*f126890aSEmmanuel Vadot		fsl,pins = <
396*f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_WP_B__USDHC1_RESET_B	0x17099
397*f126890aSEmmanuel Vadot			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x1f099
398*f126890aSEmmanuel Vadot			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x10099
399*f126890aSEmmanuel Vadot			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x17099
400*f126890aSEmmanuel Vadot			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x17099
401*f126890aSEmmanuel Vadot			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x17099
402*f126890aSEmmanuel Vadot			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x17099
403*f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_READY_B__USDHC1_DATA4	0x17099
404*f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5	0x17099
405*f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6	0x17099
406*f126890aSEmmanuel Vadot			MX6UL_PAD_NAND_CLE__USDHC1_DATA7	0x17099
407*f126890aSEmmanuel Vadot		>;
408*f126890aSEmmanuel Vadot	};
409*f126890aSEmmanuel Vadot
410*f126890aSEmmanuel Vadot	pinctrl_usdhc2: usdhc2grp {
411*f126890aSEmmanuel Vadot		fsl,pins = <
412*f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_VSYNC__USDHC2_CLK		0x100b9
413*f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_HSYNC__USDHC2_CMD		0x170b9
414*f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_DATA00__USDHC2_DATA0	0x170b9
415*f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_DATA01__USDHC2_DATA1	0x170b9
416*f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_DATA02__USDHC2_DATA2	0x170b9
417*f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_DATA03__USDHC2_DATA3	0x170b9
418*f126890aSEmmanuel Vadot		>;
419*f126890aSEmmanuel Vadot	};
420*f126890aSEmmanuel Vadot
421*f126890aSEmmanuel Vadot	pinctrl_vbus: vbus0grp {
422*f126890aSEmmanuel Vadot		fsl,pins = <
423*f126890aSEmmanuel Vadot			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0x030b0
424*f126890aSEmmanuel Vadot		>;
425*f126890aSEmmanuel Vadot	};
426*f126890aSEmmanuel Vadot
427*f126890aSEmmanuel Vadot	pinctrl_wifi_npd: wifigrp {
428*f126890aSEmmanuel Vadot		fsl,pins = <
429*f126890aSEmmanuel Vadot			/* WL_REG_ON */
430*f126890aSEmmanuel Vadot			MX6UL_PAD_CSI_DATA04__GPIO4_IO25	0x03020
431*f126890aSEmmanuel Vadot		>;
432*f126890aSEmmanuel Vadot	};
433*f126890aSEmmanuel Vadot};
434*f126890aSEmmanuel Vadot
435*f126890aSEmmanuel Vadot&iomuxc_snvs {
436*f126890aSEmmanuel Vadot	pinctrl-names = "default";
437*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_snvs_hog>;
438*f126890aSEmmanuel Vadot
439*f126890aSEmmanuel Vadot	pinctrl_snvs_hog: snvs-hog-grp {
440*f126890aSEmmanuel Vadot		fsl,pins = <
441*f126890aSEmmanuel Vadot			/* Digital outputs */
442*f126890aSEmmanuel Vadot			MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02	0x00020
443*f126890aSEmmanuel Vadot			MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03	0x00020
444*f126890aSEmmanuel Vadot			MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04	0x00020
445*f126890aSEmmanuel Vadot			MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05	0x00020
446*f126890aSEmmanuel Vadot			MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06	0x00020
447*f126890aSEmmanuel Vadot
448*f126890aSEmmanuel Vadot			/* Digital outputs fault feedback */
449*f126890aSEmmanuel Vadot			MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00	0x17000
450*f126890aSEmmanuel Vadot			MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01	0x17000
451*f126890aSEmmanuel Vadot			MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07	0x17000
452*f126890aSEmmanuel Vadot			MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08	0x17000
453*f126890aSEmmanuel Vadot			MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09	0x17000
454*f126890aSEmmanuel Vadot		>;
455*f126890aSEmmanuel Vadot	};
456*f126890aSEmmanuel Vadot};
457