1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device tree for the Tolino Shine 2 HD ebook reader 4 * 5 * Name on mainboard is: 37NB-E60QF0+4A2 or 37NB-E60QF0+4A3 6 * Serials start with: E60QF2 7 * 8 * Copyright 2020 Andreas Kemnade 9 */ 10 11/dts-v1/; 12 13#include <dt-bindings/input/input.h> 14#include <dt-bindings/gpio/gpio.h> 15#include "imx6sl.dtsi" 16 17/ { 18 model = "Tolino Shine 2 HD"; 19 compatible = "kobo,tolino-shine2hd", "fsl,imx6sl"; 20 21 backlight { 22 compatible = "pwm-backlight"; 23 pwms = <&ec 0 50000>; 24 power-supply = <&backlight_regulator>; 25 }; 26 27 backlight_regulator: regulator-backlight { 28 compatible = "regulator-fixed"; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&pinctrl_backlight_power>; 31 regulator-name = "backlight"; 32 gpio = <&gpio2 10 GPIO_ACTIVE_HIGH>; 33 enable-active-high; 34 }; 35 36 chosen { 37 stdout-path = &uart1; 38 }; 39 40 gpio_keys: gpio-keys { 41 compatible = "gpio-keys"; 42 pinctrl-names = "default"; 43 pinctrl-0 = <&pinctrl_gpio_keys>; 44 45 key-cover { 46 label = "Cover"; 47 gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; 48 linux,code = <SW_LID>; 49 linux,input-type = <EV_SW>; 50 wakeup-source; 51 }; 52 53 key-fl { 54 label = "Frontlight"; 55 gpios = <&gpio3 26 GPIO_ACTIVE_LOW>; 56 linux,code = <KEY_BRIGHTNESS_CYCLE>; 57 }; 58 59 key-home { 60 label = "Home"; 61 gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 62 linux,code = <KEY_HOME>; 63 }; 64 65 key-power { 66 label = "Power"; 67 gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; 68 linux,code = <KEY_POWER>; 69 wakeup-source; 70 }; 71 }; 72 73 leds: leds { 74 compatible = "gpio-leds"; 75 pinctrl-names = "default"; 76 pinctrl-0 = <&pinctrl_led>; 77 78 led-0 { 79 label = "tolinoshine2hd:white:on"; 80 gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 81 linux,default-trigger = "timer"; 82 }; 83 84 led-1 { 85 label = "tolinoshine2hd:white:backlightboost"; 86 gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; 87 linux,default-trigger = "off"; 88 }; 89 }; 90 91 memory@80000000 { 92 device_type = "memory"; 93 reg = <0x80000000 0x20000000>; 94 }; 95 96 reg_wifi: regulator-wifi { 97 compatible = "regulator-fixed"; 98 pinctrl-names = "default"; 99 pinctrl-0 = <&pinctrl_wifi_power>; 100 regulator-name = "SD3_SPWR"; 101 regulator-min-microvolt = <3000000>; 102 regulator-max-microvolt = <3000000>; 103 gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; 104 }; 105 106 wifi_pwrseq: wifi_pwrseq { 107 compatible = "mmc-pwrseq-simple"; 108 pinctrl-names = "default"; 109 pinctrl-0 = <&pinctrl_wifi_reset>; 110 post-power-on-delay-ms = <20>; 111 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; 112 }; 113}; 114 115&i2c1 { 116 pinctrl-names = "default","sleep"; 117 pinctrl-0 = <&pinctrl_i2c1>; 118 pinctrl-1 = <&pinctrl_i2c1_sleep>; 119 status = "okay"; 120 121 ec: embedded-controller@43 { 122 compatible = "netronix,ntxec"; 123 reg = <0x43>; 124 #pwm-cells = <2>; 125 }; 126}; 127 128&i2c2 { 129 pinctrl-names = "default","sleep"; 130 pinctrl-0 = <&pinctrl_i2c2>; 131 pinctrl-1 = <&pinctrl_i2c2_sleep>; 132 clock-frequency = <100000>; 133 status = "okay"; 134 135 zforce: touchscreen@50 { 136 compatible = "neonode,zforce"; 137 pinctrl-names = "default"; 138 pinctrl-0 = <&pinctrl_zforce>; 139 reg = <0x50>; 140 interrupt-parent = <&gpio5>; 141 interrupts = <6 IRQ_TYPE_EDGE_FALLING>; 142 vdd-supply = <&ldo1_reg>; 143 reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; 144 x-size = <1072>; 145 y-size = <1448>; 146 }; 147 148 /* TODO: TPS65185 PMIC for E Ink at 0x68 */ 149 150}; 151 152&i2c3 { 153 pinctrl-names = "default"; 154 pinctrl-0 = <&pinctrl_i2c3>; 155 clock-frequency = <400000>; 156 status = "okay"; 157 158 ricoh619: pmic@32 { 159 compatible = "ricoh,rc5t619"; 160 pinctrl-names = "default"; 161 pinctrl-0 = <&pinctrl_ricoh_gpio>; 162 reg = <0x32>; 163 interrupt-parent = <&gpio5>; 164 interrupts = <11 IRQ_TYPE_EDGE_FALLING>; 165 system-power-controller; 166 167 regulators { 168 dcdc1_reg: DCDC1 { 169 regulator-name = "DCDC1"; 170 regulator-min-microvolt = <300000>; 171 regulator-max-microvolt = <1875000>; 172 regulator-always-on; 173 regulator-boot-on; 174 175 regulator-state-mem { 176 regulator-on-in-suspend; 177 regulator-suspend-max-microvolt = <900000>; 178 regulator-suspend-min-microvolt = <900000>; 179 }; 180 }; 181 182 /* Core3_3V3 */ 183 dcdc2_reg: DCDC2 { 184 regulator-name = "DCDC2"; 185 regulator-always-on; 186 regulator-boot-on; 187 188 regulator-state-mem { 189 regulator-on-in-suspend; 190 regulator-suspend-max-microvolt = <3100000>; 191 regulator-suspend-min-microvolt = <3100000>; 192 }; 193 }; 194 195 dcdc3_reg: DCDC3 { 196 regulator-name = "DCDC3"; 197 regulator-min-microvolt = <300000>; 198 regulator-max-microvolt = <1875000>; 199 regulator-always-on; 200 regulator-boot-on; 201 202 regulator-state-mem { 203 regulator-on-in-suspend; 204 regulator-suspend-max-microvolt = <1140000>; 205 regulator-suspend-min-microvolt = <1140000>; 206 }; 207 }; 208 209 /* Core4_1V2 */ 210 dcdc4_reg: DCDC4 { 211 regulator-name = "DCDC4"; 212 regulator-min-microvolt = <1200000>; 213 regulator-max-microvolt = <1200000>; 214 regulator-always-on; 215 regulator-boot-on; 216 217 regulator-state-mem { 218 regulator-on-in-suspend; 219 regulator-suspend-max-microvolt = <1140000>; 220 regulator-suspend-min-microvolt = <1140000>; 221 }; 222 }; 223 224 /* Core4_1V8 */ 225 dcdc5_reg: DCDC5 { 226 regulator-name = "DCDC5"; 227 regulator-min-microvolt = <1800000>; 228 regulator-max-microvolt = <1800000>; 229 regulator-always-on; 230 regulator-boot-on; 231 232 regulator-state-mem { 233 regulator-on-in-suspend; 234 regulator-suspend-max-microvolt = <1700000>; 235 regulator-suspend-min-microvolt = <1700000>; 236 }; 237 }; 238 239 /* IR_3V3 */ 240 ldo1_reg: LDO1 { 241 regulator-name = "LDO1"; 242 regulator-boot-on; 243 }; 244 245 /* Core1_3V3 */ 246 ldo2_reg: LDO2 { 247 regulator-name = "LDO2"; 248 regulator-always-on; 249 regulator-boot-on; 250 251 regulator-state-mem { 252 regulator-on-in-suspend; 253 regulator-suspend-max-microvolt = <3000000>; 254 regulator-suspend-min-microvolt = <3000000>; 255 }; 256 }; 257 258 /* Core5_1V2 */ 259 ldo3_reg: LDO3 { 260 regulator-name = "LDO3"; 261 regulator-always-on; 262 regulator-boot-on; 263 }; 264 265 ldo4_reg: LDO4 { 266 regulator-name = "LDO4"; 267 regulator-boot-on; 268 }; 269 270 /* SPD_3V3 */ 271 ldo5_reg: LDO5 { 272 regulator-name = "LDO5"; 273 regulator-always-on; 274 regulator-boot-on; 275 }; 276 277 /* DDR_0V6 */ 278 ldo6_reg: LDO6 { 279 regulator-name = "LDO6"; 280 regulator-always-on; 281 regulator-boot-on; 282 }; 283 284 /* VDD_PWM */ 285 ldo7_reg: LDO7 { 286 regulator-name = "LDO7"; 287 regulator-always-on; 288 regulator-boot-on; 289 }; 290 291 /* ldo_1v8 */ 292 ldo8_reg: LDO8 { 293 regulator-name = "LDO8"; 294 regulator-min-microvolt = <1800000>; 295 regulator-max-microvolt = <1800000>; 296 regulator-always-on; 297 regulator-boot-on; 298 }; 299 300 ldo9_reg: LDO9 { 301 regulator-name = "LDO9"; 302 regulator-boot-on; 303 }; 304 305 ldo10_reg: LDO10 { 306 regulator-name = "LDO10"; 307 regulator-boot-on; 308 }; 309 310 ldortc1_reg: LDORTC1 { 311 regulator-name = "LDORTC1"; 312 regulator-always-on; 313 regulator-boot-on; 314 }; 315 }; 316 }; 317}; 318 319&iomuxc { 320 pinctrl-names = "default"; 321 pinctrl-0 = <&pinctrl_hog>; 322 323 pinctrl_backlight_power: backlight-powergrp { 324 fsl,pins = < 325 MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x10059 326 >; 327 }; 328 329 pinctrl_gpio_keys: gpio-keysgrp { 330 fsl,pins = < 331 MX6SL_PAD_SD1_DAT1__GPIO5_IO08 0x17059 332 MX6SL_PAD_SD1_DAT4__GPIO5_IO12 0x17059 333 MX6SL_PAD_KEY_COL1__GPIO3_IO26 0x17059 334 MX6SL_PAD_KEY_ROW0__GPIO3_IO25 0x17059 335 >; 336 }; 337 338 pinctrl_hog: hoggrp { 339 fsl,pins = < 340 MX6SL_PAD_LCD_DAT0__GPIO2_IO20 0x79 341 MX6SL_PAD_LCD_DAT1__GPIO2_IO21 0x79 342 MX6SL_PAD_LCD_DAT2__GPIO2_IO22 0x79 343 MX6SL_PAD_LCD_DAT3__GPIO2_IO23 0x79 344 MX6SL_PAD_LCD_DAT4__GPIO2_IO24 0x79 345 MX6SL_PAD_LCD_DAT5__GPIO2_IO25 0x79 346 MX6SL_PAD_LCD_DAT6__GPIO2_IO26 0x79 347 MX6SL_PAD_LCD_DAT7__GPIO2_IO27 0x79 348 MX6SL_PAD_LCD_DAT8__GPIO2_IO28 0x79 349 MX6SL_PAD_LCD_DAT9__GPIO2_IO29 0x79 350 MX6SL_PAD_LCD_DAT10__GPIO2_IO30 0x79 351 MX6SL_PAD_LCD_DAT11__GPIO2_IO31 0x79 352 MX6SL_PAD_LCD_DAT12__GPIO3_IO00 0x79 353 MX6SL_PAD_LCD_DAT13__GPIO3_IO01 0x79 354 MX6SL_PAD_LCD_DAT14__GPIO3_IO02 0x79 355 MX6SL_PAD_LCD_DAT15__GPIO3_IO03 0x79 356 MX6SL_PAD_LCD_DAT16__GPIO3_IO04 0x79 357 MX6SL_PAD_LCD_DAT17__GPIO3_IO05 0x79 358 MX6SL_PAD_LCD_DAT18__GPIO3_IO06 0x79 359 MX6SL_PAD_LCD_DAT19__GPIO3_IO07 0x79 360 MX6SL_PAD_LCD_DAT20__GPIO3_IO08 0x79 361 MX6SL_PAD_LCD_DAT21__GPIO3_IO09 0x79 362 MX6SL_PAD_LCD_DAT22__GPIO3_IO10 0x79 363 MX6SL_PAD_LCD_DAT23__GPIO3_IO11 0x79 364 MX6SL_PAD_LCD_CLK__GPIO2_IO15 0x79 365 MX6SL_PAD_LCD_ENABLE__GPIO2_IO16 0x79 366 MX6SL_PAD_LCD_HSYNC__GPIO2_IO17 0x79 367 MX6SL_PAD_LCD_VSYNC__GPIO2_IO18 0x79 368 MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x79 369 MX6SL_PAD_KEY_COL3__GPIO3_IO30 0x79 370 MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x79 371 MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x79 372 MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x79 373 >; 374 }; 375 376 pinctrl_i2c1: i2c1grp { 377 fsl,pins = < 378 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001f8b1 379 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001f8b1 380 >; 381 }; 382 383 pinctrl_i2c1_sleep: i2c1grp-sleep { 384 fsl,pins = < 385 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x400108b1 386 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x400108b1 387 >; 388 }; 389 390 pinctrl_i2c2: i2c2grp { 391 fsl,pins = < 392 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001f8b1 393 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001f8b1 394 >; 395 }; 396 397 pinctrl_i2c2_sleep: i2c2grp-sleep { 398 fsl,pins = < 399 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x400108b1 400 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x400108b1 401 >; 402 }; 403 404 pinctrl_i2c3: i2c3grp { 405 fsl,pins = < 406 MX6SL_PAD_REF_CLK_24M__I2C3_SCL 0x4001f8b1 407 MX6SL_PAD_REF_CLK_32K__I2C3_SDA 0x4001f8b1 408 >; 409 }; 410 411 pinctrl_led: ledgrp { 412 fsl,pins = < 413 MX6SL_PAD_SD1_DAT2__GPIO5_IO13 0x17059 414 MX6SL_PAD_EPDC_SDCE2__GPIO1_IO29 0x17059 415 >; 416 }; 417 418 pinctrl_ricoh_gpio: ricoh_gpiogrp { 419 fsl,pins = < 420 MX6SL_PAD_SD1_CLK__GPIO5_IO15 0x1b8b1 /* ricoh619 chg */ 421 MX6SL_PAD_SD1_DAT0__GPIO5_IO11 0x1b8b1 /* ricoh619 irq */ 422 MX6SL_PAD_KEY_COL2__GPIO3_IO28 0x1b8b1 /* ricoh619 bat_low_int */ 423 >; 424 }; 425 426 pinctrl_uart1: uart1grp { 427 fsl,pins = < 428 MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1 429 MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1 430 >; 431 }; 432 433 pinctrl_uart4: uart4grp { 434 fsl,pins = < 435 MX6SL_PAD_KEY_ROW6__UART4_TX_DATA 0x1b0b1 436 MX6SL_PAD_KEY_COL6__UART4_RX_DATA 0x1b0b1 437 >; 438 }; 439 440 pinctrl_usbotg1: usbotg1grp { 441 fsl,pins = < 442 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059 443 >; 444 }; 445 446 pinctrl_usdhc2: usdhc2grp { 447 fsl,pins = < 448 MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059 449 MX6SL_PAD_SD2_CLK__SD2_CLK 0x13059 450 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059 451 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059 452 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059 453 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059 454 >; 455 }; 456 457 pinctrl_usdhc2_100mhz: usdhc2grp-100mhz { 458 fsl,pins = < 459 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9 460 MX6SL_PAD_SD2_CLK__SD2_CLK 0x130b9 461 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 462 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 463 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 464 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 465 >; 466 }; 467 468 pinctrl_usdhc2_200mhz: usdhc2grp-200mhz { 469 fsl,pins = < 470 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9 471 MX6SL_PAD_SD2_CLK__SD2_CLK 0x130f9 472 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 473 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 474 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 475 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 476 >; 477 }; 478 479 pinctrl_usdhc2_sleep: usdhc2grp-sleep { 480 fsl,pins = < 481 MX6SL_PAD_SD2_CMD__GPIO5_IO04 0x100f9 482 MX6SL_PAD_SD2_CLK__GPIO5_IO05 0x100f9 483 MX6SL_PAD_SD2_DAT0__GPIO5_IO01 0x100f9 484 MX6SL_PAD_SD2_DAT1__GPIO4_IO30 0x100f9 485 MX6SL_PAD_SD2_DAT2__GPIO5_IO03 0x100f9 486 MX6SL_PAD_SD2_DAT3__GPIO4_IO28 0x100f9 487 >; 488 }; 489 490 pinctrl_usdhc3: usdhc3grp { 491 fsl,pins = < 492 MX6SL_PAD_SD3_CMD__SD3_CMD 0x11059 493 MX6SL_PAD_SD3_CLK__SD3_CLK 0x11059 494 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x11059 495 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x11059 496 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x11059 497 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x11059 498 >; 499 }; 500 501 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { 502 fsl,pins = < 503 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9 504 MX6SL_PAD_SD3_CLK__SD3_CLK 0x170b9 505 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 506 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 507 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 508 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 509 >; 510 }; 511 512 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { 513 fsl,pins = < 514 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9 515 MX6SL_PAD_SD3_CLK__SD3_CLK 0x170f9 516 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 517 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 518 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 519 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 520 >; 521 }; 522 523 pinctrl_usdhc3_sleep: usdhc3grp-sleep { 524 fsl,pins = < 525 MX6SL_PAD_SD3_CMD__GPIO5_IO21 0x100c1 526 MX6SL_PAD_SD3_CLK__GPIO5_IO18 0x100c1 527 MX6SL_PAD_SD3_DAT0__GPIO5_IO19 0x100c1 528 MX6SL_PAD_SD3_DAT1__GPIO5_IO20 0x100c1 529 MX6SL_PAD_SD3_DAT2__GPIO5_IO16 0x100c1 530 MX6SL_PAD_SD3_DAT3__GPIO5_IO17 0x100c1 531 >; 532 }; 533 534 pinctrl_wifi_power: wifi-powergrp { 535 fsl,pins = < 536 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x10059 /* WIFI_3V3_ON */ 537 >; 538 }; 539 540 pinctrl_wifi_reset: wifi-resetgrp { 541 fsl,pins = < 542 MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x10059 /* WIFI_RST */ 543 >; 544 }; 545 546 pinctrl_zforce: zforcegrp { 547 fsl,pins = < 548 MX6SL_PAD_SD1_DAT3__GPIO5_IO06 0x17059 /* TP_INT */ 549 MX6SL_PAD_SD1_DAT5__GPIO5_IO09 0x10059 /* TP_RST */ 550 >; 551 }; 552}; 553 554®_vdd1p1 { 555 vin-supply = <&dcdc2_reg>; 556}; 557 558®_vdd2p5 { 559 vin-supply = <&dcdc2_reg>; 560}; 561 562®_arm { 563 vin-supply = <&dcdc3_reg>; 564}; 565 566®_soc { 567 vin-supply = <&dcdc1_reg>; 568}; 569 570®_pu { 571 vin-supply = <&dcdc1_reg>; 572}; 573 574&snvs_rtc { 575 /* 576 * We are using the RTC in the PMIC, but this one is not disabled 577 * in imx6sl.dtsi. 578 */ 579 status = "disabled"; 580}; 581 582&uart1 { 583 /* J4, through-holes */ 584 pinctrl-names = "default"; 585 pinctrl-0 = <&pinctrl_uart1>; 586 status = "okay"; 587}; 588 589&uart4 { 590 /* TP198, next to J4, SMD pads */ 591 pinctrl-names = "default"; 592 pinctrl-0 = <&pinctrl_uart4>; 593 status = "okay"; 594}; 595 596&usdhc2 { 597 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 598 pinctrl-0 = <&pinctrl_usdhc2>; 599 pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 600 pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 601 pinctrl-3 = <&pinctrl_usdhc2_sleep>; 602 non-removable; 603 status = "okay"; 604 605 /* internal uSD card */ 606}; 607 608&usdhc3 { 609 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 610 pinctrl-0 = <&pinctrl_usdhc3>; 611 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 612 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 613 pinctrl-3 = <&pinctrl_usdhc3_sleep>; 614 vmmc-supply = <®_wifi>; 615 mmc-pwrseq = <&wifi_pwrseq>; 616 cap-power-off-card; 617 non-removable; 618 status = "okay"; 619 620 /* 621 * 37NB-E60QF0+4A2: CyberTan WC121 (BCM43362) SDIO WiFi 622 * 37NB-E60QF0+4A3: RTL8189F SDIO WiFi 623 */ 624}; 625 626&usbotg1 { 627 pinctrl-names = "default"; 628 pinctrl-0 = <&pinctrl_usbotg1>; 629 disable-over-current; 630 srp-disable; 631 hnp-disable; 632 adp-disable; 633 status = "okay"; 634}; 635