1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Copyright (c) 2021 Protonic Holland 4*f126890aSEmmanuel Vadot */ 5*f126890aSEmmanuel Vadot 6*f126890aSEmmanuel Vadot/ { 7*f126890aSEmmanuel Vadot gpio-keys { 8*f126890aSEmmanuel Vadot compatible = "gpio-keys"; 9*f126890aSEmmanuel Vadot pinctrl-names = "default"; 10*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_gpiokeys>; 11*f126890aSEmmanuel Vadot autorepeat; 12*f126890aSEmmanuel Vadot 13*f126890aSEmmanuel Vadot power-button { 14*f126890aSEmmanuel Vadot label = "Power Button"; 15*f126890aSEmmanuel Vadot gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; 16*f126890aSEmmanuel Vadot linux,code = <KEY_POWER>; 17*f126890aSEmmanuel Vadot wakeup-source; 18*f126890aSEmmanuel Vadot }; 19*f126890aSEmmanuel Vadot }; 20*f126890aSEmmanuel Vadot 21*f126890aSEmmanuel Vadot panel { 22*f126890aSEmmanuel Vadot compatible = "kyo,tcg121xglp"; 23*f126890aSEmmanuel Vadot backlight = <&backlight_lcd>; 24*f126890aSEmmanuel Vadot power-supply = <®_3v3>; 25*f126890aSEmmanuel Vadot 26*f126890aSEmmanuel Vadot port { 27*f126890aSEmmanuel Vadot panel_in: endpoint { 28*f126890aSEmmanuel Vadot remote-endpoint = <&lvds0_out>; 29*f126890aSEmmanuel Vadot }; 30*f126890aSEmmanuel Vadot }; 31*f126890aSEmmanuel Vadot }; 32*f126890aSEmmanuel Vadot}; 33*f126890aSEmmanuel Vadot 34*f126890aSEmmanuel Vadot&fec { 35*f126890aSEmmanuel Vadot pinctrl-names = "default"; 36*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet>; 37*f126890aSEmmanuel Vadot phy-mode = "rgmii-id"; 38*f126890aSEmmanuel Vadot phy-handle = <&rgmii_phy>; 39*f126890aSEmmanuel Vadot status = "okay"; 40*f126890aSEmmanuel Vadot 41*f126890aSEmmanuel Vadot mdio { 42*f126890aSEmmanuel Vadot #address-cells = <1>; 43*f126890aSEmmanuel Vadot #size-cells = <0>; 44*f126890aSEmmanuel Vadot 45*f126890aSEmmanuel Vadot /* Microchip KSZ9031RNX PHY */ 46*f126890aSEmmanuel Vadot rgmii_phy: ethernet-phy@0 { 47*f126890aSEmmanuel Vadot reg = <0>; 48*f126890aSEmmanuel Vadot interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>; 49*f126890aSEmmanuel Vadot reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 50*f126890aSEmmanuel Vadot reset-assert-us = <10000>; 51*f126890aSEmmanuel Vadot reset-deassert-us = <300>; 52*f126890aSEmmanuel Vadot }; 53*f126890aSEmmanuel Vadot }; 54*f126890aSEmmanuel Vadot}; 55*f126890aSEmmanuel Vadot 56*f126890aSEmmanuel Vadot&gpio1 { 57*f126890aSEmmanuel Vadot gpio-line-names = 58*f126890aSEmmanuel Vadot "CAN1_TERM", "SD1_CD", "ITU656_RESET", "CAM1_MIRROR", 59*f126890aSEmmanuel Vadot "CAM2_MIRROR", "", "", "SMBALERT", 60*f126890aSEmmanuel Vadot "DEBUG_0", "DEBUG_1", "", "", "", "", "", "", 61*f126890aSEmmanuel Vadot "SD1_DATA0", "SD1_DATA1", "SD1_CMD", "SD1_DATA2", "SD1_CLK", 62*f126890aSEmmanuel Vadot "SD1_DATA3", "ETH_MDIO", "", 63*f126890aSEmmanuel Vadot "", "ETH_RESET", "", "", "ETH_INT", "", "", "ETH_MDC"; 64*f126890aSEmmanuel Vadot}; 65*f126890aSEmmanuel Vadot 66*f126890aSEmmanuel Vadot&gpio4 { 67*f126890aSEmmanuel Vadot gpio-line-names = 68*f126890aSEmmanuel Vadot "", "", "", "", "", "", "UART4_TXD", "UART4_RXD", 69*f126890aSEmmanuel Vadot "UART5_TXD", "UART5_RXD", "CAN1_TX", "CAN1_RX", "CAN1_SR", 70*f126890aSEmmanuel Vadot "CAN2_SR", "CAN2_TX", "CAN2_RX", 71*f126890aSEmmanuel Vadot "", "", "DIP1_FB", "", "VCAM_EN", "ON1_CTRL", "ON2_CTRL", 72*f126890aSEmmanuel Vadot "HITCH_IN_OUT", 73*f126890aSEmmanuel Vadot "LIGHT_ON", "", "", "CONTACT_IN", "BL_EN", "BL_PWM", "", 74*f126890aSEmmanuel Vadot "ISB_LED"; 75*f126890aSEmmanuel Vadot}; 76*f126890aSEmmanuel Vadot 77*f126890aSEmmanuel Vadot&gpio5 { 78*f126890aSEmmanuel Vadot gpio-line-names = 79*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 80*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 81*f126890aSEmmanuel Vadot "", "", "ITU656_CLK", "I2S_MCLK", "ITU656_PDN", "AUDIO_RESET", 82*f126890aSEmmanuel Vadot "I2S_BITCLK", "I2S_DOUT", 83*f126890aSEmmanuel Vadot "I2S_LRCLK", "I2S_DIN", "I2C1_SDA", "I2C1_SCL", "YACO_AUX_RX", 84*f126890aSEmmanuel Vadot "YACO_AUX_TX", "ITU656_D0", "ITU656_D1"; 85*f126890aSEmmanuel Vadot}; 86*f126890aSEmmanuel Vadot 87*f126890aSEmmanuel Vadot&gpio6 { 88*f126890aSEmmanuel Vadot gpio-line-names = 89*f126890aSEmmanuel Vadot "ITU656_D2", "ITU656_D3", "ITU656_D4", "ITU656_D5", 90*f126890aSEmmanuel Vadot "ITU656_D6", "ITU656_D7", "", "", 91*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 92*f126890aSEmmanuel Vadot "", "", "", "RGMII_TXC", "RGMII_TD0", "RGMII_TD1", "RGMII_TD2", 93*f126890aSEmmanuel Vadot "RGMII_TD3", 94*f126890aSEmmanuel Vadot "RGMII_RX_CTL", "RGMII_RD0", "RGMII_TX_CTL", "RGMII_RD1", 95*f126890aSEmmanuel Vadot "RGMII_RD2", "RGMII_RD3", "", ""; 96*f126890aSEmmanuel Vadot}; 97*f126890aSEmmanuel Vadot 98*f126890aSEmmanuel Vadot&iomuxc { 99*f126890aSEmmanuel Vadot pinctrl_enet: enetgrp { 100*f126890aSEmmanuel Vadot fsl,pins = < 101*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 102*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 103*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 104*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 105*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 106*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 107*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 108*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 109*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 110*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 111*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 112*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 113*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x10030 114*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x10030 115*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDC__ENET_MDC 0x10030 116*f126890aSEmmanuel Vadot /* Phy reset */ 117*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 118*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b1 119*f126890aSEmmanuel Vadot >; 120*f126890aSEmmanuel Vadot }; 121*f126890aSEmmanuel Vadot 122*f126890aSEmmanuel Vadot pinctrl_gpiokeys: gpiokeygrp { 123*f126890aSEmmanuel Vadot fsl,pins = < 124*f126890aSEmmanuel Vadot /* nON_SWITCH */ 125*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b0b0 126*f126890aSEmmanuel Vadot >; 127*f126890aSEmmanuel Vadot }; 128*f126890aSEmmanuel Vadot}; 129