1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2// 3// Copyright 2015 Armadeus Systems <support@armadeus.com> 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/input/input.h> 7#include <dt-bindings/interrupt-controller/irq.h> 8 9/ { 10 chosen { 11 stdout-path = &uart4; 12 }; 13 14 backlight: backlight { 15 compatible = "pwm-backlight"; 16 pwms = <&pwm3 0 191000>; 17 brightness-levels = <0 4 8 16 32 64 128 255>; 18 default-brightness-level = <0>; 19 power-supply = <®_5v>; 20 }; 21 22 disp0 { 23 compatible = "fsl,imx-parallel-display"; 24 pinctrl-names = "default"; 25 pinctrl-0 = <&pinctrl_ipu1_disp0>; 26 27 #address-cells = <1>; 28 #size-cells = <0>; 29 30 port@0 { 31 reg = <0>; 32 33 display_in: endpoint { 34 remote-endpoint = <&ipu1_di0_disp0>; 35 }; 36 }; 37 38 port@1 { 39 reg = <1>; 40 41 display_out: endpoint { 42 remote-endpoint = <&panel_in>; 43 }; 44 }; 45 }; 46 47 gpio-keys { 48 compatible = "gpio-keys"; 49 pinctrl-names = "default"; 50 pinctrl-0 = <&pinctrl_gpio_keys>; 51 52 user-button { 53 label = "User button"; 54 gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; 55 linux,code = <BTN_MISC>; 56 wakeup-source; 57 }; 58 }; 59 60 leds { 61 compatible = "gpio-leds"; 62 pinctrl-names = "default"; 63 pinctrl-0 = <&pinctrl_gpio_leds>; 64 65 user-led { 66 label = "User LED"; 67 gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>; 68 linux,default-trigger = "heartbeat"; 69 default-state = "on"; 70 }; 71 }; 72 73 panel { 74 compatible = "armadeus,st0700-adapt"; 75 power-supply = <®_3p3v>; 76 backlight = <&backlight>; 77 78 port { 79 panel_in: endpoint { 80 remote-endpoint = <&display_out>; 81 }; 82 }; 83 }; 84 85 reg_3p3v: regulator-3p3v { 86 compatible = "regulator-fixed"; 87 regulator-name = "3P3V"; 88 regulator-min-microvolt = <3300000>; 89 regulator-max-microvolt = <3300000>; 90 regulator-always-on; 91 vin-supply = <®_5v>; 92 }; 93 94 reg_5v: regulator-5v { 95 compatible = "regulator-fixed"; 96 regulator-name = "5V"; 97 regulator-min-microvolt = <5000000>; 98 regulator-max-microvolt = <5000000>; 99 regulator-always-on; 100 }; 101 102 reg_usb_otg_vbus: regulator-usb-otg-vbus { 103 compatible = "regulator-fixed"; 104 regulator-name = "usb_otg_vbus"; 105 regulator-min-microvolt = <5000000>; 106 regulator-max-microvolt = <5000000>; 107 regulator-always-on; 108 }; 109 110 sound { 111 compatible = "fsl,imx6-armadeus-sgtl5000", 112 "fsl,imx-audio-sgtl5000"; 113 model = "imx6-armadeus-sgtl5000"; 114 ssi-controller = <&ssi1>; 115 audio-codec = <&codec>; 116 audio-routing = 117 "MIC_IN", "Mic Jack", 118 "Mic Jack", "Mic Bias", 119 "Headphone Jack", "HP_OUT"; 120 mux-int-port = <1>; 121 mux-ext-port = <3>; 122 }; 123 124 sound-spdif { 125 compatible = "fsl,imx-audio-spdif"; 126 model = "imx-spdif"; 127 spdif-controller = <&spdif>; 128 spdif-out; 129 }; 130}; 131 132&audmux { 133 pinctrl-names = "default"; 134 pinctrl-0 = <&pinctrl_audmux>; 135 status = "okay"; 136}; 137 138&can2 { 139 pinctrl-names = "default"; 140 pinctrl-0 = <&pinctrl_flexcan2>; 141 xceiver-supply = <®_5v>; 142 status = "okay"; 143}; 144 145&ecspi1 { 146 pinctrl-names = "default"; 147 pinctrl-0 = <&pinctrl_ecspi1>; 148 cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>, 149 <&gpio4 10 GPIO_ACTIVE_LOW>, 150 <&gpio4 11 GPIO_ACTIVE_LOW>; 151 status = "okay"; 152}; 153 154&hdmi { 155 ddc-i2c-bus = <&i2c3>; 156 status = "okay"; 157}; 158 159&i2c1 { 160 clock-frequency = <400000>; 161 pinctrl-names = "default"; 162 pinctrl-0 = <&pinctrl_i2c1>; 163 status = "okay"; 164 165 touchscreen@48 { 166 compatible = "semtech,sx8654"; 167 reg = <0x48>; 168 pinctrl-names = "default"; 169 pinctrl-0 = <&pinctrl_touchscreen>; 170 interrupt-parent = <&gpio6>; 171 interrupts = <3 IRQ_TYPE_EDGE_FALLING>; 172 }; 173}; 174 175&i2c2 { 176 clock-frequency = <400000>; 177 pinctrl-names = "default"; 178 pinctrl-0 = <&pinctrl_i2c2>; 179 status = "okay"; 180 181 codec: sgtl5000@a { 182 compatible = "fsl,sgtl5000"; 183 reg = <0x0a>; 184 clocks = <&clks IMX6QDL_CLK_CKO>; 185 VDDA-supply = <®_3p3v>; 186 VDDIO-supply = <®_3p3v>; 187 }; 188 189 rtc@6f { 190 compatible = "microchip,mcp7940x"; 191 reg = <0x6f>; 192 }; 193}; 194 195&i2c3 { 196 clock-frequency = <400000>; 197 pinctrl-names = "default"; 198 pinctrl-0 = <&pinctrl_i2c3>; 199 status = "okay"; 200}; 201 202&ipu1_di0_disp0 { 203 remote-endpoint = <&display_in>; 204}; 205 206&pcie { 207 pinctrl-names = "default"; 208 pinctrl-0 = <&pinctrl_pcie>; 209 reset-gpio = <&gpio6 2 GPIO_ACTIVE_LOW>; 210 status = "okay"; 211}; 212 213&pwm3 { 214 #pwm-cells = <2>; 215 pinctrl-names = "default"; 216 pinctrl-0 = <&pinctrl_pwm3>; 217 status = "okay"; 218}; 219 220/* GPS */ 221&uart1 { 222 pinctrl-names = "default"; 223 pinctrl-0 = <&pinctrl_uart1>; 224 status = "okay"; 225}; 226 227/* GSM */ 228&uart3 { 229 pinctrl-names = "default"; 230 pinctrl-0 = <&pinctrl_uart3 &pinctrl_gsm>; 231 uart-has-rtscts; 232 status = "okay"; 233}; 234 235/* console */ 236&uart4 { 237 pinctrl-names = "default"; 238 pinctrl-0 = <&pinctrl_uart4>; 239 status = "okay"; 240}; 241 242&usbh1 { 243 vbus-supply = <®_5v>; 244 phy_type = "utmi"; 245 status = "okay"; 246}; 247 248&usbotg { 249 pinctrl-names = "default"; 250 pinctrl-0 = <&pinctrl_usbotg>; 251 vbus-supply = <®_usb_otg_vbus>; 252 dr_mode = "otg"; 253 status = "okay"; 254}; 255 256/* microSD */ 257&usdhc2 { 258 pinctrl-names = "default"; 259 pinctrl-0 = <&pinctrl_usdhc2>; 260 cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; 261 no-1-8-v; 262 status = "okay"; 263}; 264 265&spdif { 266 pinctrl-names = "default"; 267 pinctrl-0 = <&pinctrl_spdif>; 268 status = "okay"; 269}; 270 271&ssi1 { 272 status = "okay"; 273}; 274 275&iomuxc { 276 pinctrl-names = "default"; 277 pinctrl-0 = <&pinctrl_gpios>; 278 279 pinctrl_audmux: audmuxgrp { 280 fsl,pins = < 281 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x1b0b0 282 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x1b0b0 283 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0 284 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x1b0b0 285 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 286 >; 287 }; 288 289 pinctrl_ecspi1: ecspi1grp { 290 fsl,pins = < 291 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1 292 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1 293 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1 294 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0 295 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 296 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 297 >; 298 }; 299 300 pinctrl_flexcan2: flexcan2grp { 301 fsl,pins = < 302 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0 303 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0 304 >; 305 }; 306 307 pinctrl_gpio_keys: gpiokeysgrp { 308 fsl,pins = < 309 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 310 >; 311 }; 312 313 pinctrl_gpio_leds: gpioledsgrp { 314 fsl,pins = < 315 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x130b0 316 >; 317 }; 318 319 pinctrl_gpios: gpiosgrp { 320 fsl,pins = < 321 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x100b1 322 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x100b1 323 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x100b1 324 MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x100b1 325 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x100b1 326 MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x100b1 327 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x100b1 328 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x100b1 329 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x100b1 330 >; 331 }; 332 333 pinctrl_gsm: gsmgrp { 334 fsl,pins = < 335 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x130b0 /* GSM_POKIN */ 336 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x130b0 /* GSM_PWR_EN */ 337 >; 338 }; 339 340 pinctrl_i2c1: i2c1grp { 341 fsl,pins = < 342 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 343 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 344 >; 345 }; 346 347 pinctrl_i2c2: i2c2grp { 348 fsl,pins = < 349 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 350 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 351 >; 352 }; 353 354 pinctrl_i2c3: i2c3grp { 355 fsl,pins = < 356 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 357 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 358 >; 359 }; 360 361 pinctrl_ipu1_disp0: ipu1disp0grp { 362 fsl,pins = < 363 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x100b1 364 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x100b1 365 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x100b1 366 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x100b1 367 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x100b1 368 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x100b1 369 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x100b1 370 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x100b1 371 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x100b1 372 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x100b1 373 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x100b1 374 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x100b1 375 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x100b1 376 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x100b1 377 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x100b1 378 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x100b1 379 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x100b1 380 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x100b1 381 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x100b1 382 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x100b1 383 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x100b1 384 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x100b1 385 >; 386 }; 387 388 pinctrl_pcie: pciegrp { 389 fsl,pins = < 390 MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x130b0 391 >; 392 }; 393 394 pinctrl_pwm3: pwm3grp { 395 fsl,pins = < 396 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 397 >; 398 }; 399 400 pinctrl_uart1: uart1grp { 401 fsl,pins = < 402 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b0 403 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b0 404 >; 405 }; 406 407 pinctrl_uart3: uart3grp { 408 fsl,pins = < 409 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b0 410 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b0 411 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b0 412 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b0 413 >; 414 }; 415 416 pinctrl_uart4: uart4grp { 417 fsl,pins = < 418 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b0 419 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b0 420 >; 421 }; 422 423 pinctrl_usbotg: usbotggrp { 424 fsl,pins = < 425 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1b0b0 426 >; 427 }; 428 429 pinctrl_usdhc2: usdhc2grp { 430 fsl,pins = < 431 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 432 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 433 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 434 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 435 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 436 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 437 >; 438 }; 439 440 pinctrl_spdif: spdifgrp { 441 fsl,pins = < 442 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 443 >; 444 }; 445 446 pinctrl_touchscreen: touchscreengrp { 447 fsl,pins = < 448 MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x1b0b0 449 >; 450 }; 451}; 452