1/* 2 * Copyright 2015 Sutajio Ko-Usagi PTE LTD 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This file is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This file is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public 20 * License along with this file; if not, write to the Free 21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 22 * MA 02110-1301 USA 23 * 24 * Or, alternatively, 25 * 26 * b) Permission is hereby granted, free of charge, to any person 27 * obtaining a copy of this software and associated documentation 28 * files (the "Software"), to deal in the Software without 29 * restriction, including without limitation the rights to use, 30 * copy, modify, merge, publish, distribute, sublicense, and/or 31 * sell copies of the Software, and to permit persons to whom the 32 * Software is furnished to do so, subject to the following 33 * conditions: 34 * 35 * The above copyright notice and this permission notice shall be 36 * included in all copies or substantial portions of the Software. 37 * 38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 45 * OTHER DEALINGS IN THE SOFTWARE. 46 * 47 */ 48 49/dts-v1/; 50#include "imx6q.dtsi" 51#include <dt-bindings/gpio/gpio.h> 52#include <dt-bindings/input/input.h> 53 54/ { 55 model = "Kosagi Novena Dual/Quad"; 56 compatible = "kosagi,imx6q-novena", "fsl,imx6q"; 57 58 /* Will be filled by the bootloader */ 59 memory@10000000 { 60 device_type = "memory"; 61 reg = <0x10000000 0>; 62 }; 63 64 chosen { 65 stdout-path = &uart2; 66 }; 67 68 backlight: backlight { 69 compatible = "pwm-backlight"; 70 pwms = <&pwm1 0 10000000>; 71 pinctrl-names = "default"; 72 pinctrl-0 = <&pinctrl_backlight_novena>; 73 power-supply = <®_lvds_lcd>; 74 brightness-levels = <0 3 6 12 16 24 32 48 64 96 128 192 255>; 75 default-brightness-level = <12>; 76 }; 77 78 gpio-keys { 79 compatible = "gpio-keys"; 80 pinctrl-names = "default"; 81 pinctrl-0 = <&pinctrl_gpio_keys_novena>; 82 83 user-button { 84 label = "User Button"; 85 gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; 86 linux,code = <KEY_POWER>; 87 }; 88 89 lid-event { 90 label = "Lid"; 91 gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; 92 linux,input-type = <5>; /* EV_SW */ 93 linux,code = <0>; /* SW_LID */ 94 }; 95 }; 96 97 leds { 98 compatible = "gpio-leds"; 99 pinctrl-names = "default"; 100 pinctrl-0 = <&pinctrl_leds_novena>; 101 102 led-heartbeat { 103 label = "novena:white:panel"; 104 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; 105 linux,default-trigger = "default-on"; 106 }; 107 }; 108 109 panel: panel { 110 compatible = "innolux,n133hse-ea1"; 111 backlight = <&backlight>; 112 }; 113 114 reg_2p5v: regulator-2p5v { 115 compatible = "regulator-fixed"; 116 regulator-name = "2P5V"; 117 regulator-min-microvolt = <2500000>; 118 regulator-max-microvolt = <2500000>; 119 regulator-always-on; 120 }; 121 122 reg_3p3v: regulator-3p3v { 123 compatible = "regulator-fixed"; 124 regulator-name = "3P3V"; 125 regulator-min-microvolt = <3300000>; 126 regulator-max-microvolt = <3300000>; 127 regulator-always-on; 128 }; 129 130 reg_audio_codec: regulator-audio-codec { 131 compatible = "regulator-fixed"; 132 regulator-name = "es8328-power"; 133 regulator-boot-on; 134 regulator-min-microvolt = <5000000>; 135 regulator-max-microvolt = <5000000>; 136 startup-delay-us = <400000>; 137 gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>; 138 enable-active-high; 139 }; 140 141 reg_display: regulator-display { 142 compatible = "regulator-fixed"; 143 regulator-name = "lcd-display-power"; 144 regulator-min-microvolt = <3300000>; 145 regulator-max-microvolt = <3300000>; 146 startup-delay-us = <200000>; 147 gpio = <&gpio5 28 GPIO_ACTIVE_HIGH>; 148 enable-active-high; 149 }; 150 151 reg_lvds_lcd: regulator-lvds-lcd { 152 compatible = "regulator-fixed"; 153 regulator-name = "lcd-lvds-power"; 154 regulator-min-microvolt = <3300000>; 155 regulator-max-microvolt = <3300000>; 156 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; 157 enable-active-high; 158 }; 159 160 reg_pcie: regulator-pcie { 161 compatible = "regulator-fixed"; 162 regulator-name = "pcie-bus-power"; 163 regulator-min-microvolt = <1500000>; 164 regulator-max-microvolt = <1500000>; 165 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; 166 enable-active-high; 167 }; 168 169 reg_sata: regulator-sata { 170 compatible = "regulator-fixed"; 171 regulator-name = "sata-power"; 172 regulator-boot-on; 173 regulator-min-microvolt = <3300000>; 174 regulator-max-microvolt = <3300000>; 175 startup-delay-us = <10000>; 176 gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; 177 enable-active-high; 178 }; 179 180 reg_usb_otg_vbus: regulator-usb-otg-vbus { 181 compatible = "regulator-fixed"; 182 regulator-name = "usb_otg_vbus"; 183 regulator-min-microvolt = <5000000>; 184 regulator-max-microvolt = <5000000>; 185 enable-active-high; 186 }; 187 188 sound { 189 compatible = "fsl,imx-audio-es8328"; 190 model = "imx-audio-es8328"; 191 ssi-controller = <&ssi1>; 192 audio-codec = <&codec>; 193 audio-amp-supply = <®_audio_codec>; 194 jack-gpio = <&gpio5 15 GPIO_ACTIVE_HIGH>; 195 audio-routing = 196 "Speaker", "LOUT2", 197 "Speaker", "ROUT2", 198 "Speaker", "audio-amp", 199 "Headphone", "ROUT1", 200 "Headphone", "LOUT1", 201 "LINPUT1", "Mic Jack", 202 "RINPUT1", "Mic Jack", 203 "Mic Jack", "Mic Bias"; 204 mux-int-port = <0x1>; 205 mux-ext-port = <0x3>; 206 }; 207}; 208 209&audmux { 210 pinctrl-names = "default"; 211 pinctrl-0 = <&pinctrl_audmux_novena>; 212 status = "okay"; 213}; 214 215&ecspi3 { 216 pinctrl-names = "default"; 217 pinctrl-0 = <&pinctrl_ecspi3_novena>; 218 status = "okay"; 219}; 220 221&fec { 222 pinctrl-names = "default"; 223 pinctrl-0 = <&pinctrl_enet_novena>; 224 phy-mode = "rgmii"; 225 phy-handle = <ðphy>; 226 phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 227 status = "okay"; 228 229 mdio { 230 #address-cells = <1>; 231 #size-cells = <0>; 232 233 ethphy: ethernet-phy { 234 compatible = "ethernet-phy-ieee802.3-c22"; 235 rxc-skew-ps = <3000>; 236 rxdv-skew-ps = <0>; 237 txc-skew-ps = <3000>; 238 txen-skew-ps = <0>; 239 rxd0-skew-ps = <0>; 240 rxd1-skew-ps = <0>; 241 rxd2-skew-ps = <0>; 242 rxd3-skew-ps = <0>; 243 txd0-skew-ps = <3000>; 244 txd1-skew-ps = <3000>; 245 txd2-skew-ps = <3000>; 246 txd3-skew-ps = <3000>; 247 }; 248 }; 249}; 250 251&hdmi { 252 pinctrl-names = "default"; 253 pinctrl-0 = <&pinctrl_hdmi_novena>; 254 ddc-i2c-bus = <&i2c2>; 255 status = "okay"; 256}; 257 258&i2c1 { 259 pinctrl-names = "default"; 260 pinctrl-0 = <&pinctrl_i2c1_novena>; 261 status = "okay"; 262 263 accel: mma8452@1c { 264 compatible = "fsl,mma8452"; 265 reg = <0x1c>; 266 }; 267 268 rtc: pcf8523@68 { 269 compatible = "nxp,pcf8523"; 270 reg = <0x68>; 271 }; 272 273 sbs_battery: bq20z75@b { 274 compatible = "sbs,sbs-battery"; 275 reg = <0x0b>; 276 sbs,i2c-retry-count = <50>; 277 }; 278 279 touch: stmpe811@44 { 280 compatible = "st,stmpe811"; 281 reg = <0x44>; 282 irq-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; 283 id = <0>; 284 blocks = <0x5>; 285 irq-trigger = <0x1>; 286 pinctrl-names = "default"; 287 pinctrl-0 = <&pinctrl_stmpe_novena>; 288 vio-supply = <®_3p3v>; 289 vcc-supply = <®_3p3v>; 290 291 stmpe_touchscreen { 292 compatible = "st,stmpe-ts"; 293 st,sample-time = <4>; 294 st,mod-12b = <1>; 295 st,ref-sel = <0>; 296 st,adc-freq = <1>; 297 st,ave-ctrl = <1>; 298 st,touch-det-delay = <2>; 299 st,settling = <2>; 300 st,fraction-z = <7>; 301 st,i-drive = <1>; 302 }; 303 }; 304}; 305 306&i2c2 { 307 pinctrl-names = "default"; 308 pinctrl-0 = <&pinctrl_i2c2_novena>; 309 status = "okay"; 310 311 pmic: pmic@8 { 312 compatible = "fsl,pfuze100"; 313 reg = <0x08>; 314 315 regulators { 316 reg_sw1a: sw1a { 317 regulator-min-microvolt = <300000>; 318 regulator-max-microvolt = <1875000>; 319 regulator-boot-on; 320 regulator-always-on; 321 regulator-ramp-delay = <6250>; 322 }; 323 324 reg_sw1c: sw1c { 325 regulator-min-microvolt = <300000>; 326 regulator-max-microvolt = <1875000>; 327 regulator-boot-on; 328 regulator-always-on; 329 }; 330 331 reg_sw2: sw2 { 332 regulator-min-microvolt = <800000>; 333 regulator-max-microvolt = <3300000>; 334 regulator-boot-on; 335 regulator-always-on; 336 }; 337 338 reg_sw3a: sw3a { 339 regulator-min-microvolt = <400000>; 340 regulator-max-microvolt = <1975000>; 341 regulator-boot-on; 342 regulator-always-on; 343 }; 344 345 reg_sw3b: sw3b { 346 regulator-min-microvolt = <400000>; 347 regulator-max-microvolt = <1975000>; 348 regulator-boot-on; 349 regulator-always-on; 350 }; 351 352 reg_sw4: sw4 { 353 regulator-min-microvolt = <800000>; 354 regulator-max-microvolt = <3300000>; 355 }; 356 357 reg_swbst: swbst { 358 regulator-min-microvolt = <5000000>; 359 regulator-max-microvolt = <5150000>; 360 regulator-boot-on; 361 }; 362 363 reg_snvs: vsnvs { 364 regulator-min-microvolt = <1000000>; 365 regulator-max-microvolt = <3000000>; 366 regulator-boot-on; 367 regulator-always-on; 368 }; 369 370 reg_vref: vrefddr { 371 regulator-boot-on; 372 regulator-always-on; 373 }; 374 375 reg_vgen1: vgen1 { 376 regulator-min-microvolt = <800000>; 377 regulator-max-microvolt = <1550000>; 378 }; 379 380 reg_vgen2: vgen2 { 381 regulator-min-microvolt = <800000>; 382 regulator-max-microvolt = <1550000>; 383 }; 384 385 reg_vgen3: vgen3 { 386 regulator-min-microvolt = <1800000>; 387 regulator-max-microvolt = <3300000>; 388 }; 389 390 reg_vgen4: vgen4 { 391 regulator-min-microvolt = <1800000>; 392 regulator-max-microvolt = <3300000>; 393 regulator-always-on; 394 }; 395 396 reg_vgen5: vgen5 { 397 regulator-min-microvolt = <1800000>; 398 regulator-max-microvolt = <3300000>; 399 regulator-always-on; 400 }; 401 402 reg_vgen6: vgen6 { 403 regulator-min-microvolt = <1800000>; 404 regulator-max-microvolt = <3300000>; 405 regulator-always-on; 406 }; 407 }; 408 }; 409}; 410 411&i2c3 { 412 pinctrl-names = "default"; 413 pinctrl-0 = <&pinctrl_i2c3_novena>; 414 status = "okay"; 415 416 codec: es8328@11 { 417 compatible = "everest,es8328"; 418 reg = <0x11>; 419 DVDD-supply = <®_audio_codec>; 420 AVDD-supply = <®_audio_codec>; 421 PVDD-supply = <®_audio_codec>; 422 HPVDD-supply = <®_audio_codec>; 423 pinctrl-names = "default"; 424 pinctrl-0 = <&pinctrl_sound_novena>; 425 clocks = <&clks IMX6QDL_CLK_CKO1>; 426 assigned-clocks = <&clks IMX6QDL_CLK_CKO>, 427 <&clks IMX6QDL_CLK_CKO1_SEL>, 428 <&clks IMX6QDL_CLK_PLL4_AUDIO>, 429 <&clks IMX6QDL_CLK_CKO1>; 430 assigned-clock-parents = <&clks IMX6QDL_CLK_CKO1>, 431 <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>, 432 <&clks IMX6QDL_CLK_OSC>, 433 <&clks IMX6QDL_CLK_CKO1_PODF>; 434 assigned-clock-rates = <0 0 722534400 22579200>; 435 }; 436}; 437 438&kpp { 439 pinctrl-names = "default"; 440 pinctrl-0 = <&pinctrl_kpp_novena>; 441 linux,keymap = < 442 MATRIX_KEY(1, 1, KEY_CONFIG) 443 >; 444 status = "okay"; 445}; 446 447&ldb { 448 fsl,dual-channel; 449 status = "okay"; 450 451 lvds-channel@0 { 452 fsl,data-mapping = "jeida"; 453 fsl,data-width = <24>; 454 fsl,panel = <&panel>; 455 status = "okay"; 456 }; 457}; 458 459&pcie { 460 pinctrl-names = "default"; 461 pinctrl-0 = <&pinctrl_pcie_novena>; 462 reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>; 463 vpcie-supply = <®_pcie>; 464 status = "okay"; 465}; 466 467&pwm1 { 468 #pwm-cells = <2>; 469 status = "okay"; 470}; 471 472&sata { 473 target-supply = <®_sata>; 474 fsl,transmit-level-mV = <1025>; 475 fsl,transmit-boost-mdB = <0>; 476 fsl,transmit-atten-16ths = <8>; 477 status = "okay"; 478}; 479 480&ssi1 { 481 status = "okay"; 482}; 483 484&uart2 { 485 pinctrl-names = "default"; 486 pinctrl-0 = <&pinctrl_uart2_novena>; 487 status = "okay"; 488}; 489 490&uart3 { 491 pinctrl-names = "default"; 492 pinctrl-0 = <&pinctrl_uart3_novena>; 493 status = "okay"; 494}; 495 496&uart4 { 497 pinctrl-names = "default"; 498 pinctrl-0 = <&pinctrl_uart4_novena>; 499 status = "okay"; 500}; 501 502&usbotg { 503 vbus-supply = <®_usb_otg_vbus>; 504 dr_mode = "otg"; 505 pinctrl-names = "default"; 506 pinctrl-0 = <&pinctrl_usbotg_novena>; 507 disable-over-current; 508 status = "okay"; 509}; 510 511&usbh1 { 512 vbus-supply = <®_swbst>; 513 status = "okay"; 514}; 515 516&usdhc2 { 517 pinctrl-names = "default"; 518 pinctrl-0 = <&pinctrl_usdhc2_novena>; 519 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 520 wp-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; 521 bus-width = <4>; 522 status = "okay"; 523}; 524 525&usdhc3 { 526 pinctrl-names = "default"; 527 pinctrl-0 = <&pinctrl_usdhc3_novena>; 528 bus-width = <4>; 529 non-removable; 530 status = "okay"; 531}; 532 533&iomuxc { 534 pinctrl_audmux_novena: audmuxgrp-novena { 535 fsl,pins = < 536 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 537 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 538 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 539 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 540 >; 541 }; 542 543 pinctrl_backlight_novena: backlightgrp-novena { 544 fsl,pins = < 545 MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0 546 MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x1b0b1 547 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b1 548 >; 549 }; 550 551 pinctrl_ecspi3_novena: ecspi3grp-novena { 552 fsl,pins = < 553 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 554 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 555 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 556 >; 557 }; 558 559 pinctrl_enet_novena: enetgrp-novena { 560 fsl,pins = < 561 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 562 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 563 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b020 564 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b028 565 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b028 566 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b028 567 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b028 568 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b028 569 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 570 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 571 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 572 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 573 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 574 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 575 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 576 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 577 /* Ethernet reset */ 578 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b1 579 >; 580 }; 581 582 pinctrl_fpga_gpio: fpgagpiogrp-novena { 583 fsl,pins = < 584 /* FPGA power */ 585 MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b1 586 /* Reset */ 587 MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b1 588 /* FPGA GPIOs */ 589 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x1b0b1 590 MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x1b0b1 591 MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1b0b1 592 MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x1b0b1 593 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b1 594 MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0b1 595 MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x1b0b1 596 MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x1b0b1 597 MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x1b0b1 598 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x1b0b1 599 MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x1b0b1 600 MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x1b0b1 601 MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x1b0b1 602 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b1 603 MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x1b0b1 604 MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b0b1 605 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b1 606 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b1 607 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1 608 MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b0b1 609 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1 610 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b1 611 MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x1b0b1 612 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b0b1 613 MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b1 614 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b1 615 >; 616 }; 617 618 pinctrl_fpga_eim: fpgaeimgrp-novena { 619 fsl,pins = < 620 /* FPGA power */ 621 MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b1 622 /* Reset */ 623 MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b1 624 /* FPGA GPIOs */ 625 MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0f1 626 MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0f1 627 MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0f1 628 MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0f1 629 MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0f1 630 MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0f1 631 MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0f1 632 MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0f1 633 MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0f1 634 MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0f1 635 MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0f1 636 MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0f1 637 MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0f1 638 MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0f1 639 MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0f1 640 MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0f1 641 MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0f1 642 MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0f1 643 MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0f1 644 MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0f1 645 MX6QDL_PAD_EIM_CS1__EIM_CS1_B 0xb0f1 646 MX6QDL_PAD_EIM_LBA__EIM_LBA_B 0xb0f1 647 MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0f1 648 MX6QDL_PAD_EIM_RW__EIM_RW 0xb0f1 649 MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb0f1 650 MX6QDL_PAD_EIM_BCLK__EIM_BCLK 0xb0f1 651 >; 652 }; 653 654 pinctrl_gpio_keys_novena: gpiokeysgrp-novena { 655 fsl,pins = < 656 /* User button */ 657 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 658 /* PCIe Wakeup */ 659 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1f0e0 660 /* Lid switch */ 661 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0 662 >; 663 }; 664 665 pinctrl_hdmi_novena: hdmigrp-novena { 666 fsl,pins = < 667 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 668 MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b1 669 >; 670 }; 671 672 pinctrl_i2c1_novena: i2c1grp-novena { 673 fsl,pins = < 674 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 675 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 676 >; 677 }; 678 679 pinctrl_i2c2_novena: i2c2grp-novena { 680 fsl,pins = < 681 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 682 MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 683 >; 684 }; 685 686 pinctrl_i2c3_novena: i2c3grp-novena { 687 fsl,pins = < 688 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 689 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 690 >; 691 }; 692 693 pinctrl_kpp_novena: kppgrp-novena { 694 fsl,pins = < 695 /* Front panel button */ 696 MX6QDL_PAD_KEY_ROW1__KEY_ROW1 0x1b0b1 697 /* Fake column driver, not connected */ 698 MX6QDL_PAD_KEY_COL1__KEY_COL1 0x1b0b1 699 >; 700 }; 701 702 pinctrl_leds_novena: ledsgrp-novena { 703 fsl,pins = < 704 MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x1b0b1 705 >; 706 }; 707 708 pinctrl_pcie_novena: pciegrp-novena { 709 fsl,pins = < 710 /* Reset */ 711 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1 712 /* Power On */ 713 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1 714 /* Wifi kill */ 715 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x1b0b1 716 >; 717 }; 718 719 pinctrl_sata_novena: satagrp-novena { 720 fsl,pins = < 721 MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b1 722 >; 723 }; 724 725 pinctrl_senoko_novena: senokogrp-novena { 726 fsl,pins = < 727 /* Senoko IRQ line */ 728 MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x13048 729 /* Senoko reset line */ 730 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b0b1 731 >; 732 }; 733 734 pinctrl_sound_novena: soundgrp-novena { 735 fsl,pins = < 736 /* Audio power regulator */ 737 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b1 738 /* Headphone plug */ 739 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b1 740 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 741 >; 742 }; 743 744 pinctrl_stmpe_novena: stmpegrp-novena { 745 fsl,pins = < 746 /* Touchscreen interrupt */ 747 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b1 748 >; 749 }; 750 751 pinctrl_uart2_novena: uart2grp-novena { 752 fsl,pins = < 753 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 754 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 755 >; 756 }; 757 758 pinctrl_uart3_novena: uart3grp-novena { 759 fsl,pins = < 760 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 761 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 762 >; 763 }; 764 765 pinctrl_uart4_novena: uart4grp-novena { 766 fsl,pins = < 767 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 768 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 769 >; 770 }; 771 772 pinctrl_usbotg_novena: usbotggrp-novena { 773 fsl,pins = < 774 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 775 >; 776 }; 777 778 pinctrl_usdhc2_novena: usdhc2grp-novena { 779 fsl,pins = < 780 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9 781 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9 782 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 783 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 784 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 785 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 786 /* Write protect */ 787 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 788 /* Card detect */ 789 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b1 790 >; 791 }; 792 793 pinctrl_usdhc3_novena: usdhc3grp-novena { 794 fsl,pins = < 795 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 796 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 797 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 798 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 799 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 800 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 801 >; 802 }; 803}; 804