1*f126890aSEmmanuel Vadot/* 2*f126890aSEmmanuel Vadot * Copyright (C) 2016 Sergio Prado (sergio.prado@e-labworks.com) 3*f126890aSEmmanuel Vadot * 4*f126890aSEmmanuel Vadot * This file is dual-licensed: you can use it either under the terms 5*f126890aSEmmanuel Vadot * of the GPL or the X11 license, at your option. Note that this dual 6*f126890aSEmmanuel Vadot * licensing only applies to this file, and not this project as a 7*f126890aSEmmanuel Vadot * whole. 8*f126890aSEmmanuel Vadot * 9*f126890aSEmmanuel Vadot * a) This file is free software; you can redistribute it and/or 10*f126890aSEmmanuel Vadot * modify it under the terms of the GNU General Public License 11*f126890aSEmmanuel Vadot * version 2 as published by the Free Software Foundation. 12*f126890aSEmmanuel Vadot * 13*f126890aSEmmanuel Vadot * This file is distributed in the hope that it will be useful, 14*f126890aSEmmanuel Vadot * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*f126890aSEmmanuel Vadot * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*f126890aSEmmanuel Vadot * GNU General Public License for more details. 17*f126890aSEmmanuel Vadot * 18*f126890aSEmmanuel Vadot * Or, alternatively, 19*f126890aSEmmanuel Vadot * 20*f126890aSEmmanuel Vadot * b) Permission is hereby granted, free of charge, to any person 21*f126890aSEmmanuel Vadot * obtaining a copy of this software and associated documentation 22*f126890aSEmmanuel Vadot * files (the "Software"), to deal in the Software without 23*f126890aSEmmanuel Vadot * restriction, including without limitation the rights to use, 24*f126890aSEmmanuel Vadot * copy, modify, merge, publish, distribute, sublicense, and/or 25*f126890aSEmmanuel Vadot * sell copies of the Software, and to permit persons to whom the 26*f126890aSEmmanuel Vadot * Software is furnished to do so, subject to the following 27*f126890aSEmmanuel Vadot * conditions: 28*f126890aSEmmanuel Vadot * 29*f126890aSEmmanuel Vadot * The above copyright notice and this permission notice shall be 30*f126890aSEmmanuel Vadot * included in all copies or substantial portions of the Software. 31*f126890aSEmmanuel Vadot * 32*f126890aSEmmanuel Vadot * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 33*f126890aSEmmanuel Vadot * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 34*f126890aSEmmanuel Vadot * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 35*f126890aSEmmanuel Vadot * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 36*f126890aSEmmanuel Vadot * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 37*f126890aSEmmanuel Vadot * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 38*f126890aSEmmanuel Vadot * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 39*f126890aSEmmanuel Vadot * OTHER DEALINGS IN THE SOFTWARE. 40*f126890aSEmmanuel Vadot */ 41*f126890aSEmmanuel Vadot 42*f126890aSEmmanuel Vadot/dts-v1/; 43*f126890aSEmmanuel Vadot#include "imx6q.dtsi" 44*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 45*f126890aSEmmanuel Vadot 46*f126890aSEmmanuel Vadot/ { 47*f126890aSEmmanuel Vadot model = "Embest MarS Board i.MX6Dual"; 48*f126890aSEmmanuel Vadot compatible = "embest,imx6q-marsboard", "fsl,imx6q"; 49*f126890aSEmmanuel Vadot 50*f126890aSEmmanuel Vadot memory@10000000 { 51*f126890aSEmmanuel Vadot device_type = "memory"; 52*f126890aSEmmanuel Vadot reg = <0x10000000 0x40000000>; 53*f126890aSEmmanuel Vadot }; 54*f126890aSEmmanuel Vadot 55*f126890aSEmmanuel Vadot reg_3p3v: regulator-3p3v { 56*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 57*f126890aSEmmanuel Vadot regulator-name = "3P3V"; 58*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 59*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 60*f126890aSEmmanuel Vadot }; 61*f126890aSEmmanuel Vadot 62*f126890aSEmmanuel Vadot reg_usb_otg_vbus: regulator-usb-otg-vbus { 63*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 64*f126890aSEmmanuel Vadot regulator-name = "usb_otg_vbus"; 65*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 66*f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 67*f126890aSEmmanuel Vadot gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 68*f126890aSEmmanuel Vadot enable-active-high; 69*f126890aSEmmanuel Vadot }; 70*f126890aSEmmanuel Vadot 71*f126890aSEmmanuel Vadot leds { 72*f126890aSEmmanuel Vadot compatible = "gpio-leds"; 73*f126890aSEmmanuel Vadot pinctrl-names = "default"; 74*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_led>; 75*f126890aSEmmanuel Vadot 76*f126890aSEmmanuel Vadot led-user1 { 77*f126890aSEmmanuel Vadot label = "imx6:green:user1"; 78*f126890aSEmmanuel Vadot gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; 79*f126890aSEmmanuel Vadot default-state = "off"; 80*f126890aSEmmanuel Vadot linux,default-trigger = "heartbeat"; 81*f126890aSEmmanuel Vadot }; 82*f126890aSEmmanuel Vadot 83*f126890aSEmmanuel Vadot led-user2 { 84*f126890aSEmmanuel Vadot label = "imx6:green:user2"; 85*f126890aSEmmanuel Vadot gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; 86*f126890aSEmmanuel Vadot default-state = "off"; 87*f126890aSEmmanuel Vadot }; 88*f126890aSEmmanuel Vadot }; 89*f126890aSEmmanuel Vadot}; 90*f126890aSEmmanuel Vadot 91*f126890aSEmmanuel Vadot&audmux { 92*f126890aSEmmanuel Vadot pinctrl-names = "default"; 93*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_audmux>; 94*f126890aSEmmanuel Vadot status = "okay"; 95*f126890aSEmmanuel Vadot}; 96*f126890aSEmmanuel Vadot 97*f126890aSEmmanuel Vadot&ecspi1 { 98*f126890aSEmmanuel Vadot pinctrl-names = "default"; 99*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ecspi1>; 100*f126890aSEmmanuel Vadot cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; 101*f126890aSEmmanuel Vadot status = "okay"; 102*f126890aSEmmanuel Vadot 103*f126890aSEmmanuel Vadot flash@0 { 104*f126890aSEmmanuel Vadot compatible = "microchip,sst25vf016b"; 105*f126890aSEmmanuel Vadot spi-max-frequency = <20000000>; 106*f126890aSEmmanuel Vadot reg = <0>; 107*f126890aSEmmanuel Vadot }; 108*f126890aSEmmanuel Vadot}; 109*f126890aSEmmanuel Vadot 110*f126890aSEmmanuel Vadot&fec { 111*f126890aSEmmanuel Vadot pinctrl-names = "default"; 112*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet>; 113*f126890aSEmmanuel Vadot phy-mode = "rgmii-id"; 114*f126890aSEmmanuel Vadot phy-handle = <&rgmii_phy>; 115*f126890aSEmmanuel Vadot status = "okay"; 116*f126890aSEmmanuel Vadot 117*f126890aSEmmanuel Vadot mdio { 118*f126890aSEmmanuel Vadot #address-cells = <1>; 119*f126890aSEmmanuel Vadot #size-cells = <0>; 120*f126890aSEmmanuel Vadot 121*f126890aSEmmanuel Vadot /* Atheros AR8035 PHY */ 122*f126890aSEmmanuel Vadot rgmii_phy: ethernet-phy@4 { 123*f126890aSEmmanuel Vadot reg = <4>; 124*f126890aSEmmanuel Vadot interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>; 125*f126890aSEmmanuel Vadot reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; 126*f126890aSEmmanuel Vadot reset-assert-us = <10000>; 127*f126890aSEmmanuel Vadot reset-deassert-us = <1000>; 128*f126890aSEmmanuel Vadot }; 129*f126890aSEmmanuel Vadot }; 130*f126890aSEmmanuel Vadot}; 131*f126890aSEmmanuel Vadot 132*f126890aSEmmanuel Vadot&hdmi { 133*f126890aSEmmanuel Vadot ddc-i2c-bus = <&i2c2>; 134*f126890aSEmmanuel Vadot status = "okay"; 135*f126890aSEmmanuel Vadot}; 136*f126890aSEmmanuel Vadot 137*f126890aSEmmanuel Vadot&i2c1 { 138*f126890aSEmmanuel Vadot clock-frequency = <100000>; 139*f126890aSEmmanuel Vadot pinctrl-names = "default"; 140*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 141*f126890aSEmmanuel Vadot status = "okay"; 142*f126890aSEmmanuel Vadot}; 143*f126890aSEmmanuel Vadot 144*f126890aSEmmanuel Vadot&i2c2 { 145*f126890aSEmmanuel Vadot clock-frequency = <100000>; 146*f126890aSEmmanuel Vadot pinctrl-names = "default"; 147*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c2>; 148*f126890aSEmmanuel Vadot status = "okay"; 149*f126890aSEmmanuel Vadot}; 150*f126890aSEmmanuel Vadot 151*f126890aSEmmanuel Vadot&i2c3 { 152*f126890aSEmmanuel Vadot clock-frequency = <100000>; 153*f126890aSEmmanuel Vadot pinctrl-names = "default"; 154*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c3>; 155*f126890aSEmmanuel Vadot status = "okay"; 156*f126890aSEmmanuel Vadot}; 157*f126890aSEmmanuel Vadot 158*f126890aSEmmanuel Vadot&pwm1 { 159*f126890aSEmmanuel Vadot pinctrl-names = "default"; 160*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm1>; 161*f126890aSEmmanuel Vadot status = "okay"; 162*f126890aSEmmanuel Vadot}; 163*f126890aSEmmanuel Vadot 164*f126890aSEmmanuel Vadot&pwm2 { 165*f126890aSEmmanuel Vadot pinctrl-names = "default"; 166*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm2>; 167*f126890aSEmmanuel Vadot status = "okay"; 168*f126890aSEmmanuel Vadot}; 169*f126890aSEmmanuel Vadot 170*f126890aSEmmanuel Vadot&pwm3 { 171*f126890aSEmmanuel Vadot pinctrl-names = "default"; 172*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm3>; 173*f126890aSEmmanuel Vadot status = "okay"; 174*f126890aSEmmanuel Vadot}; 175*f126890aSEmmanuel Vadot 176*f126890aSEmmanuel Vadot&pwm4 { 177*f126890aSEmmanuel Vadot pinctrl-names = "default"; 178*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm4>; 179*f126890aSEmmanuel Vadot status = "okay"; 180*f126890aSEmmanuel Vadot}; 181*f126890aSEmmanuel Vadot 182*f126890aSEmmanuel Vadot&uart1 { 183*f126890aSEmmanuel Vadot pinctrl-names = "default"; 184*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart1>; 185*f126890aSEmmanuel Vadot status = "okay"; 186*f126890aSEmmanuel Vadot}; 187*f126890aSEmmanuel Vadot 188*f126890aSEmmanuel Vadot&uart2 { 189*f126890aSEmmanuel Vadot pinctrl-names = "default"; 190*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart2>; 191*f126890aSEmmanuel Vadot status = "okay"; 192*f126890aSEmmanuel Vadot}; 193*f126890aSEmmanuel Vadot 194*f126890aSEmmanuel Vadot&uart3 { 195*f126890aSEmmanuel Vadot pinctrl-names = "default"; 196*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart3>; 197*f126890aSEmmanuel Vadot status = "okay"; 198*f126890aSEmmanuel Vadot}; 199*f126890aSEmmanuel Vadot 200*f126890aSEmmanuel Vadot&uart4 { 201*f126890aSEmmanuel Vadot pinctrl-names = "default"; 202*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart4>; 203*f126890aSEmmanuel Vadot status = "okay"; 204*f126890aSEmmanuel Vadot}; 205*f126890aSEmmanuel Vadot 206*f126890aSEmmanuel Vadot&uart5 { 207*f126890aSEmmanuel Vadot pinctrl-names = "default"; 208*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart5>; 209*f126890aSEmmanuel Vadot status = "okay"; 210*f126890aSEmmanuel Vadot}; 211*f126890aSEmmanuel Vadot 212*f126890aSEmmanuel Vadot&usbh1 { 213*f126890aSEmmanuel Vadot dr_mode = "host"; 214*f126890aSEmmanuel Vadot disable-over-current; 215*f126890aSEmmanuel Vadot status = "okay"; 216*f126890aSEmmanuel Vadot}; 217*f126890aSEmmanuel Vadot 218*f126890aSEmmanuel Vadot&usbotg { 219*f126890aSEmmanuel Vadot vbus-supply = <®_usb_otg_vbus>; 220*f126890aSEmmanuel Vadot pinctrl-names = "default"; 221*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usbotg>; 222*f126890aSEmmanuel Vadot dr_mode = "otg"; 223*f126890aSEmmanuel Vadot disable-over-current; 224*f126890aSEmmanuel Vadot status = "okay"; 225*f126890aSEmmanuel Vadot}; 226*f126890aSEmmanuel Vadot 227*f126890aSEmmanuel Vadot&usdhc2 { 228*f126890aSEmmanuel Vadot pinctrl-names = "default"; 229*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc2>; 230*f126890aSEmmanuel Vadot vmmc-supply = <®_3p3v>; 231*f126890aSEmmanuel Vadot cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 232*f126890aSEmmanuel Vadot wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 233*f126890aSEmmanuel Vadot status = "okay"; 234*f126890aSEmmanuel Vadot}; 235*f126890aSEmmanuel Vadot 236*f126890aSEmmanuel Vadot&usdhc3 { 237*f126890aSEmmanuel Vadot pinctrl-names = "default"; 238*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc3>; 239*f126890aSEmmanuel Vadot vmmc-supply = <®_3p3v>; 240*f126890aSEmmanuel Vadot non-removable; 241*f126890aSEmmanuel Vadot status = "okay"; 242*f126890aSEmmanuel Vadot}; 243*f126890aSEmmanuel Vadot 244*f126890aSEmmanuel Vadot&iomuxc { 245*f126890aSEmmanuel Vadot 246*f126890aSEmmanuel Vadot pinctrl_audmux: audmuxgrp { 247*f126890aSEmmanuel Vadot fsl,pins = < 248*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 249*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 250*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 251*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 252*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* CAM_MCLK */ 253*f126890aSEmmanuel Vadot >; 254*f126890aSEmmanuel Vadot }; 255*f126890aSEmmanuel Vadot 256*f126890aSEmmanuel Vadot pinctrl_ecspi1: ecspi1grp { 257*f126890aSEmmanuel Vadot fsl,pins = < 258*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 259*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 260*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 261*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x000b1 /* CS0 */ 262*f126890aSEmmanuel Vadot >; 263*f126890aSEmmanuel Vadot }; 264*f126890aSEmmanuel Vadot 265*f126890aSEmmanuel Vadot pinctrl_enet: enetgrp { 266*f126890aSEmmanuel Vadot fsl,pins = < 267*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 268*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 269*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 270*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 271*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 272*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 273*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 274*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 275*f126890aSEmmanuel Vadot /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ 276*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 277*f126890aSEmmanuel Vadot /* AR8035 pin strapping: IO voltage: pull up */ 278*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 279*f126890aSEmmanuel Vadot /* AR8035 pin strapping: PHYADDR#0: pull down */ 280*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030 281*f126890aSEmmanuel Vadot /* AR8035 pin strapping: PHYADDR#1: pull down */ 282*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030 283*f126890aSEmmanuel Vadot /* AR8035 pin strapping: MODE#1: pull up */ 284*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 285*f126890aSEmmanuel Vadot /* AR8035 pin strapping: MODE#3: pull up */ 286*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 287*f126890aSEmmanuel Vadot /* AR8035 pin strapping: MODE#0: pull down */ 288*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030 289*f126890aSEmmanuel Vadot /* GPIO16 -> AR8035 25MHz */ 290*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 291*f126890aSEmmanuel Vadot /* RGMII_nRST */ 292*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 293*f126890aSEmmanuel Vadot /* AR8035 interrupt */ 294*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x180b0 295*f126890aSEmmanuel Vadot >; 296*f126890aSEmmanuel Vadot }; 297*f126890aSEmmanuel Vadot 298*f126890aSEmmanuel Vadot pinctrl_i2c1: i2c1grp { 299*f126890aSEmmanuel Vadot fsl,pins = < 300*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 301*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 302*f126890aSEmmanuel Vadot >; 303*f126890aSEmmanuel Vadot }; 304*f126890aSEmmanuel Vadot 305*f126890aSEmmanuel Vadot pinctrl_i2c2: i2c2grp { 306*f126890aSEmmanuel Vadot fsl,pins = < 307*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 308*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 309*f126890aSEmmanuel Vadot >; 310*f126890aSEmmanuel Vadot }; 311*f126890aSEmmanuel Vadot 312*f126890aSEmmanuel Vadot pinctrl_i2c3: i2c3grp { 313*f126890aSEmmanuel Vadot fsl,pins = < 314*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 315*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 316*f126890aSEmmanuel Vadot >; 317*f126890aSEmmanuel Vadot }; 318*f126890aSEmmanuel Vadot 319*f126890aSEmmanuel Vadot pinctrl_led: ledgrp { 320*f126890aSEmmanuel Vadot fsl,pins = < 321*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* LED1 */ 322*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x1b0b1 /* LED2 */ 323*f126890aSEmmanuel Vadot >; 324*f126890aSEmmanuel Vadot }; 325*f126890aSEmmanuel Vadot 326*f126890aSEmmanuel Vadot pinctrl_pwm1: pwm1grp { 327*f126890aSEmmanuel Vadot fsl,pins = < 328*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1 329*f126890aSEmmanuel Vadot >; 330*f126890aSEmmanuel Vadot }; 331*f126890aSEmmanuel Vadot 332*f126890aSEmmanuel Vadot pinctrl_pwm2: pwm2grp { 333*f126890aSEmmanuel Vadot fsl,pins = < 334*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1 335*f126890aSEmmanuel Vadot >; 336*f126890aSEmmanuel Vadot }; 337*f126890aSEmmanuel Vadot 338*f126890aSEmmanuel Vadot pinctrl_pwm3: pwm3grp { 339*f126890aSEmmanuel Vadot fsl,pins = < 340*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 341*f126890aSEmmanuel Vadot >; 342*f126890aSEmmanuel Vadot }; 343*f126890aSEmmanuel Vadot 344*f126890aSEmmanuel Vadot pinctrl_pwm4: pwm4grp { 345*f126890aSEmmanuel Vadot fsl,pins = < 346*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 347*f126890aSEmmanuel Vadot >; 348*f126890aSEmmanuel Vadot }; 349*f126890aSEmmanuel Vadot 350*f126890aSEmmanuel Vadot pinctrl_uart1: uart1grp { 351*f126890aSEmmanuel Vadot fsl,pins = < 352*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 353*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 354*f126890aSEmmanuel Vadot >; 355*f126890aSEmmanuel Vadot }; 356*f126890aSEmmanuel Vadot 357*f126890aSEmmanuel Vadot pinctrl_uart2: uart2grp { 358*f126890aSEmmanuel Vadot fsl,pins = < 359*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 360*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 361*f126890aSEmmanuel Vadot >; 362*f126890aSEmmanuel Vadot }; 363*f126890aSEmmanuel Vadot 364*f126890aSEmmanuel Vadot pinctrl_uart3: uart3grp { 365*f126890aSEmmanuel Vadot fsl,pins = < 366*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 367*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 368*f126890aSEmmanuel Vadot >; 369*f126890aSEmmanuel Vadot }; 370*f126890aSEmmanuel Vadot 371*f126890aSEmmanuel Vadot pinctrl_uart4: uart4grp { 372*f126890aSEmmanuel Vadot fsl,pins = < 373*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 374*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 375*f126890aSEmmanuel Vadot >; 376*f126890aSEmmanuel Vadot }; 377*f126890aSEmmanuel Vadot 378*f126890aSEmmanuel Vadot pinctrl_uart5: uart5grp { 379*f126890aSEmmanuel Vadot fsl,pins = < 380*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 381*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 382*f126890aSEmmanuel Vadot >; 383*f126890aSEmmanuel Vadot }; 384*f126890aSEmmanuel Vadot 385*f126890aSEmmanuel Vadot pinctrl_usbotg: usbotggrp { 386*f126890aSEmmanuel Vadot fsl,pins = < 387*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 388*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0 389*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 /* USB OTG POWER ENABLE */ 390*f126890aSEmmanuel Vadot >; 391*f126890aSEmmanuel Vadot }; 392*f126890aSEmmanuel Vadot 393*f126890aSEmmanuel Vadot pinctrl_usdhc2: usdhc2grp { 394*f126890aSEmmanuel Vadot fsl,pins = < 395*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 396*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 397*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 398*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 399*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 400*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 401*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */ 402*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1f0b0 /* WP */ 403*f126890aSEmmanuel Vadot >; 404*f126890aSEmmanuel Vadot }; 405*f126890aSEmmanuel Vadot 406*f126890aSEmmanuel Vadot pinctrl_usdhc3: usdhc3grp { 407*f126890aSEmmanuel Vadot fsl,pins = < 408*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17009 409*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10009 410*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17009 411*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17009 412*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17009 413*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17009 414*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_RST__SD3_RESET 0x17009 415*f126890aSEmmanuel Vadot >; 416*f126890aSEmmanuel Vadot }; 417*f126890aSEmmanuel Vadot}; 418