1*5f62a964SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*5f62a964SEmmanuel Vadot// 3*5f62a964SEmmanuel Vadot// Copyright 2024 Comvetia AG 4*5f62a964SEmmanuel Vadot 5*5f62a964SEmmanuel Vadot/dts-v1/; 6*5f62a964SEmmanuel Vadot#include "imx6q-phytec-pfla02.dtsi" 7*5f62a964SEmmanuel Vadot 8*5f62a964SEmmanuel Vadot/ { 9*5f62a964SEmmanuel Vadot model = "COMVETIA QSoIP LXR-2"; 10*5f62a964SEmmanuel Vadot compatible = "comvetia,imx6q-lxr", "phytec,imx6q-pfla02", "fsl,imx6q"; 11*5f62a964SEmmanuel Vadot 12*5f62a964SEmmanuel Vadot chosen { 13*5f62a964SEmmanuel Vadot stdout-path = &uart4; 14*5f62a964SEmmanuel Vadot }; 15*5f62a964SEmmanuel Vadot 16*5f62a964SEmmanuel Vadot spi { 17*5f62a964SEmmanuel Vadot compatible = "spi-gpio"; 18*5f62a964SEmmanuel Vadot pinctrl-names = "default"; 19*5f62a964SEmmanuel Vadot pinctrl-0 = <&pinctrl_spi_gpio>; 20*5f62a964SEmmanuel Vadot sck-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>; 21*5f62a964SEmmanuel Vadot mosi-gpios = <&gpio5 7 GPIO_ACTIVE_HIGH>; 22*5f62a964SEmmanuel Vadot num-chipselects = <0>; 23*5f62a964SEmmanuel Vadot #address-cells = <1>; 24*5f62a964SEmmanuel Vadot #size-cells = <0>; 25*5f62a964SEmmanuel Vadot 26*5f62a964SEmmanuel Vadot fpga@0 { 27*5f62a964SEmmanuel Vadot compatible = "altr,fpga-passive-serial"; 28*5f62a964SEmmanuel Vadot reg = <0>; 29*5f62a964SEmmanuel Vadot pinctrl-names = "default"; 30*5f62a964SEmmanuel Vadot pinctrl-0 = <&pinctrl_fpga>; 31*5f62a964SEmmanuel Vadot nconfig-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>; 32*5f62a964SEmmanuel Vadot nstat-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>; 33*5f62a964SEmmanuel Vadot confd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 34*5f62a964SEmmanuel Vadot }; 35*5f62a964SEmmanuel Vadot }; 36*5f62a964SEmmanuel Vadot}; 37*5f62a964SEmmanuel Vadot 38*5f62a964SEmmanuel Vadot&ecspi3 { 39*5f62a964SEmmanuel Vadot pinctrl-names = "default"; 40*5f62a964SEmmanuel Vadot pinctrl-0 = <&pinctrl_ecspi3>; 41*5f62a964SEmmanuel Vadot cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; 42*5f62a964SEmmanuel Vadot status = "okay"; 43*5f62a964SEmmanuel Vadot 44*5f62a964SEmmanuel Vadot flash@0 { 45*5f62a964SEmmanuel Vadot compatible = "jedec,spi-nor"; 46*5f62a964SEmmanuel Vadot reg = <0>; 47*5f62a964SEmmanuel Vadot spi-max-frequency = <20000000>; 48*5f62a964SEmmanuel Vadot }; 49*5f62a964SEmmanuel Vadot}; 50*5f62a964SEmmanuel Vadot 51*5f62a964SEmmanuel Vadot&fec { 52*5f62a964SEmmanuel Vadot status = "okay"; 53*5f62a964SEmmanuel Vadot}; 54*5f62a964SEmmanuel Vadot 55*5f62a964SEmmanuel Vadot&i2c3 { 56*5f62a964SEmmanuel Vadot status = "okay"; 57*5f62a964SEmmanuel Vadot}; 58*5f62a964SEmmanuel Vadot 59*5f62a964SEmmanuel Vadot&uart3 { 60*5f62a964SEmmanuel Vadot status = "okay"; 61*5f62a964SEmmanuel Vadot}; 62*5f62a964SEmmanuel Vadot 63*5f62a964SEmmanuel Vadot&uart4 { 64*5f62a964SEmmanuel Vadot status = "okay"; 65*5f62a964SEmmanuel Vadot}; 66*5f62a964SEmmanuel Vadot 67*5f62a964SEmmanuel Vadot&usdhc3 { 68*5f62a964SEmmanuel Vadot no-1-8-v; 69*5f62a964SEmmanuel Vadot status = "okay"; 70*5f62a964SEmmanuel Vadot}; 71*5f62a964SEmmanuel Vadot 72*5f62a964SEmmanuel Vadot&iomuxc { 73*5f62a964SEmmanuel Vadot pinctrl_fpga: fpgagrp { 74*5f62a964SEmmanuel Vadot fsl,pins = < 75*5f62a964SEmmanuel Vadot MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0 76*5f62a964SEmmanuel Vadot MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0 77*5f62a964SEmmanuel Vadot MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0 78*5f62a964SEmmanuel Vadot >; 79*5f62a964SEmmanuel Vadot }; 80*5f62a964SEmmanuel Vadot 81*5f62a964SEmmanuel Vadot pinctrl_spi_gpio: spigpiogrp { 82*5f62a964SEmmanuel Vadot fsl,pins = < 83*5f62a964SEmmanuel Vadot MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x1b0b0 84*5f62a964SEmmanuel Vadot MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b0 85*5f62a964SEmmanuel Vadot >; 86*5f62a964SEmmanuel Vadot }; 87*5f62a964SEmmanuel Vadot}; 88