1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2*f126890aSEmmanuel Vadot// 3*f126890aSEmmanuel Vadot// Copyright (C) 2019 Logic PD, Inc. 4*f126890aSEmmanuel Vadot 5*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 6*f126890aSEmmanuel Vadot#include <dt-bindings/input/input.h> 7*f126890aSEmmanuel Vadot 8*f126890aSEmmanuel Vadot/ { 9*f126890aSEmmanuel Vadot chosen { 10*f126890aSEmmanuel Vadot stdout-path = &uart1; 11*f126890aSEmmanuel Vadot }; 12*f126890aSEmmanuel Vadot 13*f126890aSEmmanuel Vadot memory@10000000 { 14*f126890aSEmmanuel Vadot device_type = "memory"; 15*f126890aSEmmanuel Vadot reg = <0x10000000 0x80000000>; 16*f126890aSEmmanuel Vadot }; 17*f126890aSEmmanuel Vadot 18*f126890aSEmmanuel Vadot reg_wl18xx_vmmc: regulator-wl18xx { 19*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 20*f126890aSEmmanuel Vadot regulator-name = "vwl1837"; 21*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 22*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 23*f126890aSEmmanuel Vadot gpio = <&gpio7 0 GPIO_ACTIVE_HIGH>; 24*f126890aSEmmanuel Vadot startup-delay-us = <70000>; 25*f126890aSEmmanuel Vadot enable-active-high; 26*f126890aSEmmanuel Vadot }; 27*f126890aSEmmanuel Vadot}; 28*f126890aSEmmanuel Vadot 29*f126890aSEmmanuel Vadot&clks { 30*f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, 31*f126890aSEmmanuel Vadot <&clks IMX6QDL_CLK_LDB_DI1_SEL>; 32*f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, 33*f126890aSEmmanuel Vadot <&clks IMX6QDL_CLK_PLL3_USB_OTG>; 34*f126890aSEmmanuel Vadot}; 35*f126890aSEmmanuel Vadot 36*f126890aSEmmanuel Vadot&gpmi { 37*f126890aSEmmanuel Vadot pinctrl-names = "default"; 38*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_gpmi_nand>; 39*f126890aSEmmanuel Vadot nand-on-flash-bbt; 40*f126890aSEmmanuel Vadot status = "okay"; 41*f126890aSEmmanuel Vadot}; 42*f126890aSEmmanuel Vadot 43*f126890aSEmmanuel Vadot&i2c3 { 44*f126890aSEmmanuel Vadot clock-frequency = <100000>; 45*f126890aSEmmanuel Vadot pinctrl-names = "default"; 46*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c3>; 47*f126890aSEmmanuel Vadot status = "okay"; 48*f126890aSEmmanuel Vadot 49*f126890aSEmmanuel Vadot pfuze100: pmic@8 { 50*f126890aSEmmanuel Vadot compatible = "fsl,pfuze100"; 51*f126890aSEmmanuel Vadot reg = <0x08>; 52*f126890aSEmmanuel Vadot 53*f126890aSEmmanuel Vadot regulators { 54*f126890aSEmmanuel Vadot sw1a_reg: sw1ab { 55*f126890aSEmmanuel Vadot regulator-min-microvolt = <725000>; 56*f126890aSEmmanuel Vadot regulator-max-microvolt = <1450000>; 57*f126890aSEmmanuel Vadot regulator-name = "vddcore"; 58*f126890aSEmmanuel Vadot regulator-boot-on; 59*f126890aSEmmanuel Vadot regulator-always-on; 60*f126890aSEmmanuel Vadot regulator-ramp-delay = <6250>; 61*f126890aSEmmanuel Vadot }; 62*f126890aSEmmanuel Vadot 63*f126890aSEmmanuel Vadot sw1c_reg: sw1c { 64*f126890aSEmmanuel Vadot regulator-min-microvolt = <725000>; 65*f126890aSEmmanuel Vadot regulator-max-microvolt = <1450000>; 66*f126890aSEmmanuel Vadot regulator-name = "vddsoc"; 67*f126890aSEmmanuel Vadot regulator-boot-on; 68*f126890aSEmmanuel Vadot regulator-always-on; 69*f126890aSEmmanuel Vadot regulator-ramp-delay = <6250>; 70*f126890aSEmmanuel Vadot }; 71*f126890aSEmmanuel Vadot 72*f126890aSEmmanuel Vadot sw2_reg: sw2 { 73*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 74*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 75*f126890aSEmmanuel Vadot regulator-name = "gen_3v3"; 76*f126890aSEmmanuel Vadot regulator-boot-on; 77*f126890aSEmmanuel Vadot }; 78*f126890aSEmmanuel Vadot 79*f126890aSEmmanuel Vadot sw3a_reg: sw3a { 80*f126890aSEmmanuel Vadot regulator-min-microvolt = <1350000>; 81*f126890aSEmmanuel Vadot regulator-max-microvolt = <1350000>; 82*f126890aSEmmanuel Vadot regulator-name = "sw3a_vddr"; 83*f126890aSEmmanuel Vadot regulator-boot-on; 84*f126890aSEmmanuel Vadot regulator-always-on; 85*f126890aSEmmanuel Vadot }; 86*f126890aSEmmanuel Vadot 87*f126890aSEmmanuel Vadot sw3b_reg: sw3b { 88*f126890aSEmmanuel Vadot regulator-min-microvolt = <1350000>; 89*f126890aSEmmanuel Vadot regulator-max-microvolt = <1350000>; 90*f126890aSEmmanuel Vadot regulator-name = "sw3b_vddr"; 91*f126890aSEmmanuel Vadot regulator-boot-on; 92*f126890aSEmmanuel Vadot regulator-always-on; 93*f126890aSEmmanuel Vadot }; 94*f126890aSEmmanuel Vadot 95*f126890aSEmmanuel Vadot sw4_reg: sw4 { 96*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 97*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 98*f126890aSEmmanuel Vadot regulator-name = "gen_rgmii"; 99*f126890aSEmmanuel Vadot }; 100*f126890aSEmmanuel Vadot 101*f126890aSEmmanuel Vadot swbst_reg: swbst { 102*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 103*f126890aSEmmanuel Vadot regulator-max-microvolt = <5150000>; 104*f126890aSEmmanuel Vadot regulator-name = "gen_5v0"; 105*f126890aSEmmanuel Vadot }; 106*f126890aSEmmanuel Vadot 107*f126890aSEmmanuel Vadot snvs_reg: vsnvs { 108*f126890aSEmmanuel Vadot regulator-min-microvolt = <1000000>; 109*f126890aSEmmanuel Vadot regulator-max-microvolt = <3000000>; 110*f126890aSEmmanuel Vadot regulator-name = "gen_vsns"; 111*f126890aSEmmanuel Vadot regulator-boot-on; 112*f126890aSEmmanuel Vadot regulator-always-on; 113*f126890aSEmmanuel Vadot }; 114*f126890aSEmmanuel Vadot 115*f126890aSEmmanuel Vadot vref_reg: vrefddr { 116*f126890aSEmmanuel Vadot regulator-boot-on; 117*f126890aSEmmanuel Vadot regulator-always-on; 118*f126890aSEmmanuel Vadot }; 119*f126890aSEmmanuel Vadot 120*f126890aSEmmanuel Vadot vgen1_reg: vgen1 { 121*f126890aSEmmanuel Vadot regulator-min-microvolt = <1500000>; 122*f126890aSEmmanuel Vadot regulator-max-microvolt = <1500000>; 123*f126890aSEmmanuel Vadot regulator-name = "gen_1v5"; 124*f126890aSEmmanuel Vadot }; 125*f126890aSEmmanuel Vadot 126*f126890aSEmmanuel Vadot vgen2_reg: vgen2 { 127*f126890aSEmmanuel Vadot regulator-name = "vgen2"; 128*f126890aSEmmanuel Vadot regulator-min-microvolt = <800000>; 129*f126890aSEmmanuel Vadot regulator-max-microvolt = <1550000>; 130*f126890aSEmmanuel Vadot }; 131*f126890aSEmmanuel Vadot 132*f126890aSEmmanuel Vadot vgen3_reg: vgen3 { 133*f126890aSEmmanuel Vadot regulator-name = "gen_vadj_0"; 134*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 135*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 136*f126890aSEmmanuel Vadot }; 137*f126890aSEmmanuel Vadot 138*f126890aSEmmanuel Vadot vgen4_reg: vgen4 { 139*f126890aSEmmanuel Vadot regulator-name = "gen_1v8"; 140*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 141*f126890aSEmmanuel Vadot regulator-max-microvolt = <1800000>; 142*f126890aSEmmanuel Vadot regulator-always-on; 143*f126890aSEmmanuel Vadot }; 144*f126890aSEmmanuel Vadot 145*f126890aSEmmanuel Vadot vgen5_reg: vgen5 { 146*f126890aSEmmanuel Vadot regulator-name = "gen_vadj_1"; 147*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 148*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 149*f126890aSEmmanuel Vadot regulator-always-on; 150*f126890aSEmmanuel Vadot }; 151*f126890aSEmmanuel Vadot 152*f126890aSEmmanuel Vadot vgen6_reg: vgen6 { 153*f126890aSEmmanuel Vadot regulator-name = "gen_2v5"; 154*f126890aSEmmanuel Vadot regulator-min-microvolt = <2500000>; 155*f126890aSEmmanuel Vadot regulator-max-microvolt = <2500000>; 156*f126890aSEmmanuel Vadot regulator-always-on; 157*f126890aSEmmanuel Vadot }; 158*f126890aSEmmanuel Vadot 159*f126890aSEmmanuel Vadot coin_reg: coin { 160*f126890aSEmmanuel Vadot regulator-min-microvolt = <2500000>; 161*f126890aSEmmanuel Vadot regulator-max-microvolt = <3000000>; 162*f126890aSEmmanuel Vadot regulator-always-on; 163*f126890aSEmmanuel Vadot }; 164*f126890aSEmmanuel Vadot }; 165*f126890aSEmmanuel Vadot }; 166*f126890aSEmmanuel Vadot 167*f126890aSEmmanuel Vadot temperature-sensor@49 { 168*f126890aSEmmanuel Vadot compatible = "ti,tmp102"; 169*f126890aSEmmanuel Vadot reg = <0x49>; 170*f126890aSEmmanuel Vadot interrupt-parent = <&gpio6>; 171*f126890aSEmmanuel Vadot interrupts = <15 IRQ_TYPE_LEVEL_LOW>; 172*f126890aSEmmanuel Vadot #thermal-sensor-cells = <1>; 173*f126890aSEmmanuel Vadot }; 174*f126890aSEmmanuel Vadot 175*f126890aSEmmanuel Vadot temperature-sensor@4a { 176*f126890aSEmmanuel Vadot compatible = "ti,tmp102"; 177*f126890aSEmmanuel Vadot reg = <0x4a>; 178*f126890aSEmmanuel Vadot pinctrl-names = "default"; 179*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_tempsense>; 180*f126890aSEmmanuel Vadot interrupt-parent = <&gpio6>; 181*f126890aSEmmanuel Vadot interrupts = <15 IRQ_TYPE_LEVEL_LOW>; 182*f126890aSEmmanuel Vadot #thermal-sensor-cells = <1>; 183*f126890aSEmmanuel Vadot }; 184*f126890aSEmmanuel Vadot 185*f126890aSEmmanuel Vadot eeprom@51 { 186*f126890aSEmmanuel Vadot compatible = "atmel,24c64"; 187*f126890aSEmmanuel Vadot pagesize = <32>; 188*f126890aSEmmanuel Vadot read-only; /* Manufacturing EEPROM programmed at factory */ 189*f126890aSEmmanuel Vadot reg = <0x51>; 190*f126890aSEmmanuel Vadot }; 191*f126890aSEmmanuel Vadot 192*f126890aSEmmanuel Vadot eeprom@52 { 193*f126890aSEmmanuel Vadot compatible = "atmel,24c64"; 194*f126890aSEmmanuel Vadot pagesize = <32>; 195*f126890aSEmmanuel Vadot reg = <0x52>; 196*f126890aSEmmanuel Vadot }; 197*f126890aSEmmanuel Vadot}; 198*f126890aSEmmanuel Vadot 199*f126890aSEmmanuel Vadot/* Reroute power feeding the CPU to come from the external PMIC */ 200*f126890aSEmmanuel Vadot®_arm 201*f126890aSEmmanuel Vadot{ 202*f126890aSEmmanuel Vadot vin-supply = <&sw1a_reg>; 203*f126890aSEmmanuel Vadot}; 204*f126890aSEmmanuel Vadot 205*f126890aSEmmanuel Vadot®_soc 206*f126890aSEmmanuel Vadot{ 207*f126890aSEmmanuel Vadot vin-supply = <&sw1c_reg>; 208*f126890aSEmmanuel Vadot}; 209*f126890aSEmmanuel Vadot 210*f126890aSEmmanuel Vadot&snvs_poweroff { 211*f126890aSEmmanuel Vadot status = "okay"; 212*f126890aSEmmanuel Vadot}; 213*f126890aSEmmanuel Vadot 214*f126890aSEmmanuel Vadot&iomuxc { 215*f126890aSEmmanuel Vadot pinctrl-names = "default"; 216*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_hog>; 217*f126890aSEmmanuel Vadot 218*f126890aSEmmanuel Vadot pinctrl_gpmi_nand: gpmi-nandgrp { 219*f126890aSEmmanuel Vadot fsl,pins = < 220*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x0b0b1 221*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x0b0b1 222*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x0b0b1 223*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x0b000 224*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x0b0b1 225*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x0b0b1 226*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x0b0b1 227*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x0b0b1 228*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x0b0b1 229*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x0b0b1 230*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x0b0b1 231*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x0b0b1 232*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x0b0b1 233*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x0b0b1 234*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x0b0b1 235*f126890aSEmmanuel Vadot >; 236*f126890aSEmmanuel Vadot }; 237*f126890aSEmmanuel Vadot 238*f126890aSEmmanuel Vadot pinctrl_hog: hoggrp { 239*f126890aSEmmanuel Vadot fsl,pins = < /* Enable ARM Debugger */ 240*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x1b0b0 241*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO 0x1b0b0 242*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 0x1b0b0 243*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK 0x1b0b0 244*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 0x1b0b0 245*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 0x1b0b0 246*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 0x1b0b0 247*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 0x1b0b0 248*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 0x1b0b0 249*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 0x1b0b0 250*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x1b0b0 251*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 0x1b0b0 252*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 0x1b0b0 253*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 0x1b0b0 254*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 0x1b0b0 255*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 0x1b0b0 256*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 0x1b0b0 257*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 0x1b0b0 258*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 0x1b0b0 259*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 260*f126890aSEmmanuel Vadot >; 261*f126890aSEmmanuel Vadot }; 262*f126890aSEmmanuel Vadot 263*f126890aSEmmanuel Vadot pinctrl_i2c3: i2c3grp { 264*f126890aSEmmanuel Vadot fsl,pins = < 265*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 266*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 267*f126890aSEmmanuel Vadot >; 268*f126890aSEmmanuel Vadot }; 269*f126890aSEmmanuel Vadot 270*f126890aSEmmanuel Vadot pinctrl_tempsense: tempsensegrp { 271*f126890aSEmmanuel Vadot fsl,pins = < 272*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 273*f126890aSEmmanuel Vadot >; 274*f126890aSEmmanuel Vadot }; 275*f126890aSEmmanuel Vadot 276*f126890aSEmmanuel Vadot pinctrl_uart1: uart1grp { 277*f126890aSEmmanuel Vadot fsl,pins = < 278*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 279*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 280*f126890aSEmmanuel Vadot >; 281*f126890aSEmmanuel Vadot }; 282*f126890aSEmmanuel Vadot 283*f126890aSEmmanuel Vadot pinctrl_uart2: uart2grp { 284*f126890aSEmmanuel Vadot fsl,pins = < 285*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 /* BT_EN */ 286*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 287*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 288*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 289*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 290*f126890aSEmmanuel Vadot >; 291*f126890aSEmmanuel Vadot }; 292*f126890aSEmmanuel Vadot 293*f126890aSEmmanuel Vadot pinctrl_usdhc1: usdhc1grp { 294*f126890aSEmmanuel Vadot fsl,pins = < 295*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170B9 296*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100B9 297*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9 298*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9 299*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9 300*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9 301*f126890aSEmmanuel Vadot >; 302*f126890aSEmmanuel Vadot }; 303*f126890aSEmmanuel Vadot 304*f126890aSEmmanuel Vadot pinctrl_usdhc3: usdhc3grp { 305*f126890aSEmmanuel Vadot fsl,pins = < 306*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17049 307*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10049 308*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17049 309*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17049 310*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17049 311*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17049 312*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x130b0 /* WL_IRQ */ 313*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* WLAN_EN */ 314*f126890aSEmmanuel Vadot >; 315*f126890aSEmmanuel Vadot }; 316*f126890aSEmmanuel Vadot}; 317*f126890aSEmmanuel Vadot 318*f126890aSEmmanuel Vadot&snvs_poweroff { 319*f126890aSEmmanuel Vadot status = "okay"; 320*f126890aSEmmanuel Vadot}; 321*f126890aSEmmanuel Vadot 322*f126890aSEmmanuel Vadot&uart1 { 323*f126890aSEmmanuel Vadot pinctrl-names = "default"; 324*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart1>; 325*f126890aSEmmanuel Vadot status = "okay"; 326*f126890aSEmmanuel Vadot}; 327*f126890aSEmmanuel Vadot 328*f126890aSEmmanuel Vadot&uart2 { 329*f126890aSEmmanuel Vadot pinctrl-names = "default"; 330*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart2>; 331*f126890aSEmmanuel Vadot uart-has-rtscts; 332*f126890aSEmmanuel Vadot status = "okay"; 333*f126890aSEmmanuel Vadot 334*f126890aSEmmanuel Vadot bluetooth { 335*f126890aSEmmanuel Vadot compatible = "ti,wl1837-st"; 336*f126890aSEmmanuel Vadot enable-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>; 337*f126890aSEmmanuel Vadot }; 338*f126890aSEmmanuel Vadot}; 339*f126890aSEmmanuel Vadot 340*f126890aSEmmanuel Vadot&usdhc1 { 341*f126890aSEmmanuel Vadot pinctrl-names = "default", "state_100mhz", "state_200mhz"; 342*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc1>; 343*f126890aSEmmanuel Vadot non-removable; 344*f126890aSEmmanuel Vadot keep-power-in-suspend; 345*f126890aSEmmanuel Vadot wakeup-source; 346*f126890aSEmmanuel Vadot vmmc-supply = <&sw2_reg>; 347*f126890aSEmmanuel Vadot status = "okay"; 348*f126890aSEmmanuel Vadot}; 349*f126890aSEmmanuel Vadot 350*f126890aSEmmanuel Vadot&usdhc3 { 351*f126890aSEmmanuel Vadot pinctrl-names = "default"; 352*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc3>; 353*f126890aSEmmanuel Vadot non-removable; 354*f126890aSEmmanuel Vadot cap-power-off-card; 355*f126890aSEmmanuel Vadot keep-power-in-suspend; 356*f126890aSEmmanuel Vadot wakeup-source; 357*f126890aSEmmanuel Vadot vmmc-supply = <®_wl18xx_vmmc>; 358*f126890aSEmmanuel Vadot #address-cells = <1>; 359*f126890aSEmmanuel Vadot #size-cells = <0>; 360*f126890aSEmmanuel Vadot status = "okay"; 361*f126890aSEmmanuel Vadot 362*f126890aSEmmanuel Vadot wlcore: wlcore@2 { 363*f126890aSEmmanuel Vadot compatible = "ti,wl1837"; 364*f126890aSEmmanuel Vadot reg = <2>; 365*f126890aSEmmanuel Vadot interrupt-parent = <&gpio7>; 366*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; 367*f126890aSEmmanuel Vadot tcxo-clock-frequency = <26000000>; 368*f126890aSEmmanuel Vadot }; 369*f126890aSEmmanuel Vadot}; 370