1// SPDX-License-Identifier: GPL-2.0+ 2// 3// Copyright 2023 Linaro Ltd. 4 5/dts-v1/; 6 7#include "imx53.dtsi" 8 9/ { 10 model = "StarterKit SK-iMX53 Board"; 11 compatible = "starterkit,sk-imx53", "fsl,imx53"; 12 13 aliases { 14 /* 15 * iMX RTC is not battery powered on this board. 16 * Use the i2c RTC as rtc0. 17 */ 18 rtc0 = &rtc; 19 rtc1 = &srtc; 20 }; 21 22 chosen { 23 stdout-path = &uart1; 24 }; 25 26 memory@70000000 { 27 device_type = "memory"; 28 /* v2 had only 256 MB, v3 has 512 MB */ 29 reg = <0x70000000 0x20000000>; 30 }; 31 32 reg_usb1_vbus: regulator-usb-vbus { 33 compatible = "regulator-fixed"; 34 regulator-name = "usb_vbus"; 35 regulator-min-microvolt = <5000000>; 36 regulator-max-microvolt = <5000000>; 37 gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>; 38 enable-active-high; 39 }; 40 41 reg_usb_otg_vbus: regulator-otg-vbus { 42 compatible = "regulator-fixed"; 43 regulator-name = "usb_vbus"; 44 regulator-min-microvolt = <5000000>; 45 regulator-max-microvolt = <5000000>; 46 gpio = <&gpio2 24 GPIO_ACTIVE_HIGH>; 47 enable-active-high; 48 }; 49}; 50 51&audmux { 52 pinctrl-names = "default"; 53 pinctrl-0 = <&pinctrl_audmux>; 54 status = "okay"; 55}; 56 57&can1 { 58 pinctrl-names = "default"; 59 pinctrl-0 = <&pinctrl_can1>; 60 status = "okay"; 61}; 62 63&cpu0 { 64 /* CPU rated to 800 MHz, not the default 1.2GHz. */ 65 operating-points = < 66 /* kHz uV */ 67 166666 850000 68 400000 900000 69 800000 1050000 70 >; 71}; 72 73&ecspi1 { 74 pinctrl-names = "default"; 75 pinctrl-0 = <&pinctrl_ecspi1>; 76 cs-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 77 status = "okay"; 78}; 79 80&ecspi2 { 81 pinctrl-names = "default"; 82 pinctrl-0 = <&pinctrl_ecspi2>; 83 cs-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; 84 status = "okay"; 85}; 86 87&esdhc1 { 88 cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>; 89 fsl,wp-controller; 90 pinctrl-names = "default"; 91 pinctrl-0 = <&pinctrl_esdhc1>; 92 status = "okay"; 93}; 94 95&fec { 96 pinctrl-names = "default"; 97 pinctrl-0 = <&pinctrl_fec>; 98 phy-mode = "rmii"; 99 phy-handle = <&phy0>; 100 mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */ 101 status = "okay"; 102 103 mdio { 104 #address-cells = <1>; 105 #size-cells = <0>; 106 107 phy0: ethernet-phy@0 { 108 reg = <0>; 109 reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 110 }; 111 }; 112}; 113 114&i2c1 { 115 pinctrl-names = "default"; 116 pinctrl-0 = <&pinctrl_i2c1>; 117 status = "okay"; 118}; 119 120&i2c2 { 121 pinctrl-names = "default", "gpio"; 122 pinctrl-0 = <&pinctrl_i2c2>; 123 pinctrl-1 = <&pinctrl_i2c2_gpio>; 124 sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; 125 scl-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>; 126 status = "okay"; 127 128 tlv320aic23: codec@1a { 129 compatible = "ti,tlv320aic23"; 130 reg = <0x1a>; 131 pinctrl-names = "default"; 132 pinctrl-0 = <&pinctrl_codec>; 133 #sound-dai-cells = <0>; 134 }; 135 136 rtc: rtc@68 { 137 compatible = "dallas,ds1338"; 138 reg = <0x68>; 139 }; 140}; 141 142&iomuxc { 143 pinctrl_audmux: audmuxgrp { 144 fsl,pins = < 145 MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 0x1e4 146 MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 0x1e4 147 MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 0x1e4 148 MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 0x1e4 149 >; 150 }; 151 152 pinctrl_can1: can1grp { 153 fsl,pins = < 154 MX53_PAD_PATA_INTRQ__CAN1_TXCAN 0x1e4 155 MX53_PAD_PATA_DIOR__CAN1_RXCAN 0x1e4 156 >; 157 }; 158 159 pinctrl_codec: codecgrp { 160 fsl,pins = < 161 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4 162 >; 163 }; 164 165 pinctrl_ecspi1: ecspi1grp { 166 fsl,pins = < 167 MX53_PAD_EIM_D16__ECSPI1_SCLK 0x1e4 168 MX53_PAD_EIM_D17__ECSPI1_MISO 0x1e4 169 MX53_PAD_EIM_D18__ECSPI1_MOSI 0x1e4 170 >; 171 }; 172 173 pinctrl_ecspi2: ecspi2grp { 174 fsl,pins = < 175 MX53_PAD_CSI0_DAT9__ECSPI2_MOSI 0x1e4 176 MX53_PAD_CSI0_DAT10__ECSPI2_MISO 0x1e4 177 MX53_PAD_EIM_CS0__ECSPI2_SCLK 0x1e4 178 >; 179 }; 180 181 pinctrl_esdhc1: esdhc1grp { 182 fsl,pins = < 183 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 184 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 185 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 186 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 187 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 188 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 189 MX53_PAD_EIM_DA14__GPIO3_14 0x1f0 190 >; 191 }; 192 193 pinctrl_fec: fecgrp { 194 fsl,pins = < 195 MX53_PAD_FEC_MDC__FEC_MDC 0x1e4 196 MX53_PAD_FEC_MDIO__FEC_MDIO 0x1e4 197 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x1e4 198 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x1e4 199 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x1e4 200 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x1e4 201 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x1e4 202 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x1c4 203 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x1e4 204 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x1e4 205 MX53_PAD_GPIO_1__GPIO1_1 0x1c4 206 >; 207 }; 208 209 pinctrl_i2c1: i2c1grp { 210 fsl,pins = < 211 MX53_PAD_EIM_D21__I2C1_SCL 0x400001e4 212 MX53_PAD_EIM_D28__I2C1_SDA 0x400001e4 213 >; 214 }; 215 216 pinctrl_i2c2: i2c2grp { 217 fsl,pins = < 218 MX53_PAD_KEY_ROW3__I2C2_SDA 0x400001e4 219 MX53_PAD_EIM_EB2__I2C2_SCL 0x400001e4 220 >; 221 }; 222 223 pinctrl_i2c2_gpio: i2c2gpiogrp { 224 fsl,pins = < 225 MX53_PAD_KEY_ROW3__GPIO4_13 0x1e4 226 MX53_PAD_EIM_EB2__GPIO2_30 0x1e4 227 >; 228 }; 229 230 pinctrl_nand: nandgrp { 231 fsl,pins = < 232 MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4 233 MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4 234 MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4 235 MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4 236 MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0 237 MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0 238 MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4 239 MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1 0x4 240 MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2 0x4 241 MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3 0x4 242 MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0xa4 243 MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0xa4 244 MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0xa4 245 MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0xa4 246 MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0xa4 247 MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0xa4 248 MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0xa4 249 MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 0xa4 250 >; 251 }; 252 253 pinctrl_pwm1: pwm1grp { 254 fsl,pins = < 255 MX53_PAD_GPIO_9__PWM1_PWMO 0x5 256 >; 257 }; 258 259 pinctrl_uart1: uart1grp { 260 fsl,pins = < 261 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4 262 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4 263 >; 264 }; 265 266 pinctrl_uart3: uart3grp { 267 fsl,pins = < 268 MX53_PAD_EIM_D24__UART3_TXD_MUX 0x1e4 269 MX53_PAD_EIM_D25__UART3_RXD_MUX 0x1e4 270 >; 271 }; 272 273 pinctrl_uart4: uart4grp { 274 fsl,pins = < 275 MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1e4 276 MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1e4 277 >; 278 }; 279}; 280 281&nfc { 282 pinctrl-names = "default"; 283 pinctrl-0 = <&pinctrl_nand>; 284 nand-bus-width = <8>; 285 status = "okay"; 286 287 partitions { 288 compatible = "fixed-partitions"; 289 #address-cells = <1>; 290 #size-cells = <1>; 291 292 partition@0 { 293 label = "boot"; 294 reg = <0x00000000 0x00100000>; 295 read-only; 296 }; 297 298 partition@100000 { 299 label = "u-boot"; 300 reg = <0x00100000 0x00100000>; 301 read-only; 302 }; 303 304 partition@200000 { 305 label = "u-boot-env"; 306 reg = <0x00200000 0x00100000>; 307 read-only; 308 }; 309 310 partition@1000000 { 311 label = "kernel-safe"; 312 reg = <0x01000000 0x00a00000>; 313 read-only; 314 }; 315 316 partition@1a00000 { 317 label = "kernel"; 318 reg = <0x01a00000 0x005e0000>; 319 }; 320 321 partition@2000000 { 322 label = "ubifs"; 323 reg = <0x02000000 0x0e000000>; 324 }; 325 }; 326}; 327 328&pwm1 { 329 pinctrl-names = "default"; 330 pinctrl-0 = <&pinctrl_pwm1>; 331 status = "okay"; 332}; 333 334&sata { 335 status = "okay"; 336}; 337 338&uart1 { 339 pinctrl-names = "default"; 340 pinctrl-0 = <&pinctrl_uart1>; 341 status = "okay"; 342}; 343 344&uart3 { 345 pinctrl-names = "default"; 346 pinctrl-0 = <&pinctrl_uart3>; 347 status = "okay"; 348}; 349 350&uart4 { 351 pinctrl-names = "default"; 352 pinctrl-0 = <&pinctrl_uart4>; 353 status = "okay"; 354}; 355 356&usbh1 { 357 vbus-supply = <®_usb1_vbus>; 358 phy_type = "utmi"; 359 disable-over-current; 360 status = "okay"; 361}; 362 363&usbotg { 364 dr_mode = "peripheral"; 365 disable-over-current; 366 status = "okay"; 367}; 368