xref: /freebsd/sys/contrib/device-tree/src/arm/nxp/imx/imx51-zii-scu3-esb.dts (revision aa1a8ff2d6dbc51ef058f46f3db5a8bb77967145)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2
3/*
4 * Copyright (C) 2018 Zodiac Inflight Innovations
5 */
6
7/dts-v1/;
8
9#include "imx51.dtsi"
10
11/ {
12	model = "ZII SCU3 ESB board";
13	compatible = "zii,imx51-scu3-esb", "fsl,imx51";
14
15	chosen {
16		stdout-path = &uart1;
17	};
18
19	/* Will be filled by the bootloader */
20	memory@90000000 {
21		device_type = "memory";
22		reg = <0x90000000 0>;
23	};
24
25	usb_vbus: regulator-usb-vbus {
26		compatible = "regulator-fixed";
27		regulator-name = "usb_vbus";
28		regulator-min-microvolt = <5000000>;
29		regulator-max-microvolt = <5000000>;
30
31		pinctrl-names = "default";
32		pinctrl-0 = <&pinctrl_usb_mmc_reset>;
33		gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
34		startup-delay-us = <150000>;
35	};
36};
37
38&cpu {
39	cpu-supply = <&sw1_reg>;
40};
41
42&ecspi1 {
43	pinctrl-names = "default";
44	pinctrl-0 = <&pinctrl_ecspi1>;
45	cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
46		   <&gpio4 25 GPIO_ACTIVE_LOW>;
47	status = "okay";
48
49	pmic@0 {
50		compatible = "fsl,mc13892";
51		pinctrl-names = "default";
52		pinctrl-0 = <&pinctrl_pmic>;
53		spi-max-frequency = <6000000>;
54		spi-cs-high;
55		reg = <0>;
56		interrupt-parent = <&gpio1>;
57		interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
58		fsl,mc13xxx-uses-adc;
59
60		regulators {
61			sw1_reg: sw1 {
62				regulator-min-microvolt = <600000>;
63				regulator-max-microvolt = <1375000>;
64				regulator-boot-on;
65				regulator-always-on;
66			};
67
68			sw2_reg: sw2 {
69				regulator-min-microvolt = <900000>;
70				regulator-max-microvolt = <1850000>;
71				regulator-boot-on;
72				regulator-always-on;
73			};
74
75			sw3_reg: sw3 {
76				regulator-min-microvolt = <1100000>;
77				regulator-max-microvolt = <1850000>;
78				regulator-boot-on;
79				regulator-always-on;
80			};
81
82			sw4_reg: sw4 {
83				regulator-min-microvolt = <1100000>;
84				regulator-max-microvolt = <1850000>;
85				regulator-boot-on;
86				regulator-always-on;
87			};
88
89			vpll_reg: vpll {
90				regulator-min-microvolt = <1050000>;
91				regulator-max-microvolt = <1800000>;
92				regulator-boot-on;
93				regulator-always-on;
94			};
95
96			vdig_reg: vdig {
97				regulator-min-microvolt = <1650000>;
98				regulator-max-microvolt = <1650000>;
99				regulator-boot-on;
100			};
101
102			vsd_reg: vsd {
103				regulator-min-microvolt = <1800000>;
104				regulator-max-microvolt = <3150000>;
105			};
106
107			vusb_reg: vusb {
108				regulator-always-on;
109			};
110
111			vusb2_reg: vusb2 {
112				regulator-min-microvolt = <2400000>;
113				regulator-max-microvolt = <2775000>;
114				regulator-boot-on;
115				regulator-always-on;
116			};
117
118			vvideo_reg: vvideo {
119				regulator-min-microvolt = <2775000>;
120				regulator-max-microvolt = <2775000>;
121			};
122
123			vaudio_reg: vaudio {
124				regulator-min-microvolt = <2300000>;
125				regulator-max-microvolt = <3000000>;
126			};
127
128			vcam_reg: vcam {
129				regulator-min-microvolt = <2500000>;
130				regulator-max-microvolt = <3000000>;
131			};
132
133			vgen1_reg: vgen1 {
134				regulator-min-microvolt = <1200000>;
135				regulator-max-microvolt = <1200000>;
136			};
137
138			vgen2_reg: vgen2 {
139				regulator-min-microvolt = <1200000>;
140				regulator-max-microvolt = <3150000>;
141				regulator-always-on;
142			};
143
144			vgen3_reg: vgen3 {
145				regulator-min-microvolt = <1800000>;
146				regulator-max-microvolt = <2900000>;
147				regulator-always-on;
148			};
149		};
150
151		leds {
152			#address-cells = <1>;
153			#size-cells = <0>;
154			led-control = <0x0 0x0 0x3f83f8 0x0>;
155
156			sysled3: led3@3 {
157				reg = <3>;
158				label = "system:red:power";
159				linux,default-trigger = "default-on";
160			};
161
162			sysled4: led4@4 {
163				reg = <4>;
164				label = "system:green:act";
165				linux,default-trigger = "heartbeat";
166			};
167		};
168	};
169
170	flash@1 {
171		#address-cells = <1>;
172		#size-cells = <1>;
173		compatible = "atmel,at45", "atmel,dataflash";
174		spi-max-frequency = <25000000>;
175		reg = <1>;
176	};
177};
178
179&esdhc1 {
180	pinctrl-names = "default";
181	pinctrl-0 = <&pinctrl_esdhc1>;
182	bus-width = <8>;
183	non-removable;
184	no-1-8-v;
185	no-sdio;
186	no-sd;
187	status = "okay";
188};
189
190&esdhc4 {
191	pinctrl-names = "default";
192	pinctrl-0 = <&pinctrl_esdhc4>;
193	bus-width = <4>;
194	no-1-8-v;
195	no-sdio;
196	cd-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
197	status = "okay";
198};
199
200&fec {
201	pinctrl-names = "default";
202	pinctrl-0 = <&pinctrl_fec>;
203	phy-mode = "mii";
204	status = "okay";
205
206	fixed-link {
207		speed = <100>;
208		full-duplex;
209	};
210
211	fec_mdio: mdio {
212		#address-cells = <1>;
213		#size-cells = <0>;
214		status = "okay";
215
216		switch@0 {
217			compatible = "marvell,mv88e6085";
218			reg = <0>;
219			dsa,member = <0 0>;
220			eeprom-length = <512>;
221			interrupt-parent = <&gpio4>;
222			interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
223			interrupt-controller;
224			#interrupt-cells = <2>;
225			pinctrl-names = "default";
226			pinctrl-0 = <&pinctrl_switch>;
227
228			ports {
229				#address-cells = <1>;
230				#size-cells = <0>;
231
232				port@0 {
233					reg = <0>;
234					label = "port1";
235				};
236
237				port@1 {
238					reg = <1>;
239					label = "port2";
240				};
241
242				port@2 {
243					reg = <2>;
244					label = "port3";
245				};
246
247				port@3 {
248					reg = <3>;
249					label = "scu2scu";
250				};
251
252				port@4 {
253					reg = <4>;
254					label = "esb2host";
255				};
256
257				port@5 {
258					reg = <5>;
259					label = "esb2mezz";
260					phy-mode = "sgmii";
261
262					fixed-link {
263						speed = <1000>;
264						full-duplex;
265					};
266				};
267
268				port@6 {
269					reg = <6>;
270					phy-mode = "mii";
271					ethernet = <&fec>;
272
273					fixed-link {
274						speed = <100>;
275						full-duplex;
276					};
277				};
278			};
279		};
280	};
281};
282
283&ipu {
284	status = "disabled";
285};
286
287&i2c2 {
288	pinctrl-names = "default";
289	pinctrl-0 = <&pinctrl_i2c2>;
290	status = "okay";
291
292	eeprom@50 {
293		compatible = "atmel,24c04";
294		pagesize = <16>;
295		reg = <0x50>;
296	};
297
298	lm75@48 {
299		compatible = "national,lm75";
300		reg = <0x48>;
301	};
302};
303
304&uart1 {
305	pinctrl-names = "default";
306	pinctrl-0 = <&pinctrl_uart1>;
307	status = "okay";
308};
309
310&uart2 {
311	pinctrl-names = "default";
312	pinctrl-0 = <&pinctrl_uart2>;
313	status = "okay";
314};
315
316&uart3 {
317	pinctrl-names = "default";
318	pinctrl-0 = <&pinctrl_uart3>;
319	status = "okay";
320
321	mcu {
322		compatible = "zii,rave-sp-esb";
323		current-speed = <57600>;
324		#address-cells = <1>;
325		#size-cells = <1>;
326
327		watchdog {
328			compatible = "zii,rave-sp-watchdog-legacy";
329		};
330
331		eeprom@a4 {
332			compatible = "zii,rave-sp-eeprom";
333			reg = <0xa4 0x4000>;
334			#address-cells = <1>;
335			#size-cells = <1>;
336			zii,eeprom-name = "main-eeprom";
337		};
338	};
339};
340
341&usbotg {
342	dr_mode = "host";
343	disable-over-current;
344	phy_type = "utmi_wide";
345	vbus-supply = <&usb_vbus>;
346	status = "okay";
347};
348
349&usbphy0 {
350	vcc-supply = <&vusb2_reg>;
351};
352
353&vpu {
354	status = "disabled";
355};
356
357&wdog1 {
358	status = "disabled";
359};
360
361&iomuxc {
362	pinctrl_ecspi1: ecspi1grp {
363		fsl,pins = <
364			MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185
365			MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185
366			MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185
367			MX51_PAD_CSPI1_SS0__GPIO4_24		0x85
368			MX51_PAD_CSPI1_SS1__GPIO4_25		0x85
369		>;
370	};
371
372	pinctrl_esdhc1: esdhc1grp {
373		fsl,pins = <
374			MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5
375			MX51_PAD_SD1_CLK__SD1_CLK		0x20d5
376			MX51_PAD_SD1_DATA0__SD1_DATA0		0x20d5
377			MX51_PAD_SD1_DATA1__SD1_DATA1		0x20d5
378			MX51_PAD_SD1_DATA2__SD1_DATA2		0x20d5
379			MX51_PAD_SD1_DATA3__SD1_DATA3		0x20d5
380			MX51_PAD_SD2_DATA0__SD1_DAT4		0x20d5
381			MX51_PAD_SD2_DATA1__SD1_DAT5		0x20d5
382			MX51_PAD_SD2_DATA2__SD1_DAT6		0x20d5
383			MX51_PAD_SD2_DATA3__SD1_DAT7		0x20d5
384		>;
385	};
386
387	pinctrl_esdhc4: esdhc4grp {
388		fsl,pins = <
389			MX51_PAD_NANDF_RB1__SD4_CMD		0x400020d5
390			MX51_PAD_NANDF_CS2__SD4_CLK		0x20d5
391			MX51_PAD_NANDF_CS3__SD4_DAT0		0x20d5
392			MX51_PAD_NANDF_CS4__SD4_DAT1		0x20d5
393			MX51_PAD_NANDF_CS5__SD4_DAT2		0x20d5
394			MX51_PAD_NANDF_CS6__SD4_DAT3		0x20d5
395			MX51_PAD_NANDF_D0__GPIO4_8		0x100
396		>;
397	};
398
399	pinctrl_fec: fecgrp {
400		fsl,pins = <
401			MX51_PAD_DISP2_DAT15__FEC_TDATA0	0x2004
402			MX51_PAD_DISP2_DAT6__FEC_TDATA1		0x2004
403			MX51_PAD_DISP2_DAT7__FEC_TDATA2		0x2004
404			MX51_PAD_DISP2_DAT8__FEC_TDATA3		0x2004
405			MX51_PAD_DISP2_DAT9__FEC_TX_EN		0x2004
406			MX51_PAD_DISP2_DAT10__FEC_COL		0x0180
407			MX51_PAD_DISP2_DAT11__FEC_RX_CLK	0x0180
408			MX51_PAD_DISP2_DAT12__FEC_RX_DV		0x20a4
409
410			MX51_PAD_DISP2_DAT13__FEC_TX_CLK	0x2180
411			MX51_PAD_DISP2_DAT14__FEC_RDATA0	0x2180
412			MX51_PAD_DI2_DISP_CLK__FEC_RDATA1	0x0085
413			MX51_PAD_DI_GP4__FEC_RDATA2		0x0085
414			MX51_PAD_DISP2_DAT0__FEC_RDATA3		0x0085
415			MX51_PAD_DI2_PIN2__FEC_MDC		0x2004
416			MX51_PAD_DI2_PIN3__FEC_MDIO		0x01f5
417			MX51_PAD_DI2_PIN4__FEC_CRS		0x0180
418		>;
419	};
420
421	pinctrl_i2c2: i2c2grp {
422		fsl,pins = <
423			MX51_PAD_KEY_COL4__I2C2_SCL		0x400001ed
424			MX51_PAD_KEY_COL5__I2C2_SDA		0x400001ed
425		>;
426	};
427
428	pinctrl_pmic: pmicgrp {
429		fsl,pins = <
430			MX51_PAD_GPIO1_4__GPIO1_4		0x85
431			MX51_PAD_GPIO1_8__GPIO1_8		0xe5
432		>;
433	};
434
435	pinctrl_switch: switchgrp {
436		fsl,pins = <
437			MX51_PAD_AUD3_BB_CK__GPIO4_20		0xc5
438		>;
439	};
440
441	pinctrl_uart1: uart1grp {
442		fsl,pins = <
443			MX51_PAD_UART1_RXD__UART1_RXD		0x1c5
444			MX51_PAD_UART1_TXD__UART1_TXD		0x1c5
445			MX51_PAD_UART1_RTS__UART1_RTS		0x1c5
446			MX51_PAD_UART1_CTS__UART1_CTS		0x1c5
447		>;
448	};
449
450	pinctrl_uart2: uart2grp {
451		fsl,pins = <
452			MX51_PAD_UART2_RXD__UART2_RXD		0x1c5
453			MX51_PAD_UART2_TXD__UART2_TXD		0x1c5
454			MX51_PAD_USBH1_DATA0__UART2_CTS		0x1c5
455			MX51_PAD_USBH1_DATA3__UART2_RTS		0x1c5
456		>;
457	};
458
459	pinctrl_uart3: uart3grp {
460		fsl,pins = <
461			MX51_PAD_UART3_RXD__UART3_RXD		0x1c5
462			MX51_PAD_UART3_TXD__UART3_TXD		0x1c5
463		>;
464	};
465
466	pinctrl_usb_mmc_reset: usbmmcgrp {
467		fsl,pins = <
468			MX51_PAD_AUD3_BB_RXD__GPIO4_19		0x100
469		>;
470	};
471};
472