1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com> 4 */ 5 6/dts-v1/; 7#include "imx51-eukrea-cpuimx51.dtsi" 8#include <dt-bindings/gpio/gpio.h> 9 10/ { 11 model = "Eukrea CPUIMX51"; 12 compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51"; 13 14 clocks { 15 clk24M: can_clock { 16 compatible = "fixed-clock"; 17 #clock-cells = <0>; 18 clock-frequency = <24000000>; 19 }; 20 }; 21 22 gpio_keys { 23 compatible = "gpio-keys"; 24 pinctrl-names = "default"; 25 pinctrl-0 = <&pinctrl_gpiokeys_1>; 26 27 button-1 { 28 label = "BP1"; 29 gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; 30 linux,code = <256>; 31 wakeup-source; 32 linux,input-type = <1>; 33 }; 34 }; 35 36 leds { 37 compatible = "gpio-leds"; 38 pinctrl-names = "default"; 39 pinctrl-0 = <&pinctrl_gpioled>; 40 41 led1 { 42 label = "led1"; 43 gpios = <&gpio3 30 GPIO_ACTIVE_LOW>; 44 linux,default-trigger = "heartbeat"; 45 }; 46 }; 47 48 regulators { 49 compatible = "simple-bus"; 50 #address-cells = <1>; 51 #size-cells = <0>; 52 53 reg_can: regulator@0 { 54 compatible = "regulator-fixed"; 55 reg = <0>; 56 regulator-name = "CAN_RST"; 57 regulator-min-microvolt = <3300000>; 58 regulator-max-microvolt = <3300000>; 59 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; 60 startup-delay-us = <20000>; 61 enable-active-high; 62 }; 63 }; 64 65 sound { 66 compatible = "eukrea,asoc-tlv320"; 67 eukrea,model = "imx51-eukrea-tlv320aic23"; 68 ssi-controller = <&ssi2>; 69 fsl,mux-int-port = <2>; 70 fsl,mux-ext-port = <3>; 71 }; 72 73 usbphy1: usbphy1 { 74 compatible = "usb-nop-xceiv"; 75 clocks = <&clks IMX5_CLK_USB_PHY_GATE>; 76 clock-names = "main_clk"; 77 clock-frequency = <19200000>; 78 #phy-cells = <0>; 79 }; 80}; 81 82&audmux { 83 pinctrl-names = "default"; 84 pinctrl-0 = <&pinctrl_audmux>; 85 status = "okay"; 86}; 87 88&esdhc1 { 89 pinctrl-names = "default"; 90 pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>; 91 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; 92 status = "okay"; 93}; 94 95&ecspi1 { 96 pinctrl-names = "default"; 97 pinctrl-0 = <&pinctrl_ecspi1>; 98 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; 99 status = "okay"; 100 101 can0: can@0 { 102 pinctrl-names = "default"; 103 pinctrl-0 = <&pinctrl_can>; 104 compatible = "microchip,mcp2515"; 105 reg = <0>; 106 clocks = <&clk24M>; 107 spi-max-frequency = <10000000>; 108 interrupt-parent = <&gpio1>; 109 interrupts = <1 IRQ_TYPE_EDGE_FALLING>; 110 vdd-supply = <®_can>; 111 }; 112}; 113 114&i2c1 { 115 tlv320aic23: codec@1a { 116 compatible = "ti,tlv320aic23"; 117 reg = <0x1a>; 118 }; 119}; 120 121&iomuxc { 122 imx51-eukrea { 123 pinctrl_audmux: audmuxgrp { 124 fsl,pins = < 125 MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000 126 MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x80000000 127 MX51_PAD_AUD3_BB_CK__AUD3_TXC 0x80000000 128 MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000 129 >; 130 }; 131 132 133 pinctrl_can: cangrp { 134 fsl,pins = < 135 MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x80000000 /* nReset */ 136 MX51_PAD_GPIO1_1__GPIO1_1 0x80000000 /* IRQ */ 137 >; 138 }; 139 140 pinctrl_ecspi1: ecspi1grp { 141 fsl,pins = < 142 MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185 143 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185 144 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185 145 MX51_PAD_CSPI1_SS0__GPIO4_24 0x80000000 /* CS0 */ 146 >; 147 }; 148 149 pinctrl_esdhc1: esdhc1grp { 150 fsl,pins = < 151 MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5 152 MX51_PAD_SD1_CLK__SD1_CLK 0x20d5 153 MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5 154 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5 155 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5 156 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5 157 >; 158 }; 159 160 pinctrl_uart1: uart1grp { 161 fsl,pins = < 162 MX51_PAD_UART1_RXD__UART1_RXD 0x1c5 163 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5 164 >; 165 }; 166 167 pinctrl_uart3: uart3grp { 168 fsl,pins = < 169 MX51_PAD_UART3_RXD__UART3_RXD 0x1c5 170 MX51_PAD_UART3_TXD__UART3_TXD 0x1c5 171 >; 172 }; 173 174 pinctrl_uart3_rtscts: uart3rtsctsgrp { 175 fsl,pins = < 176 MX51_PAD_KEY_COL4__UART3_RTS 0x1c5 177 MX51_PAD_KEY_COL5__UART3_CTS 0x1c5 178 >; 179 }; 180 181 pinctrl_backlight_1: backlightgrp-1 { 182 fsl,pins = < 183 MX51_PAD_DI1_D1_CS__GPIO3_4 0x1f5 184 >; 185 }; 186 187 pinctrl_esdhc1_cd: esdhc1_cd { 188 fsl,pins = < 189 MX51_PAD_GPIO1_0__GPIO1_0 0xd5 190 >; 191 }; 192 193 pinctrl_gpiokeys_1: gpiokeysgrp-1 { 194 fsl,pins = < 195 MX51_PAD_NANDF_D9__GPIO3_31 0x1f5 196 >; 197 }; 198 199 pinctrl_gpioled: gpioledgrp-1 { 200 fsl,pins = < 201 MX51_PAD_NANDF_D10__GPIO3_30 0x80000000 202 >; 203 }; 204 205 pinctrl_reg_lcd_3v3: reg_lcd_3v3 { 206 fsl,pins = < 207 MX51_PAD_CSI1_D9__GPIO3_13 0x1f5 208 >; 209 }; 210 211 pinctrl_usbh1: usbh1grp { 212 fsl,pins = < 213 MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5 214 MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5 215 MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5 216 MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5 217 MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5 218 MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5 219 MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5 220 MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5 221 MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5 222 MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5 223 MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5 224 MX51_PAD_USBH1_STP__USBH1_STP 0x1e5 225 >; 226 }; 227 228 pinctrl_usbh1_vbus: usbh1-vbusgrp { 229 fsl,pins = < 230 MX51_PAD_EIM_CS3__GPIO2_28 0x1f5 231 >; 232 }; 233 }; 234}; 235 236&ssi2 { 237 codec-handle = <&tlv320aic23>; 238 status = "okay"; 239}; 240 241&uart1 { 242 pinctrl-names = "default"; 243 pinctrl-0 = <&pinctrl_uart1>; 244 uart-has-rtscts; 245 status = "okay"; 246}; 247 248&uart3 { 249 pinctrl-names = "default"; 250 pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>; 251 uart-has-rtscts; 252 status = "okay"; 253}; 254 255&usbh1 { 256 pinctrl-names = "default"; 257 pinctrl-0 = <&pinctrl_usbh1>; 258 fsl,usbphy = <&usbphy1>; 259 dr_mode = "host"; 260 phy_type = "ulpi"; 261 status = "okay"; 262}; 263 264&usbotg { 265 dr_mode = "otg"; 266 phy_type = "utmi_wide"; 267 status = "okay"; 268}; 269 270&usbphy0 { 271 pinctrl-names = "default"; 272 pinctrl-0 = <&pinctrl_usbh1_vbus>; 273 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; 274}; 275