1*833e5d42SEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2*833e5d42SEmmanuel Vadot/dts-v1/; 3*833e5d42SEmmanuel Vadot 4*833e5d42SEmmanuel Vadot#include <dt-bindings/input/gpio-keys.h> 5*833e5d42SEmmanuel Vadot#include <dt-bindings/input/input.h> 6*833e5d42SEmmanuel Vadot#include <dt-bindings/leds/common.h> 7*833e5d42SEmmanuel Vadot#include <dt-bindings/thermal/thermal.h> 8*833e5d42SEmmanuel Vadot 9*833e5d42SEmmanuel Vadot#include "tegra30.dtsi" 10*833e5d42SEmmanuel Vadot#include "tegra30-cpu-opp.dtsi" 11*833e5d42SEmmanuel Vadot#include "tegra30-cpu-opp-microvolt.dtsi" 12*833e5d42SEmmanuel Vadot 13*833e5d42SEmmanuel Vadot/ { 14*833e5d42SEmmanuel Vadot model = "Asus VivoTab RT TF600T"; 15*833e5d42SEmmanuel Vadot compatible = "asus,tf600t", "nvidia,tegra30"; 16*833e5d42SEmmanuel Vadot chassis-type = "convertible"; 17*833e5d42SEmmanuel Vadot 18*833e5d42SEmmanuel Vadot aliases { 19*833e5d42SEmmanuel Vadot mmc0 = &sdmmc4; /* eMMC */ 20*833e5d42SEmmanuel Vadot mmc1 = &sdmmc1; /* uSD slot */ 21*833e5d42SEmmanuel Vadot mmc2 = &sdmmc3; /* WiFi */ 22*833e5d42SEmmanuel Vadot 23*833e5d42SEmmanuel Vadot rtc0 = &pmic; 24*833e5d42SEmmanuel Vadot rtc1 = "/rtc@7000e000"; 25*833e5d42SEmmanuel Vadot 26*833e5d42SEmmanuel Vadot display1 = &hdmi; 27*833e5d42SEmmanuel Vadot 28*833e5d42SEmmanuel Vadot serial1 = &uartc; /* Bluetooth */ 29*833e5d42SEmmanuel Vadot serial2 = &uartb; /* GPS */ 30*833e5d42SEmmanuel Vadot }; 31*833e5d42SEmmanuel Vadot 32*833e5d42SEmmanuel Vadot /* 33*833e5d42SEmmanuel Vadot * The decompressor and also some bootloaders rely on a 34*833e5d42SEmmanuel Vadot * pre-existing /chosen node to be available to insert the 35*833e5d42SEmmanuel Vadot * command line and merge other ATAGS info. 36*833e5d42SEmmanuel Vadot */ 37*833e5d42SEmmanuel Vadot chosen {}; 38*833e5d42SEmmanuel Vadot 39*833e5d42SEmmanuel Vadot memory@80000000 { 40*833e5d42SEmmanuel Vadot reg = <0x80000000 0x80000000>; 41*833e5d42SEmmanuel Vadot }; 42*833e5d42SEmmanuel Vadot 43*833e5d42SEmmanuel Vadot reserved-memory { 44*833e5d42SEmmanuel Vadot #address-cells = <1>; 45*833e5d42SEmmanuel Vadot #size-cells = <1>; 46*833e5d42SEmmanuel Vadot ranges; 47*833e5d42SEmmanuel Vadot 48*833e5d42SEmmanuel Vadot linux,cma@80000000 { 49*833e5d42SEmmanuel Vadot compatible = "shared-dma-pool"; 50*833e5d42SEmmanuel Vadot alloc-ranges = <0x80000000 0x30000000>; 51*833e5d42SEmmanuel Vadot size = <0x10000000>; /* 256MiB */ 52*833e5d42SEmmanuel Vadot linux,cma-default; 53*833e5d42SEmmanuel Vadot reusable; 54*833e5d42SEmmanuel Vadot }; 55*833e5d42SEmmanuel Vadot }; 56*833e5d42SEmmanuel Vadot 57*833e5d42SEmmanuel Vadot host1x@50000000 { 58*833e5d42SEmmanuel Vadot hdmi: hdmi@54280000 { 59*833e5d42SEmmanuel Vadot status = "okay"; 60*833e5d42SEmmanuel Vadot 61*833e5d42SEmmanuel Vadot hdmi-supply = <&hdmi_5v0_sys>; 62*833e5d42SEmmanuel Vadot pll-supply = <&vdd_1v8_vio>; 63*833e5d42SEmmanuel Vadot vdd-supply = <&vdd_3v3_sys>; 64*833e5d42SEmmanuel Vadot 65*833e5d42SEmmanuel Vadot nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; 66*833e5d42SEmmanuel Vadot nvidia,ddc-i2c-bus = <&hdmi_ddc>; 67*833e5d42SEmmanuel Vadot }; 68*833e5d42SEmmanuel Vadot }; 69*833e5d42SEmmanuel Vadot 70*833e5d42SEmmanuel Vadot vde@6001a000 { 71*833e5d42SEmmanuel Vadot assigned-clocks = <&tegra_car TEGRA30_CLK_VDE>; 72*833e5d42SEmmanuel Vadot assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_P>; 73*833e5d42SEmmanuel Vadot assigned-clock-rates = <408000000>; 74*833e5d42SEmmanuel Vadot }; 75*833e5d42SEmmanuel Vadot 76*833e5d42SEmmanuel Vadot pinmux@70000868 { 77*833e5d42SEmmanuel Vadot pinctrl-names = "default"; 78*833e5d42SEmmanuel Vadot pinctrl-0 = <&state_default>; 79*833e5d42SEmmanuel Vadot 80*833e5d42SEmmanuel Vadot state_default: pinmux { 81*833e5d42SEmmanuel Vadot /* SDMMC1 pinmux */ 82*833e5d42SEmmanuel Vadot sdmmc1-clk { 83*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc1_clk_pz0"; 84*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc1"; 85*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 86*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 87*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 88*833e5d42SEmmanuel Vadot }; 89*833e5d42SEmmanuel Vadot sdmmc1-cmd { 90*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc1_dat3_py4", 91*833e5d42SEmmanuel Vadot "sdmmc1_dat2_py5", 92*833e5d42SEmmanuel Vadot "sdmmc1_dat1_py6", 93*833e5d42SEmmanuel Vadot "sdmmc1_dat0_py7", 94*833e5d42SEmmanuel Vadot "sdmmc1_cmd_pz1"; 95*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc1"; 96*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 97*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 98*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 99*833e5d42SEmmanuel Vadot }; 100*833e5d42SEmmanuel Vadot sdmmc1-cd { 101*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_iordy_pi5"; 102*833e5d42SEmmanuel Vadot nvidia,function = "rsvd1"; 103*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 104*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 105*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 106*833e5d42SEmmanuel Vadot }; 107*833e5d42SEmmanuel Vadot sdmmc1-wp { 108*833e5d42SEmmanuel Vadot nvidia,pins = "vi_d11_pt3"; 109*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 110*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 111*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 112*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 113*833e5d42SEmmanuel Vadot }; 114*833e5d42SEmmanuel Vadot 115*833e5d42SEmmanuel Vadot /* SDMMC2 pinmux */ 116*833e5d42SEmmanuel Vadot vi-d1-pd5 { 117*833e5d42SEmmanuel Vadot nvidia,pins = "vi_d1_pd5", 118*833e5d42SEmmanuel Vadot "vi_d2_pl0", 119*833e5d42SEmmanuel Vadot "vi_d3_pl1", 120*833e5d42SEmmanuel Vadot "vi_d5_pl3", 121*833e5d42SEmmanuel Vadot "vi_d7_pl5"; 122*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc2"; 123*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 124*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 125*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 126*833e5d42SEmmanuel Vadot }; 127*833e5d42SEmmanuel Vadot vi-d8-pl6 { 128*833e5d42SEmmanuel Vadot nvidia,pins = "vi_d8_pl6", 129*833e5d42SEmmanuel Vadot "vi_d9_pl7"; 130*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc2"; 131*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 132*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 133*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 134*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 135*833e5d42SEmmanuel Vadot nvidia,io-reset = <0>; 136*833e5d42SEmmanuel Vadot }; 137*833e5d42SEmmanuel Vadot 138*833e5d42SEmmanuel Vadot /* SDMMC3 pinmux */ 139*833e5d42SEmmanuel Vadot sdmmc3-clk { 140*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc3_clk_pa6"; 141*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc3"; 142*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 143*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 144*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 145*833e5d42SEmmanuel Vadot }; 146*833e5d42SEmmanuel Vadot sdmmc3-cmd { 147*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc3_cmd_pa7", 148*833e5d42SEmmanuel Vadot "sdmmc3_dat0_pb7", 149*833e5d42SEmmanuel Vadot "sdmmc3_dat1_pb6", 150*833e5d42SEmmanuel Vadot "sdmmc3_dat2_pb5", 151*833e5d42SEmmanuel Vadot "sdmmc3_dat3_pb4", 152*833e5d42SEmmanuel Vadot "sdmmc3_dat4_pd1", 153*833e5d42SEmmanuel Vadot "sdmmc3_dat5_pd0", 154*833e5d42SEmmanuel Vadot "sdmmc3_dat6_pd3", 155*833e5d42SEmmanuel Vadot "sdmmc3_dat7_pd4"; 156*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc3"; 157*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 158*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 159*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 160*833e5d42SEmmanuel Vadot }; 161*833e5d42SEmmanuel Vadot 162*833e5d42SEmmanuel Vadot /* SDMMC4 pinmux */ 163*833e5d42SEmmanuel Vadot sdmmc4-clk { 164*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc4_clk_pcc4"; 165*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc4"; 166*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 167*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 168*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 169*833e5d42SEmmanuel Vadot }; 170*833e5d42SEmmanuel Vadot sdmmc4-cmd { 171*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc4_cmd_pt7", 172*833e5d42SEmmanuel Vadot "sdmmc4_dat0_paa0", 173*833e5d42SEmmanuel Vadot "sdmmc4_dat1_paa1", 174*833e5d42SEmmanuel Vadot "sdmmc4_dat2_paa2", 175*833e5d42SEmmanuel Vadot "sdmmc4_dat3_paa3", 176*833e5d42SEmmanuel Vadot "sdmmc4_dat4_paa4", 177*833e5d42SEmmanuel Vadot "sdmmc4_dat5_paa5", 178*833e5d42SEmmanuel Vadot "sdmmc4_dat6_paa6", 179*833e5d42SEmmanuel Vadot "sdmmc4_dat7_paa7"; 180*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc4"; 181*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 182*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 183*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 184*833e5d42SEmmanuel Vadot }; 185*833e5d42SEmmanuel Vadot sdmmc4-rst-n { 186*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc4_rst_n_pcc3"; 187*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 188*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 189*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 190*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 191*833e5d42SEmmanuel Vadot }; 192*833e5d42SEmmanuel Vadot cam-mclk { 193*833e5d42SEmmanuel Vadot nvidia,pins = "cam_mclk_pcc0"; 194*833e5d42SEmmanuel Vadot nvidia,function = "vi_alt3"; 195*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 196*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 197*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 198*833e5d42SEmmanuel Vadot }; 199*833e5d42SEmmanuel Vadot 200*833e5d42SEmmanuel Vadot /* I2C pinmux */ 201*833e5d42SEmmanuel Vadot gen1-i2c { 202*833e5d42SEmmanuel Vadot nvidia,pins = "gen1_i2c_scl_pc4", 203*833e5d42SEmmanuel Vadot "gen1_i2c_sda_pc5"; 204*833e5d42SEmmanuel Vadot nvidia,function = "i2c1"; 205*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 206*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 207*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 208*833e5d42SEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_ENABLE>; 209*833e5d42SEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 210*833e5d42SEmmanuel Vadot }; 211*833e5d42SEmmanuel Vadot gen2-i2c { 212*833e5d42SEmmanuel Vadot nvidia,pins = "gen2_i2c_scl_pt5", 213*833e5d42SEmmanuel Vadot "gen2_i2c_sda_pt6"; 214*833e5d42SEmmanuel Vadot nvidia,function = "i2c2"; 215*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 216*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 217*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 218*833e5d42SEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_ENABLE>; 219*833e5d42SEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 220*833e5d42SEmmanuel Vadot }; 221*833e5d42SEmmanuel Vadot cam-i2c { 222*833e5d42SEmmanuel Vadot nvidia,pins = "cam_i2c_scl_pbb1", 223*833e5d42SEmmanuel Vadot "cam_i2c_sda_pbb2"; 224*833e5d42SEmmanuel Vadot nvidia,function = "i2c3"; 225*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 226*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 227*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 228*833e5d42SEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_ENABLE>; 229*833e5d42SEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 230*833e5d42SEmmanuel Vadot }; 231*833e5d42SEmmanuel Vadot ddc-i2c { 232*833e5d42SEmmanuel Vadot nvidia,pins = "ddc_scl_pv4", 233*833e5d42SEmmanuel Vadot "ddc_sda_pv5"; 234*833e5d42SEmmanuel Vadot nvidia,function = "i2c4"; 235*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 236*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 237*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 238*833e5d42SEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 239*833e5d42SEmmanuel Vadot }; 240*833e5d42SEmmanuel Vadot pwr-i2c { 241*833e5d42SEmmanuel Vadot nvidia,pins = "pwr_i2c_scl_pz6", 242*833e5d42SEmmanuel Vadot "pwr_i2c_sda_pz7"; 243*833e5d42SEmmanuel Vadot nvidia,function = "i2cpwr"; 244*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 245*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 246*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 247*833e5d42SEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_ENABLE>; 248*833e5d42SEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 249*833e5d42SEmmanuel Vadot }; 250*833e5d42SEmmanuel Vadot hotplug-i2c { 251*833e5d42SEmmanuel Vadot nvidia,pins = "pu4"; 252*833e5d42SEmmanuel Vadot nvidia,function = "rsvd4"; 253*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 254*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 255*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 256*833e5d42SEmmanuel Vadot }; 257*833e5d42SEmmanuel Vadot 258*833e5d42SEmmanuel Vadot /* HDMI pinmux */ 259*833e5d42SEmmanuel Vadot hdmi-cec { 260*833e5d42SEmmanuel Vadot nvidia,pins = "hdmi_cec_pee3"; 261*833e5d42SEmmanuel Vadot nvidia,function = "cec"; 262*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 263*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 264*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 265*833e5d42SEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_ENABLE>; 266*833e5d42SEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 267*833e5d42SEmmanuel Vadot }; 268*833e5d42SEmmanuel Vadot hdmi-hpd { 269*833e5d42SEmmanuel Vadot nvidia,pins = "hdmi_int_pn7"; 270*833e5d42SEmmanuel Vadot nvidia,function = "hdmi"; 271*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 272*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 273*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 274*833e5d42SEmmanuel Vadot }; 275*833e5d42SEmmanuel Vadot 276*833e5d42SEmmanuel Vadot /* UART-A */ 277*833e5d42SEmmanuel Vadot ulpi-data0-po1 { 278*833e5d42SEmmanuel Vadot nvidia,pins = "ulpi_data0_po1"; 279*833e5d42SEmmanuel Vadot nvidia,function = "uarta"; 280*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 281*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 282*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 283*833e5d42SEmmanuel Vadot }; 284*833e5d42SEmmanuel Vadot ulpi-data1-po2 { 285*833e5d42SEmmanuel Vadot nvidia,pins = "ulpi_data1_po2"; 286*833e5d42SEmmanuel Vadot nvidia,function = "uarta"; 287*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 288*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 289*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 290*833e5d42SEmmanuel Vadot }; 291*833e5d42SEmmanuel Vadot ulpi-data5-po6 { 292*833e5d42SEmmanuel Vadot nvidia,pins = "ulpi_data5_po6"; 293*833e5d42SEmmanuel Vadot nvidia,function = "uarta"; 294*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 295*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 296*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 297*833e5d42SEmmanuel Vadot }; 298*833e5d42SEmmanuel Vadot ulpi-data7-po0 { 299*833e5d42SEmmanuel Vadot nvidia,pins = "ulpi_data7_po0", 300*833e5d42SEmmanuel Vadot "ulpi_data2_po3", 301*833e5d42SEmmanuel Vadot "ulpi_data3_po4", 302*833e5d42SEmmanuel Vadot "ulpi_data4_po5", 303*833e5d42SEmmanuel Vadot "ulpi_data6_po7"; 304*833e5d42SEmmanuel Vadot nvidia,function = "uarta"; 305*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 306*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 307*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 308*833e5d42SEmmanuel Vadot }; 309*833e5d42SEmmanuel Vadot 310*833e5d42SEmmanuel Vadot /* UART-B */ 311*833e5d42SEmmanuel Vadot uartb-txd-rts { 312*833e5d42SEmmanuel Vadot nvidia,pins = "uart2_txd_pc2", 313*833e5d42SEmmanuel Vadot "uart2_rts_n_pj6"; 314*833e5d42SEmmanuel Vadot nvidia,function = "uartb"; 315*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 316*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 317*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 318*833e5d42SEmmanuel Vadot }; 319*833e5d42SEmmanuel Vadot uartb-rxd-cts { 320*833e5d42SEmmanuel Vadot nvidia,pins = "uart2_rxd_pc3", 321*833e5d42SEmmanuel Vadot "uart2_cts_n_pj5"; 322*833e5d42SEmmanuel Vadot nvidia,function = "uartb"; 323*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 324*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 325*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 326*833e5d42SEmmanuel Vadot }; 327*833e5d42SEmmanuel Vadot 328*833e5d42SEmmanuel Vadot /* UART-C */ 329*833e5d42SEmmanuel Vadot uartc-rxd-cts { 330*833e5d42SEmmanuel Vadot nvidia,pins = "uart3_cts_n_pa1", 331*833e5d42SEmmanuel Vadot "uart3_rxd_pw7"; 332*833e5d42SEmmanuel Vadot nvidia,function = "uartc"; 333*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 334*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 335*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 336*833e5d42SEmmanuel Vadot }; 337*833e5d42SEmmanuel Vadot uartc-txd-rts { 338*833e5d42SEmmanuel Vadot nvidia,pins = "uart3_rts_n_pc0", 339*833e5d42SEmmanuel Vadot "uart3_txd_pw6"; 340*833e5d42SEmmanuel Vadot nvidia,function = "uartc"; 341*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 342*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 343*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 344*833e5d42SEmmanuel Vadot }; 345*833e5d42SEmmanuel Vadot 346*833e5d42SEmmanuel Vadot /* UART-D */ 347*833e5d42SEmmanuel Vadot ulpi-nxt-py2 { 348*833e5d42SEmmanuel Vadot nvidia,pins = "ulpi_nxt_py2"; 349*833e5d42SEmmanuel Vadot nvidia,function = "uartd"; 350*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 351*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 352*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 353*833e5d42SEmmanuel Vadot }; 354*833e5d42SEmmanuel Vadot ulpi-clk-py0 { 355*833e5d42SEmmanuel Vadot nvidia,pins = "ulpi_clk_py0", 356*833e5d42SEmmanuel Vadot "ulpi_dir_py1", 357*833e5d42SEmmanuel Vadot "ulpi_stp_py3"; 358*833e5d42SEmmanuel Vadot nvidia,function = "uartd"; 359*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 360*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 361*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 362*833e5d42SEmmanuel Vadot }; 363*833e5d42SEmmanuel Vadot 364*833e5d42SEmmanuel Vadot /* I2S pinmux */ 365*833e5d42SEmmanuel Vadot dap-i2s0 { 366*833e5d42SEmmanuel Vadot nvidia,pins = "dap1_fs_pn0", 367*833e5d42SEmmanuel Vadot "dap1_din_pn1", 368*833e5d42SEmmanuel Vadot "dap1_dout_pn2", 369*833e5d42SEmmanuel Vadot "dap1_sclk_pn3"; 370*833e5d42SEmmanuel Vadot nvidia,function = "i2s0"; 371*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 372*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 373*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 374*833e5d42SEmmanuel Vadot }; 375*833e5d42SEmmanuel Vadot dap-i2s1 { 376*833e5d42SEmmanuel Vadot nvidia,pins = "dap2_fs_pa2", 377*833e5d42SEmmanuel Vadot "dap2_sclk_pa3", 378*833e5d42SEmmanuel Vadot "dap2_din_pa4", 379*833e5d42SEmmanuel Vadot "dap2_dout_pa5"; 380*833e5d42SEmmanuel Vadot nvidia,function = "i2s1"; 381*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 382*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 383*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 384*833e5d42SEmmanuel Vadot }; 385*833e5d42SEmmanuel Vadot dap3-fs { 386*833e5d42SEmmanuel Vadot nvidia,pins = "dap3_fs_pp0"; 387*833e5d42SEmmanuel Vadot nvidia,function = "i2s2"; 388*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 389*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 390*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 391*833e5d42SEmmanuel Vadot }; 392*833e5d42SEmmanuel Vadot dap3-din { 393*833e5d42SEmmanuel Vadot nvidia,pins = "dap3_din_pp1"; 394*833e5d42SEmmanuel Vadot nvidia,function = "i2s2"; 395*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 396*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 397*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 398*833e5d42SEmmanuel Vadot }; 399*833e5d42SEmmanuel Vadot dap3-dout { 400*833e5d42SEmmanuel Vadot nvidia,pins = "dap3_dout_pp2", 401*833e5d42SEmmanuel Vadot "dap3_sclk_pp3"; 402*833e5d42SEmmanuel Vadot nvidia,function = "i2s2"; 403*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 404*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 405*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 406*833e5d42SEmmanuel Vadot }; 407*833e5d42SEmmanuel Vadot dap-i2s3 { 408*833e5d42SEmmanuel Vadot nvidia,pins = "dap4_fs_pp4", 409*833e5d42SEmmanuel Vadot "dap4_din_pp5", 410*833e5d42SEmmanuel Vadot "dap4_dout_pp6", 411*833e5d42SEmmanuel Vadot "dap4_sclk_pp7"; 412*833e5d42SEmmanuel Vadot nvidia,function = "i2s3"; 413*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 414*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 415*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 416*833e5d42SEmmanuel Vadot }; 417*833e5d42SEmmanuel Vadot i2s4 { 418*833e5d42SEmmanuel Vadot nvidia,pins = "pbb7"; 419*833e5d42SEmmanuel Vadot nvidia,function = "i2s4"; 420*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 421*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 422*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 423*833e5d42SEmmanuel Vadot }; 424*833e5d42SEmmanuel Vadot 425*833e5d42SEmmanuel Vadot /* Sensors pinmux */ 426*833e5d42SEmmanuel Vadot nct-irq { 427*833e5d42SEmmanuel Vadot nvidia,pins = "pcc2"; 428*833e5d42SEmmanuel Vadot nvidia,function = "i2s4"; 429*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 430*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 431*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 432*833e5d42SEmmanuel Vadot }; 433*833e5d42SEmmanuel Vadot hall { 434*833e5d42SEmmanuel Vadot nvidia,pins = "pbb6"; 435*833e5d42SEmmanuel Vadot nvidia,function = "vgp6"; 436*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 437*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 438*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 439*833e5d42SEmmanuel Vadot }; 440*833e5d42SEmmanuel Vadot 441*833e5d42SEmmanuel Vadot /* Asus EC pinmux */ 442*833e5d42SEmmanuel Vadot ec-irqs { 443*833e5d42SEmmanuel Vadot nvidia,pins = "kb_row10_ps2", 444*833e5d42SEmmanuel Vadot "kb_row15_ps7"; 445*833e5d42SEmmanuel Vadot nvidia,function = "kbc"; 446*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 447*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 448*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 449*833e5d42SEmmanuel Vadot }; 450*833e5d42SEmmanuel Vadot ec-reqs { 451*833e5d42SEmmanuel Vadot nvidia,pins = "kb_col1_pq1"; 452*833e5d42SEmmanuel Vadot nvidia,function = "kbc"; 453*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 454*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 455*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 456*833e5d42SEmmanuel Vadot }; 457*833e5d42SEmmanuel Vadot 458*833e5d42SEmmanuel Vadot /* Memory type bootstrap */ 459*833e5d42SEmmanuel Vadot mem-boostraps { 460*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad4_pg4", 461*833e5d42SEmmanuel Vadot "gmi_ad5_pg5"; 462*833e5d42SEmmanuel Vadot nvidia,function = "nand"; 463*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 464*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 465*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 466*833e5d42SEmmanuel Vadot }; 467*833e5d42SEmmanuel Vadot 468*833e5d42SEmmanuel Vadot /* PCI-e pinmux */ 469*833e5d42SEmmanuel Vadot pex-l2-rst-n { 470*833e5d42SEmmanuel Vadot nvidia,pins = "pex_l2_rst_n_pcc6", 471*833e5d42SEmmanuel Vadot "pex_l0_rst_n_pdd1", 472*833e5d42SEmmanuel Vadot "pex_l1_rst_n_pdd5"; 473*833e5d42SEmmanuel Vadot nvidia,function = "pcie"; 474*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 475*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 476*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 477*833e5d42SEmmanuel Vadot }; 478*833e5d42SEmmanuel Vadot pex-l2-clkreq-n { 479*833e5d42SEmmanuel Vadot nvidia,pins = "pex_l2_clkreq_n_pcc7", 480*833e5d42SEmmanuel Vadot "pex_l0_prsnt_n_pdd0", 481*833e5d42SEmmanuel Vadot "pex_l0_clkreq_n_pdd2", 482*833e5d42SEmmanuel Vadot "pex_wake_n_pdd3", 483*833e5d42SEmmanuel Vadot "pex_l1_prsnt_n_pdd4", 484*833e5d42SEmmanuel Vadot "pex_l1_clkreq_n_pdd6", 485*833e5d42SEmmanuel Vadot "pex_l2_prsnt_n_pdd7"; 486*833e5d42SEmmanuel Vadot nvidia,function = "pcie"; 487*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 488*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 489*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 490*833e5d42SEmmanuel Vadot }; 491*833e5d42SEmmanuel Vadot 492*833e5d42SEmmanuel Vadot /* Display A pinmux */ 493*833e5d42SEmmanuel Vadot lcd-pwr0-pb2 { 494*833e5d42SEmmanuel Vadot nvidia,pins = "lcd_pwr0_pb2", 495*833e5d42SEmmanuel Vadot "lcd_pclk_pb3", 496*833e5d42SEmmanuel Vadot "lcd_pwr1_pc1", 497*833e5d42SEmmanuel Vadot "lcd_d0_pe0", 498*833e5d42SEmmanuel Vadot "lcd_d1_pe1", 499*833e5d42SEmmanuel Vadot "lcd_d2_pe2", 500*833e5d42SEmmanuel Vadot "lcd_d3_pe3", 501*833e5d42SEmmanuel Vadot "lcd_d4_pe4", 502*833e5d42SEmmanuel Vadot "lcd_d5_pe5", 503*833e5d42SEmmanuel Vadot "lcd_d6_pe6", 504*833e5d42SEmmanuel Vadot "lcd_d7_pe7", 505*833e5d42SEmmanuel Vadot "lcd_d8_pf0", 506*833e5d42SEmmanuel Vadot "lcd_d9_pf1", 507*833e5d42SEmmanuel Vadot "lcd_d10_pf2", 508*833e5d42SEmmanuel Vadot "lcd_d11_pf3", 509*833e5d42SEmmanuel Vadot "lcd_d12_pf4", 510*833e5d42SEmmanuel Vadot "lcd_d13_pf5", 511*833e5d42SEmmanuel Vadot "lcd_d14_pf6", 512*833e5d42SEmmanuel Vadot "lcd_d15_pf7", 513*833e5d42SEmmanuel Vadot "lcd_de_pj1", 514*833e5d42SEmmanuel Vadot "lcd_hsync_pj3", 515*833e5d42SEmmanuel Vadot "lcd_vsync_pj4", 516*833e5d42SEmmanuel Vadot "lcd_d16_pm0", 517*833e5d42SEmmanuel Vadot "lcd_d17_pm1", 518*833e5d42SEmmanuel Vadot "lcd_d18_pm2", 519*833e5d42SEmmanuel Vadot "lcd_d19_pm3", 520*833e5d42SEmmanuel Vadot "lcd_d20_pm4", 521*833e5d42SEmmanuel Vadot "lcd_d21_pm5", 522*833e5d42SEmmanuel Vadot "lcd_d22_pm6", 523*833e5d42SEmmanuel Vadot "lcd_d23_pm7", 524*833e5d42SEmmanuel Vadot "lcd_dc0_pn6", 525*833e5d42SEmmanuel Vadot "lcd_sdin_pz2"; 526*833e5d42SEmmanuel Vadot nvidia,function = "displaya"; 527*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 528*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 529*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 530*833e5d42SEmmanuel Vadot }; 531*833e5d42SEmmanuel Vadot lcd-cs0-n-pn4 { 532*833e5d42SEmmanuel Vadot nvidia,pins = "lcd_sdout_pn5", 533*833e5d42SEmmanuel Vadot "lcd_wr_n_pz3", 534*833e5d42SEmmanuel Vadot "lcd_pwr2_pc6", 535*833e5d42SEmmanuel Vadot "lcd_dc1_pd2"; 536*833e5d42SEmmanuel Vadot nvidia,function = "displaya"; 537*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 538*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 539*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 540*833e5d42SEmmanuel Vadot }; 541*833e5d42SEmmanuel Vadot 542*833e5d42SEmmanuel Vadot blink { 543*833e5d42SEmmanuel Vadot nvidia,pins = "clk_32k_out_pa0"; 544*833e5d42SEmmanuel Vadot nvidia,function = "blink"; 545*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 546*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 547*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 548*833e5d42SEmmanuel Vadot }; 549*833e5d42SEmmanuel Vadot 550*833e5d42SEmmanuel Vadot /* KBC keys */ 551*833e5d42SEmmanuel Vadot kb-col0 { 552*833e5d42SEmmanuel Vadot nvidia,pins = "kb_col0_pq0", 553*833e5d42SEmmanuel Vadot "kb_row1_pr1", 554*833e5d42SEmmanuel Vadot "kb_row3_pr3", 555*833e5d42SEmmanuel Vadot "kb_row7_pr7", 556*833e5d42SEmmanuel Vadot "kb_row8_ps0"; 557*833e5d42SEmmanuel Vadot nvidia,function = "kbc"; 558*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 559*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 560*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 561*833e5d42SEmmanuel Vadot }; 562*833e5d42SEmmanuel Vadot kb-col5 { 563*833e5d42SEmmanuel Vadot nvidia,pins = "kb_col5_pq5", 564*833e5d42SEmmanuel Vadot "kb_col7_pq7", 565*833e5d42SEmmanuel Vadot "kb_row2_pr2", 566*833e5d42SEmmanuel Vadot "kb_row4_pr4", 567*833e5d42SEmmanuel Vadot "kb_row5_pr5", 568*833e5d42SEmmanuel Vadot "kb_row13_ps5"; 569*833e5d42SEmmanuel Vadot nvidia,function = "kbc"; 570*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 571*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 572*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 573*833e5d42SEmmanuel Vadot }; 574*833e5d42SEmmanuel Vadot 575*833e5d42SEmmanuel Vadot gmi-cs0-n-pj0 { 576*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_wp_n_pc7", 577*833e5d42SEmmanuel Vadot "gmi_wait_pi7", 578*833e5d42SEmmanuel Vadot "gmi_cs0_n_pj0", 579*833e5d42SEmmanuel Vadot "gmi_cs1_n_pj2", 580*833e5d42SEmmanuel Vadot "gmi_cs2_n_pk3", 581*833e5d42SEmmanuel Vadot "gmi_cs3_n_pk4"; 582*833e5d42SEmmanuel Vadot nvidia,function = "rsvd1"; 583*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 584*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 585*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 586*833e5d42SEmmanuel Vadot }; 587*833e5d42SEmmanuel Vadot 588*833e5d42SEmmanuel Vadot vi-pclk-pt0 { 589*833e5d42SEmmanuel Vadot nvidia,pins = "vi_pclk_pt0"; 590*833e5d42SEmmanuel Vadot nvidia,function = "rsvd1"; 591*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 592*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 593*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 594*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 595*833e5d42SEmmanuel Vadot nvidia,io-reset = <0>; 596*833e5d42SEmmanuel Vadot }; 597*833e5d42SEmmanuel Vadot 598*833e5d42SEmmanuel Vadot /* GPIO keys pinmux */ 599*833e5d42SEmmanuel Vadot power-key { 600*833e5d42SEmmanuel Vadot nvidia,pins = "pv0"; 601*833e5d42SEmmanuel Vadot nvidia,function = "rsvd1"; 602*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 603*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 604*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 605*833e5d42SEmmanuel Vadot }; 606*833e5d42SEmmanuel Vadot vol-keys { 607*833e5d42SEmmanuel Vadot nvidia,pins = "kb_col3_pq3", 608*833e5d42SEmmanuel Vadot "kb_col4_pq4"; 609*833e5d42SEmmanuel Vadot nvidia,function = "rsvd4"; 610*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 611*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 612*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 613*833e5d42SEmmanuel Vadot }; 614*833e5d42SEmmanuel Vadot 615*833e5d42SEmmanuel Vadot /* Bluetooth */ 616*833e5d42SEmmanuel Vadot bt-shutdown { 617*833e5d42SEmmanuel Vadot nvidia,pins = "pu0"; 618*833e5d42SEmmanuel Vadot nvidia,function = "rsvd4"; 619*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 620*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 621*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 622*833e5d42SEmmanuel Vadot }; 623*833e5d42SEmmanuel Vadot bt-dev-wake { 624*833e5d42SEmmanuel Vadot nvidia,pins = "pu1"; 625*833e5d42SEmmanuel Vadot nvidia,function = "rsvd1"; 626*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 627*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 628*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 629*833e5d42SEmmanuel Vadot }; 630*833e5d42SEmmanuel Vadot bt-host-wake { 631*833e5d42SEmmanuel Vadot nvidia,pins = "pu6"; 632*833e5d42SEmmanuel Vadot nvidia,function = "rsvd4"; 633*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 634*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 635*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 636*833e5d42SEmmanuel Vadot }; 637*833e5d42SEmmanuel Vadot 638*833e5d42SEmmanuel Vadot pu2 { 639*833e5d42SEmmanuel Vadot nvidia,pins = "pu2"; 640*833e5d42SEmmanuel Vadot nvidia,function = "rsvd1"; 641*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 642*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 643*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 644*833e5d42SEmmanuel Vadot }; 645*833e5d42SEmmanuel Vadot pu3 { 646*833e5d42SEmmanuel Vadot nvidia,pins = "pu3"; 647*833e5d42SEmmanuel Vadot nvidia,function = "rsvd4"; 648*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 649*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 650*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 651*833e5d42SEmmanuel Vadot }; 652*833e5d42SEmmanuel Vadot pcc1 { 653*833e5d42SEmmanuel Vadot nvidia,pins = "pcc1"; 654*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 655*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 656*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 657*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 658*833e5d42SEmmanuel Vadot }; 659*833e5d42SEmmanuel Vadot pv2 { 660*833e5d42SEmmanuel Vadot nvidia,pins = "pv2"; 661*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 662*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 663*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 664*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 665*833e5d42SEmmanuel Vadot }; 666*833e5d42SEmmanuel Vadot pv3 { 667*833e5d42SEmmanuel Vadot nvidia,pins = "pv3"; 668*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 669*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 670*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 671*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 672*833e5d42SEmmanuel Vadot }; 673*833e5d42SEmmanuel Vadot 674*833e5d42SEmmanuel Vadot vi-vsync-pd6 { 675*833e5d42SEmmanuel Vadot nvidia,pins = "vi_vsync_pd6", 676*833e5d42SEmmanuel Vadot "vi_hsync_pd7"; 677*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 678*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 679*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 680*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 681*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 682*833e5d42SEmmanuel Vadot nvidia,io-reset = <0>; 683*833e5d42SEmmanuel Vadot }; 684*833e5d42SEmmanuel Vadot vi-d10-pt2 { 685*833e5d42SEmmanuel Vadot nvidia,pins = "vi_d10_pt2", 686*833e5d42SEmmanuel Vadot "vi_d0_pt4", 687*833e5d42SEmmanuel Vadot "pbb0"; 688*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 689*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 690*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 691*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 692*833e5d42SEmmanuel Vadot }; 693*833e5d42SEmmanuel Vadot kb-row0-pr0 { 694*833e5d42SEmmanuel Vadot nvidia,pins = "kb_row0_pr0"; 695*833e5d42SEmmanuel Vadot nvidia,function = "rsvd4"; 696*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 697*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 698*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 699*833e5d42SEmmanuel Vadot }; 700*833e5d42SEmmanuel Vadot gmi-ad0-pg0 { 701*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad0_pg0", 702*833e5d42SEmmanuel Vadot "gmi_ad1_pg1", 703*833e5d42SEmmanuel Vadot "gmi_ad2_pg2", 704*833e5d42SEmmanuel Vadot "gmi_ad3_pg3", 705*833e5d42SEmmanuel Vadot "gmi_ad6_pg6", 706*833e5d42SEmmanuel Vadot "gmi_ad7_pg7", 707*833e5d42SEmmanuel Vadot "gmi_wr_n_pi0", 708*833e5d42SEmmanuel Vadot "gmi_oe_n_pi1", 709*833e5d42SEmmanuel Vadot "gmi_dqs_pi2", 710*833e5d42SEmmanuel Vadot "gmi_adv_n_pk0", 711*833e5d42SEmmanuel Vadot "gmi_clk_pk1"; 712*833e5d42SEmmanuel Vadot nvidia,function = "nand"; 713*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 714*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 715*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 716*833e5d42SEmmanuel Vadot }; 717*833e5d42SEmmanuel Vadot gmi-ad13-ph5 { 718*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad13_ph5"; 719*833e5d42SEmmanuel Vadot nvidia,function = "nand"; 720*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 721*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 722*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 723*833e5d42SEmmanuel Vadot }; 724*833e5d42SEmmanuel Vadot gmi-ad10-ph2 { 725*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad10_ph2", 726*833e5d42SEmmanuel Vadot "gmi_ad11_ph3", 727*833e5d42SEmmanuel Vadot "gmi_ad14_ph6"; 728*833e5d42SEmmanuel Vadot nvidia,function = "nand"; 729*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 730*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 731*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 732*833e5d42SEmmanuel Vadot }; 733*833e5d42SEmmanuel Vadot gmi-ad12-ph4 { 734*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad12_ph4", 735*833e5d42SEmmanuel Vadot "gmi_rst_n_pi4", 736*833e5d42SEmmanuel Vadot "gmi_cs7_n_pi6"; 737*833e5d42SEmmanuel Vadot nvidia,function = "nand"; 738*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 739*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 740*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 741*833e5d42SEmmanuel Vadot }; 742*833e5d42SEmmanuel Vadot 743*833e5d42SEmmanuel Vadot /* Vibrator control */ 744*833e5d42SEmmanuel Vadot vibrator { 745*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad11_ph3"; 746*833e5d42SEmmanuel Vadot nvidia,function = "nand"; 747*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 748*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 749*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 750*833e5d42SEmmanuel Vadot }; 751*833e5d42SEmmanuel Vadot 752*833e5d42SEmmanuel Vadot /* PWM pinmux */ 753*833e5d42SEmmanuel Vadot pwm-0 { 754*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad8_ph0"; 755*833e5d42SEmmanuel Vadot nvidia,function = "pwm0"; 756*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 757*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 758*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 759*833e5d42SEmmanuel Vadot }; 760*833e5d42SEmmanuel Vadot pwm-2 { 761*833e5d42SEmmanuel Vadot nvidia,pins = "pu5"; 762*833e5d42SEmmanuel Vadot nvidia,function = "pwm2"; 763*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 764*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 765*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 766*833e5d42SEmmanuel Vadot }; 767*833e5d42SEmmanuel Vadot 768*833e5d42SEmmanuel Vadot gmi-cs-n { 769*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_cs4_n_pk2", 770*833e5d42SEmmanuel Vadot "gmi_cs6_n_pi3"; 771*833e5d42SEmmanuel Vadot nvidia,function = "gmi"; 772*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 773*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 774*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 775*833e5d42SEmmanuel Vadot }; 776*833e5d42SEmmanuel Vadot 777*833e5d42SEmmanuel Vadot /* Spdif pinmux */ 778*833e5d42SEmmanuel Vadot spdif-out { 779*833e5d42SEmmanuel Vadot nvidia,pins = "spdif_out_pk5"; 780*833e5d42SEmmanuel Vadot nvidia,function = "spdif"; 781*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 782*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 783*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 784*833e5d42SEmmanuel Vadot }; 785*833e5d42SEmmanuel Vadot spdif-in { 786*833e5d42SEmmanuel Vadot nvidia,pins = "spdif_in_pk6"; 787*833e5d42SEmmanuel Vadot nvidia,function = "spdif"; 788*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 789*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 790*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 791*833e5d42SEmmanuel Vadot }; 792*833e5d42SEmmanuel Vadot 793*833e5d42SEmmanuel Vadot vi-d4-pl2 { 794*833e5d42SEmmanuel Vadot nvidia,pins = "vi_d4_pl2"; 795*833e5d42SEmmanuel Vadot nvidia,function = "vi"; 796*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 797*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 798*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 799*833e5d42SEmmanuel Vadot }; 800*833e5d42SEmmanuel Vadot vi-d6-pl4 { 801*833e5d42SEmmanuel Vadot nvidia,pins = "vi_d6_pl4"; 802*833e5d42SEmmanuel Vadot nvidia,function = "vi"; 803*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 804*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 805*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 806*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 807*833e5d42SEmmanuel Vadot nvidia,io-reset = <0>; 808*833e5d42SEmmanuel Vadot }; 809*833e5d42SEmmanuel Vadot vi-mclk-pt1 { 810*833e5d42SEmmanuel Vadot nvidia,pins = "vi_mclk_pt1"; 811*833e5d42SEmmanuel Vadot nvidia,function = "vi"; 812*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 813*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 814*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 815*833e5d42SEmmanuel Vadot }; 816*833e5d42SEmmanuel Vadot 817*833e5d42SEmmanuel Vadot jtag { 818*833e5d42SEmmanuel Vadot nvidia,pins = "jtag_rtck_pu7"; 819*833e5d42SEmmanuel Vadot nvidia,function = "rtck"; 820*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 821*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 822*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 823*833e5d42SEmmanuel Vadot }; 824*833e5d42SEmmanuel Vadot 825*833e5d42SEmmanuel Vadot crt-sync { 826*833e5d42SEmmanuel Vadot nvidia,pins = "crt_hsync_pv6", 827*833e5d42SEmmanuel Vadot "crt_vsync_pv7"; 828*833e5d42SEmmanuel Vadot nvidia,function = "crt"; 829*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 830*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 831*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 832*833e5d42SEmmanuel Vadot }; 833*833e5d42SEmmanuel Vadot 834*833e5d42SEmmanuel Vadot clk1-out { 835*833e5d42SEmmanuel Vadot nvidia,pins = "clk1_out_pw4"; 836*833e5d42SEmmanuel Vadot nvidia,function = "extperiph1"; 837*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 838*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 839*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 840*833e5d42SEmmanuel Vadot }; 841*833e5d42SEmmanuel Vadot clk2-out { 842*833e5d42SEmmanuel Vadot nvidia,pins = "clk2_out_pw5"; 843*833e5d42SEmmanuel Vadot nvidia,function = "extperiph2"; 844*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 845*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 846*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 847*833e5d42SEmmanuel Vadot }; 848*833e5d42SEmmanuel Vadot clk3-out { 849*833e5d42SEmmanuel Vadot nvidia,pins = "clk3_out_pee0"; 850*833e5d42SEmmanuel Vadot nvidia,function = "extperiph3"; 851*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 852*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 853*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 854*833e5d42SEmmanuel Vadot }; 855*833e5d42SEmmanuel Vadot sys-clk-req { 856*833e5d42SEmmanuel Vadot nvidia,pins = "sys_clk_req_pz5"; 857*833e5d42SEmmanuel Vadot nvidia,function = "sysclk"; 858*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 859*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 860*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 861*833e5d42SEmmanuel Vadot }; 862*833e5d42SEmmanuel Vadot 863*833e5d42SEmmanuel Vadot pbb3 { 864*833e5d42SEmmanuel Vadot nvidia,pins = "pbb3"; 865*833e5d42SEmmanuel Vadot nvidia,function = "vgp3"; 866*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 867*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 868*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 869*833e5d42SEmmanuel Vadot }; 870*833e5d42SEmmanuel Vadot pbb4 { 871*833e5d42SEmmanuel Vadot nvidia,pins = "pbb4"; 872*833e5d42SEmmanuel Vadot nvidia,function = "vgp4"; 873*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 874*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 875*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 876*833e5d42SEmmanuel Vadot }; 877*833e5d42SEmmanuel Vadot pbb5 { 878*833e5d42SEmmanuel Vadot nvidia,pins = "pbb5"; 879*833e5d42SEmmanuel Vadot nvidia,function = "vgp5"; 880*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 881*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 882*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 883*833e5d42SEmmanuel Vadot }; 884*833e5d42SEmmanuel Vadot 885*833e5d42SEmmanuel Vadot clk2-req-pcc5 { 886*833e5d42SEmmanuel Vadot nvidia,pins = "clk2_req_pcc5", 887*833e5d42SEmmanuel Vadot "clk1_req_pee2"; 888*833e5d42SEmmanuel Vadot nvidia,function = "dap"; 889*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 890*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 891*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 892*833e5d42SEmmanuel Vadot }; 893*833e5d42SEmmanuel Vadot clk3-req-pee1 { 894*833e5d42SEmmanuel Vadot nvidia,pins = "clk3_req_pee1"; 895*833e5d42SEmmanuel Vadot nvidia,function = "dev3"; 896*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 897*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 898*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 899*833e5d42SEmmanuel Vadot }; 900*833e5d42SEmmanuel Vadot 901*833e5d42SEmmanuel Vadot owr { 902*833e5d42SEmmanuel Vadot nvidia,pins = "owr"; 903*833e5d42SEmmanuel Vadot nvidia,function = "owr"; 904*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 905*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 906*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 907*833e5d42SEmmanuel Vadot }; 908*833e5d42SEmmanuel Vadot 909*833e5d42SEmmanuel Vadot /* GPIO power/drive control */ 910*833e5d42SEmmanuel Vadot drive-dap1 { 911*833e5d42SEmmanuel Vadot nvidia,pins = "drive_dap1", 912*833e5d42SEmmanuel Vadot "drive_dap2", 913*833e5d42SEmmanuel Vadot "drive_dbg", 914*833e5d42SEmmanuel Vadot "drive_at5", 915*833e5d42SEmmanuel Vadot "drive_gme", 916*833e5d42SEmmanuel Vadot "drive_ddc", 917*833e5d42SEmmanuel Vadot "drive_ao1", 918*833e5d42SEmmanuel Vadot "drive_uart3"; 919*833e5d42SEmmanuel Vadot nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>; 920*833e5d42SEmmanuel Vadot nvidia,schmitt = <TEGRA_PIN_ENABLE>; 921*833e5d42SEmmanuel Vadot nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>; 922*833e5d42SEmmanuel Vadot nvidia,pull-down-strength = <31>; 923*833e5d42SEmmanuel Vadot nvidia,pull-up-strength = <31>; 924*833e5d42SEmmanuel Vadot nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 925*833e5d42SEmmanuel Vadot nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 926*833e5d42SEmmanuel Vadot }; 927*833e5d42SEmmanuel Vadot drive-sdio1 { 928*833e5d42SEmmanuel Vadot nvidia,pins = "drive_sdio1", 929*833e5d42SEmmanuel Vadot "drive_sdio3"; 930*833e5d42SEmmanuel Vadot nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>; 931*833e5d42SEmmanuel Vadot nvidia,schmitt = <TEGRA_PIN_DISABLE>; 932*833e5d42SEmmanuel Vadot nvidia,pull-down-strength = <46>; 933*833e5d42SEmmanuel Vadot nvidia,pull-up-strength = <42>; 934*833e5d42SEmmanuel Vadot nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>; 935*833e5d42SEmmanuel Vadot nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>; 936*833e5d42SEmmanuel Vadot }; 937*833e5d42SEmmanuel Vadot drive-sdmmc4 { 938*833e5d42SEmmanuel Vadot nvidia,pins = "drive_gma", 939*833e5d42SEmmanuel Vadot "drive_gmb", 940*833e5d42SEmmanuel Vadot "drive_gmc", 941*833e5d42SEmmanuel Vadot "drive_gmd"; 942*833e5d42SEmmanuel Vadot nvidia,pull-down-strength = <9>; 943*833e5d42SEmmanuel Vadot nvidia,pull-up-strength = <9>; 944*833e5d42SEmmanuel Vadot nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>; 945*833e5d42SEmmanuel Vadot nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>; 946*833e5d42SEmmanuel Vadot }; 947*833e5d42SEmmanuel Vadot }; 948*833e5d42SEmmanuel Vadot }; 949*833e5d42SEmmanuel Vadot 950*833e5d42SEmmanuel Vadot uartb: serial@70006040 { 951*833e5d42SEmmanuel Vadot compatible = "nvidia,tegra30-hsuart"; 952*833e5d42SEmmanuel Vadot reset-names = "serial"; 953*833e5d42SEmmanuel Vadot /delete-property/ reg-shift; 954*833e5d42SEmmanuel Vadot status = "okay"; 955*833e5d42SEmmanuel Vadot 956*833e5d42SEmmanuel Vadot /* Broadcom GPS BCM47511 */ 957*833e5d42SEmmanuel Vadot }; 958*833e5d42SEmmanuel Vadot 959*833e5d42SEmmanuel Vadot uartc: serial@70006200 { 960*833e5d42SEmmanuel Vadot compatible = "nvidia,tegra30-hsuart"; 961*833e5d42SEmmanuel Vadot reset-names = "serial"; 962*833e5d42SEmmanuel Vadot /delete-property/ reg-shift; 963*833e5d42SEmmanuel Vadot status = "okay"; 964*833e5d42SEmmanuel Vadot 965*833e5d42SEmmanuel Vadot nvidia,adjust-baud-rates = <0 9600 100>, 966*833e5d42SEmmanuel Vadot <9600 115200 200>, 967*833e5d42SEmmanuel Vadot <1000000 4000000 136>; 968*833e5d42SEmmanuel Vadot 969*833e5d42SEmmanuel Vadot /* Azurewave AW-NH665 BCM4330B1 */ 970*833e5d42SEmmanuel Vadot bluetooth { 971*833e5d42SEmmanuel Vadot compatible = "brcm,bcm4330-bt"; 972*833e5d42SEmmanuel Vadot max-speed = <4000000>; 973*833e5d42SEmmanuel Vadot 974*833e5d42SEmmanuel Vadot clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>; 975*833e5d42SEmmanuel Vadot clock-names = "txco"; 976*833e5d42SEmmanuel Vadot 977*833e5d42SEmmanuel Vadot interrupt-parent = <&gpio>; 978*833e5d42SEmmanuel Vadot interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>; 979*833e5d42SEmmanuel Vadot interrupt-names = "host-wakeup"; 980*833e5d42SEmmanuel Vadot 981*833e5d42SEmmanuel Vadot device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>; 982*833e5d42SEmmanuel Vadot shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>; 983*833e5d42SEmmanuel Vadot 984*833e5d42SEmmanuel Vadot vbat-supply = <&vdd_3v3_com>; 985*833e5d42SEmmanuel Vadot vddio-supply = <&vdd_1v8_vio>; 986*833e5d42SEmmanuel Vadot }; 987*833e5d42SEmmanuel Vadot }; 988*833e5d42SEmmanuel Vadot 989*833e5d42SEmmanuel Vadot pwm@7000a000 { 990*833e5d42SEmmanuel Vadot status = "okay"; 991*833e5d42SEmmanuel Vadot }; 992*833e5d42SEmmanuel Vadot 993*833e5d42SEmmanuel Vadot gen1_i2c: i2c@7000c000 { 994*833e5d42SEmmanuel Vadot status = "okay"; 995*833e5d42SEmmanuel Vadot clock-frequency = <100000>; 996*833e5d42SEmmanuel Vadot 997*833e5d42SEmmanuel Vadot /* Nuvoton NPCE698LA0BX embedded controller */ 998*833e5d42SEmmanuel Vadot }; 999*833e5d42SEmmanuel Vadot 1000*833e5d42SEmmanuel Vadot i2c@7000c400 { 1001*833e5d42SEmmanuel Vadot status = "okay"; 1002*833e5d42SEmmanuel Vadot clock-frequency = <400000>; 1003*833e5d42SEmmanuel Vadot 1004*833e5d42SEmmanuel Vadot /* Atmel Maxtouch MXT1664 HID over I2C */ 1005*833e5d42SEmmanuel Vadot touchscreen@4b { 1006*833e5d42SEmmanuel Vadot compatible = "hid-over-i2c"; 1007*833e5d42SEmmanuel Vadot reg = <0x4b>; 1008*833e5d42SEmmanuel Vadot 1009*833e5d42SEmmanuel Vadot hid-descr-addr = <0x0000>; 1010*833e5d42SEmmanuel Vadot 1011*833e5d42SEmmanuel Vadot interrupt-parent = <&gpio>; 1012*833e5d42SEmmanuel Vadot interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_LEVEL_LOW>; 1013*833e5d42SEmmanuel Vadot 1014*833e5d42SEmmanuel Vadot vdd-supply = <&vdd_3v3_sys>; 1015*833e5d42SEmmanuel Vadot vddl-supply = <&vdd_1v8_vio>; 1016*833e5d42SEmmanuel Vadot }; 1017*833e5d42SEmmanuel Vadot }; 1018*833e5d42SEmmanuel Vadot 1019*833e5d42SEmmanuel Vadot i2c@7000c500 { 1020*833e5d42SEmmanuel Vadot status = "okay"; 1021*833e5d42SEmmanuel Vadot clock-frequency = <100000>; 1022*833e5d42SEmmanuel Vadot 1023*833e5d42SEmmanuel Vadot /* TI TPS61050/61052 Boost Converter */ 1024*833e5d42SEmmanuel Vadot flash-led@33 { 1025*833e5d42SEmmanuel Vadot compatible = "ti,tps61052"; 1026*833e5d42SEmmanuel Vadot reg = <0x33>; 1027*833e5d42SEmmanuel Vadot 1028*833e5d42SEmmanuel Vadot led { 1029*833e5d42SEmmanuel Vadot color = <LED_COLOR_ID_WHITE>; 1030*833e5d42SEmmanuel Vadot }; 1031*833e5d42SEmmanuel Vadot }; 1032*833e5d42SEmmanuel Vadot 1033*833e5d42SEmmanuel Vadot imu@69 { 1034*833e5d42SEmmanuel Vadot compatible = "invensense,mpu6050"; 1035*833e5d42SEmmanuel Vadot reg = <0x69>; 1036*833e5d42SEmmanuel Vadot 1037*833e5d42SEmmanuel Vadot interrupt-parent = <&gpio>; 1038*833e5d42SEmmanuel Vadot interrupts = <TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_RISING>; 1039*833e5d42SEmmanuel Vadot 1040*833e5d42SEmmanuel Vadot vdd-supply = <&vdd_3v3_sys>; 1041*833e5d42SEmmanuel Vadot vddio-supply = <&vdd_1v8_vio>; 1042*833e5d42SEmmanuel Vadot 1043*833e5d42SEmmanuel Vadot mount-matrix = "0", "-1", "0", 1044*833e5d42SEmmanuel Vadot "-1", "0", "0", 1045*833e5d42SEmmanuel Vadot "0", "0", "-1"; 1046*833e5d42SEmmanuel Vadot 1047*833e5d42SEmmanuel Vadot /* External I2C interface */ 1048*833e5d42SEmmanuel Vadot i2c-gate { 1049*833e5d42SEmmanuel Vadot #address-cells = <1>; 1050*833e5d42SEmmanuel Vadot #size-cells = <0>; 1051*833e5d42SEmmanuel Vadot 1052*833e5d42SEmmanuel Vadot magnetometer@d { 1053*833e5d42SEmmanuel Vadot compatible = "asahi-kasei,ak8975"; 1054*833e5d42SEmmanuel Vadot reg = <0x0d>; 1055*833e5d42SEmmanuel Vadot 1056*833e5d42SEmmanuel Vadot interrupt-parent = <&gpio>; 1057*833e5d42SEmmanuel Vadot interrupts = <TEGRA_GPIO(D, 5) IRQ_TYPE_EDGE_RISING>; 1058*833e5d42SEmmanuel Vadot 1059*833e5d42SEmmanuel Vadot vdd-supply = <&vdd_3v3_sys>; 1060*833e5d42SEmmanuel Vadot vid-supply = <&vdd_1v8_vio>; 1061*833e5d42SEmmanuel Vadot 1062*833e5d42SEmmanuel Vadot mount-matrix = "0", "-1", "0", 1063*833e5d42SEmmanuel Vadot "-1", "0", "0", 1064*833e5d42SEmmanuel Vadot "0", "0", "-1"; 1065*833e5d42SEmmanuel Vadot }; 1066*833e5d42SEmmanuel Vadot }; 1067*833e5d42SEmmanuel Vadot }; 1068*833e5d42SEmmanuel Vadot }; 1069*833e5d42SEmmanuel Vadot 1070*833e5d42SEmmanuel Vadot hdmi_ddc: i2c@7000c700 { 1071*833e5d42SEmmanuel Vadot status = "okay"; 1072*833e5d42SEmmanuel Vadot clock-frequency = <93750>; 1073*833e5d42SEmmanuel Vadot }; 1074*833e5d42SEmmanuel Vadot 1075*833e5d42SEmmanuel Vadot i2c@7000d000 { 1076*833e5d42SEmmanuel Vadot status = "okay"; 1077*833e5d42SEmmanuel Vadot clock-frequency = <400000>; 1078*833e5d42SEmmanuel Vadot 1079*833e5d42SEmmanuel Vadot rt5640: audio-codec@1c { 1080*833e5d42SEmmanuel Vadot compatible = "realtek,rt5640"; 1081*833e5d42SEmmanuel Vadot reg = <0x1c>; 1082*833e5d42SEmmanuel Vadot 1083*833e5d42SEmmanuel Vadot interrupt-parent = <&gpio>; 1084*833e5d42SEmmanuel Vadot interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>; 1085*833e5d42SEmmanuel Vadot 1086*833e5d42SEmmanuel Vadot clocks = <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1087*833e5d42SEmmanuel Vadot clock-names = "mclk"; 1088*833e5d42SEmmanuel Vadot }; 1089*833e5d42SEmmanuel Vadot 1090*833e5d42SEmmanuel Vadot /* Texas Instruments TPS659110 PMIC */ 1091*833e5d42SEmmanuel Vadot pmic: pmic@2d { 1092*833e5d42SEmmanuel Vadot compatible = "ti,tps65911"; 1093*833e5d42SEmmanuel Vadot reg = <0x2d>; 1094*833e5d42SEmmanuel Vadot 1095*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 1096*833e5d42SEmmanuel Vadot #interrupt-cells = <2>; 1097*833e5d42SEmmanuel Vadot interrupt-controller; 1098*833e5d42SEmmanuel Vadot 1099*833e5d42SEmmanuel Vadot ti,en-gpio-sleep = <0 0 1 0 0 0 0 0 0>; 1100*833e5d42SEmmanuel Vadot ti,system-power-controller; 1101*833e5d42SEmmanuel Vadot ti,sleep-keep-ck32k; 1102*833e5d42SEmmanuel Vadot ti,sleep-enable; 1103*833e5d42SEmmanuel Vadot 1104*833e5d42SEmmanuel Vadot #gpio-cells = <2>; 1105*833e5d42SEmmanuel Vadot gpio-controller; 1106*833e5d42SEmmanuel Vadot 1107*833e5d42SEmmanuel Vadot vcc1-supply = <&vdd_5v0_bat>; 1108*833e5d42SEmmanuel Vadot vcc2-supply = <&vdd_5v0_bat>; 1109*833e5d42SEmmanuel Vadot vcc3-supply = <&vdd_1v8_vio>; 1110*833e5d42SEmmanuel Vadot vcc4-supply = <&vdd_5v0_sys>; 1111*833e5d42SEmmanuel Vadot vcc5-supply = <&vdd_5v0_bat>; 1112*833e5d42SEmmanuel Vadot vcc6-supply = <&vdd_3v3_sys>; 1113*833e5d42SEmmanuel Vadot vcc7-supply = <&vdd_5v0_bat>; 1114*833e5d42SEmmanuel Vadot vccio-supply = <&vdd_5v0_bat>; 1115*833e5d42SEmmanuel Vadot 1116*833e5d42SEmmanuel Vadot pmic-sleep-hog { 1117*833e5d42SEmmanuel Vadot gpio-hog; 1118*833e5d42SEmmanuel Vadot gpios = <2 GPIO_ACTIVE_HIGH>; 1119*833e5d42SEmmanuel Vadot output-high; 1120*833e5d42SEmmanuel Vadot }; 1121*833e5d42SEmmanuel Vadot 1122*833e5d42SEmmanuel Vadot regulators { 1123*833e5d42SEmmanuel Vadot vdd_lcd: vdd1 { 1124*833e5d42SEmmanuel Vadot regulator-name = "vddio_ddr_1v2"; 1125*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1200000>; 1126*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1200000>; 1127*833e5d42SEmmanuel Vadot regulator-always-on; 1128*833e5d42SEmmanuel Vadot regulator-boot-on; 1129*833e5d42SEmmanuel Vadot ti,regulator-ext-sleep-control = <8>; 1130*833e5d42SEmmanuel Vadot }; 1131*833e5d42SEmmanuel Vadot 1132*833e5d42SEmmanuel Vadot vddio_ddr: vdd2 { 1133*833e5d42SEmmanuel Vadot regulator-name = "vddio_ddr"; 1134*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1200000>; 1135*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1200000>; 1136*833e5d42SEmmanuel Vadot regulator-always-on; 1137*833e5d42SEmmanuel Vadot regulator-boot-on; 1138*833e5d42SEmmanuel Vadot }; 1139*833e5d42SEmmanuel Vadot 1140*833e5d42SEmmanuel Vadot vdd_cpu: vddctrl { 1141*833e5d42SEmmanuel Vadot regulator-name = "vdd_cpu,vdd_sys"; 1142*833e5d42SEmmanuel Vadot regulator-min-microvolt = <600000>; 1143*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1400000>; 1144*833e5d42SEmmanuel Vadot regulator-coupled-with = <&vdd_core>; 1145*833e5d42SEmmanuel Vadot regulator-coupled-max-spread = <300000>; 1146*833e5d42SEmmanuel Vadot regulator-max-step-microvolt = <100000>; 1147*833e5d42SEmmanuel Vadot regulator-always-on; 1148*833e5d42SEmmanuel Vadot regulator-boot-on; 1149*833e5d42SEmmanuel Vadot ti,regulator-ext-sleep-control = <1>; 1150*833e5d42SEmmanuel Vadot 1151*833e5d42SEmmanuel Vadot nvidia,tegra-cpu-regulator; 1152*833e5d42SEmmanuel Vadot }; 1153*833e5d42SEmmanuel Vadot 1154*833e5d42SEmmanuel Vadot vdd_1v8_vio: vio { 1155*833e5d42SEmmanuel Vadot regulator-name = "vdd_1v8_gen"; 1156*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1800000>; 1157*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1800000>; 1158*833e5d42SEmmanuel Vadot regulator-always-on; 1159*833e5d42SEmmanuel Vadot regulator-boot-on; 1160*833e5d42SEmmanuel Vadot }; 1161*833e5d42SEmmanuel Vadot 1162*833e5d42SEmmanuel Vadot /* eMMC VDD */ 1163*833e5d42SEmmanuel Vadot vcore_emmc: ldo1 { 1164*833e5d42SEmmanuel Vadot regulator-name = "vdd_emmc_core"; 1165*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1000000>; 1166*833e5d42SEmmanuel Vadot regulator-max-microvolt = <3300000>; 1167*833e5d42SEmmanuel Vadot regulator-always-on; 1168*833e5d42SEmmanuel Vadot }; 1169*833e5d42SEmmanuel Vadot 1170*833e5d42SEmmanuel Vadot /* ldo2 and ldo3 are not used by TF600T */ 1171*833e5d42SEmmanuel Vadot 1172*833e5d42SEmmanuel Vadot ldo4 { 1173*833e5d42SEmmanuel Vadot regulator-name = "vdd_rtc"; 1174*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1200000>; 1175*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1200000>; 1176*833e5d42SEmmanuel Vadot regulator-always-on; 1177*833e5d42SEmmanuel Vadot }; 1178*833e5d42SEmmanuel Vadot 1179*833e5d42SEmmanuel Vadot /* uSD slot VDDIO */ 1180*833e5d42SEmmanuel Vadot vddio_usd: ldo5 { 1181*833e5d42SEmmanuel Vadot regulator-name = "vddio_sdmmc"; 1182*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1800000>; 1183*833e5d42SEmmanuel Vadot regulator-max-microvolt = <3300000>; 1184*833e5d42SEmmanuel Vadot regulator-always-on; 1185*833e5d42SEmmanuel Vadot }; 1186*833e5d42SEmmanuel Vadot 1187*833e5d42SEmmanuel Vadot avdd_dsi_csi: ldo6 { 1188*833e5d42SEmmanuel Vadot regulator-name = "avdd_dsi_csi"; 1189*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1200000>; 1190*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1200000>; 1191*833e5d42SEmmanuel Vadot }; 1192*833e5d42SEmmanuel Vadot 1193*833e5d42SEmmanuel Vadot ldo7 { 1194*833e5d42SEmmanuel Vadot regulator-name = "vdd_pllm,x,u,a_p_c_s"; 1195*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1200000>; 1196*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1200000>; 1197*833e5d42SEmmanuel Vadot regulator-always-on; 1198*833e5d42SEmmanuel Vadot regulator-boot-on; 1199*833e5d42SEmmanuel Vadot ti,regulator-ext-sleep-control = <8>; 1200*833e5d42SEmmanuel Vadot }; 1201*833e5d42SEmmanuel Vadot 1202*833e5d42SEmmanuel Vadot ldo8 { 1203*833e5d42SEmmanuel Vadot regulator-name = "vdd_ddr_hs"; 1204*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1000000>; 1205*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1000000>; 1206*833e5d42SEmmanuel Vadot regulator-always-on; 1207*833e5d42SEmmanuel Vadot ti,regulator-ext-sleep-control = <8>; 1208*833e5d42SEmmanuel Vadot }; 1209*833e5d42SEmmanuel Vadot }; 1210*833e5d42SEmmanuel Vadot }; 1211*833e5d42SEmmanuel Vadot 1212*833e5d42SEmmanuel Vadot /* Capella CM3218 ambient light sensor */ 1213*833e5d42SEmmanuel Vadot light-sensor@48 { 1214*833e5d42SEmmanuel Vadot compatible = "capella,cm32181"; 1215*833e5d42SEmmanuel Vadot reg = <0x48>; 1216*833e5d42SEmmanuel Vadot 1217*833e5d42SEmmanuel Vadot interrupt-parent = <&gpio>; 1218*833e5d42SEmmanuel Vadot interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_EDGE_RISING>; 1219*833e5d42SEmmanuel Vadot 1220*833e5d42SEmmanuel Vadot vdd-supply = <&vdd_3v3_als>; 1221*833e5d42SEmmanuel Vadot }; 1222*833e5d42SEmmanuel Vadot 1223*833e5d42SEmmanuel Vadot nct72: temperature-sensor@4c { 1224*833e5d42SEmmanuel Vadot compatible = "onnn,nct1008"; 1225*833e5d42SEmmanuel Vadot reg = <0x4c>; 1226*833e5d42SEmmanuel Vadot 1227*833e5d42SEmmanuel Vadot interrupt-parent = <&gpio>; 1228*833e5d42SEmmanuel Vadot interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>; 1229*833e5d42SEmmanuel Vadot 1230*833e5d42SEmmanuel Vadot vcc-supply = <&vdd_3v3_sys>; 1231*833e5d42SEmmanuel Vadot #thermal-sensor-cells = <1>; 1232*833e5d42SEmmanuel Vadot }; 1233*833e5d42SEmmanuel Vadot 1234*833e5d42SEmmanuel Vadot vdd_core: core-regulator@60 { 1235*833e5d42SEmmanuel Vadot compatible = "ti,tps62361"; 1236*833e5d42SEmmanuel Vadot reg = <0x60>; 1237*833e5d42SEmmanuel Vadot 1238*833e5d42SEmmanuel Vadot regulator-name = "tps62361-vout"; 1239*833e5d42SEmmanuel Vadot regulator-min-microvolt = <500000>; 1240*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1770000>; 1241*833e5d42SEmmanuel Vadot regulator-coupled-with = <&vdd_cpu>; 1242*833e5d42SEmmanuel Vadot regulator-coupled-max-spread = <300000>; 1243*833e5d42SEmmanuel Vadot regulator-max-step-microvolt = <100000>; 1244*833e5d42SEmmanuel Vadot regulator-boot-on; 1245*833e5d42SEmmanuel Vadot regulator-always-on; 1246*833e5d42SEmmanuel Vadot ti,enable-vout-discharge; 1247*833e5d42SEmmanuel Vadot ti,vsel0-state-high; 1248*833e5d42SEmmanuel Vadot ti,vsel1-state-high; 1249*833e5d42SEmmanuel Vadot 1250*833e5d42SEmmanuel Vadot nvidia,tegra-core-regulator; 1251*833e5d42SEmmanuel Vadot }; 1252*833e5d42SEmmanuel Vadot }; 1253*833e5d42SEmmanuel Vadot 1254*833e5d42SEmmanuel Vadot pmc@7000e400 { 1255*833e5d42SEmmanuel Vadot status = "okay"; 1256*833e5d42SEmmanuel Vadot nvidia,invert-interrupt; 1257*833e5d42SEmmanuel Vadot nvidia,suspend-mode = <2>; 1258*833e5d42SEmmanuel Vadot nvidia,cpu-pwr-good-time = <2000>; 1259*833e5d42SEmmanuel Vadot nvidia,cpu-pwr-off-time = <200>; 1260*833e5d42SEmmanuel Vadot nvidia,core-pwr-good-time = <3845 3845>; 1261*833e5d42SEmmanuel Vadot nvidia,core-pwr-off-time = <0>; 1262*833e5d42SEmmanuel Vadot nvidia,core-power-req-active-high; 1263*833e5d42SEmmanuel Vadot nvidia,sys-clock-req-active-high; 1264*833e5d42SEmmanuel Vadot core-supply = <&vdd_core>; 1265*833e5d42SEmmanuel Vadot 1266*833e5d42SEmmanuel Vadot i2c-thermtrip { 1267*833e5d42SEmmanuel Vadot nvidia,i2c-controller-id = <4>; 1268*833e5d42SEmmanuel Vadot nvidia,bus-addr = <0x2d>; 1269*833e5d42SEmmanuel Vadot nvidia,reg-addr = <0x3f>; 1270*833e5d42SEmmanuel Vadot nvidia,reg-data = <0x81>; 1271*833e5d42SEmmanuel Vadot }; 1272*833e5d42SEmmanuel Vadot }; 1273*833e5d42SEmmanuel Vadot 1274*833e5d42SEmmanuel Vadot spi@7000da00 { 1275*833e5d42SEmmanuel Vadot status = "okay"; 1276*833e5d42SEmmanuel Vadot spi-max-frequency = <25000000>; 1277*833e5d42SEmmanuel Vadot 1278*833e5d42SEmmanuel Vadot flash@1 { 1279*833e5d42SEmmanuel Vadot compatible = "winbond,w25q32", "jedec,spi-nor"; 1280*833e5d42SEmmanuel Vadot reg = <1>; 1281*833e5d42SEmmanuel Vadot 1282*833e5d42SEmmanuel Vadot spi-max-frequency = <20000000>; 1283*833e5d42SEmmanuel Vadot vcc-supply = <&vdd_3v3_sys>; 1284*833e5d42SEmmanuel Vadot }; 1285*833e5d42SEmmanuel Vadot }; 1286*833e5d42SEmmanuel Vadot 1287*833e5d42SEmmanuel Vadot memory-controller@7000f000 { 1288*833e5d42SEmmanuel Vadot emc-timings-0 { 1289*833e5d42SEmmanuel Vadot /* Elpida 2GB 750 MHZ */ 1290*833e5d42SEmmanuel Vadot nvidia,ram-code = <0>; 1291*833e5d42SEmmanuel Vadot 1292*833e5d42SEmmanuel Vadot timing-25500000 { 1293*833e5d42SEmmanuel Vadot clock-frequency = <25500000>; 1294*833e5d42SEmmanuel Vadot 1295*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00020001 0xc0000010 1296*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000002 0x00000000 1297*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000008 1298*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1299*833e5d42SEmmanuel Vadot 0x06020102 0x000a0502 0x75e30303 0x001f0000 >; 1300*833e5d42SEmmanuel Vadot }; 1301*833e5d42SEmmanuel Vadot 1302*833e5d42SEmmanuel Vadot timing-51000000 { 1303*833e5d42SEmmanuel Vadot clock-frequency = <51000000>; 1304*833e5d42SEmmanuel Vadot 1305*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00010001 0xc0000010 1306*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000002 0x00000000 1307*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000008 1308*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1309*833e5d42SEmmanuel Vadot 0x06020102 0x000a0502 0x74e30303 0x001f0000 >; 1310*833e5d42SEmmanuel Vadot }; 1311*833e5d42SEmmanuel Vadot 1312*833e5d42SEmmanuel Vadot timing-102000000 { 1313*833e5d42SEmmanuel Vadot clock-frequency = <102000000>; 1314*833e5d42SEmmanuel Vadot 1315*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00000001 0xc0000018 1316*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000000 1317*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000008 1318*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1319*833e5d42SEmmanuel Vadot 0x06020102 0x000a0503 0x74430504 0x001f0000 >; 1320*833e5d42SEmmanuel Vadot }; 1321*833e5d42SEmmanuel Vadot 1322*833e5d42SEmmanuel Vadot timing-204000000 { 1323*833e5d42SEmmanuel Vadot clock-frequency = <204000000>; 1324*833e5d42SEmmanuel Vadot 1325*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00000003 0xc0000025 1326*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000005 0x00000002 1327*833e5d42SEmmanuel Vadot 0x00000003 0x00000001 0x00000003 0x00000008 1328*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1329*833e5d42SEmmanuel Vadot 0x06020102 0x000a0505 0x74040a06 0x001f0000 >; 1330*833e5d42SEmmanuel Vadot }; 1331*833e5d42SEmmanuel Vadot 1332*833e5d42SEmmanuel Vadot timing-375000000 { 1333*833e5d42SEmmanuel Vadot clock-frequency = <375000000>; 1334*833e5d42SEmmanuel Vadot 1335*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00000005 0xc0000044 1336*833e5d42SEmmanuel Vadot 0x00000001 0x00000002 0x00000009 0x00000005 1337*833e5d42SEmmanuel Vadot 0x00000005 0x00000001 0x00000002 0x00000008 1338*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000003 0x00000006 1339*833e5d42SEmmanuel Vadot 0x06030202 0x000d0709 0x7086110a 0x001f0000 >; 1340*833e5d42SEmmanuel Vadot }; 1341*833e5d42SEmmanuel Vadot 1342*833e5d42SEmmanuel Vadot timing-750000000 { 1343*833e5d42SEmmanuel Vadot clock-frequency = <750000000>; 1344*833e5d42SEmmanuel Vadot 1345*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x0000000b 0xc0000087 1346*833e5d42SEmmanuel Vadot 0x00000004 0x00000005 0x00000012 0x0000000c 1347*833e5d42SEmmanuel Vadot 0x0000000b 0x00000002 0x00000003 0x0000000c 1348*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000004 0x00000008 1349*833e5d42SEmmanuel Vadot 0x08040202 0x00160d12 0x710c2213 0x001f0000 >; 1350*833e5d42SEmmanuel Vadot }; 1351*833e5d42SEmmanuel Vadot }; 1352*833e5d42SEmmanuel Vadot 1353*833e5d42SEmmanuel Vadot emc-timings-1 { 1354*833e5d42SEmmanuel Vadot /* Hynix 2GB 750 MHZ */ 1355*833e5d42SEmmanuel Vadot nvidia,ram-code = <1>; 1356*833e5d42SEmmanuel Vadot 1357*833e5d42SEmmanuel Vadot timing-51000000 { 1358*833e5d42SEmmanuel Vadot clock-frequency = <51000000>; 1359*833e5d42SEmmanuel Vadot 1360*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00010003 0xc0000010 1361*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000002 0x00000000 1362*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000008 1363*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1364*833e5d42SEmmanuel Vadot 0x06020102 0x000a0502 0x74630303 0x001f0000 >; 1365*833e5d42SEmmanuel Vadot }; 1366*833e5d42SEmmanuel Vadot 1367*833e5d42SEmmanuel Vadot timing-102000000 { 1368*833e5d42SEmmanuel Vadot clock-frequency = <102000000>; 1369*833e5d42SEmmanuel Vadot 1370*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00000003 0xc0000018 1371*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000000 1372*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000008 1373*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1374*833e5d42SEmmanuel Vadot 0x06020102 0x000a0503 0x73c30504 0x001f0000 >; 1375*833e5d42SEmmanuel Vadot }; 1376*833e5d42SEmmanuel Vadot 1377*833e5d42SEmmanuel Vadot timing-204000000 { 1378*833e5d42SEmmanuel Vadot clock-frequency = <204000000>; 1379*833e5d42SEmmanuel Vadot 1380*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00000006 0xc0000025 1381*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000005 0x00000002 1382*833e5d42SEmmanuel Vadot 0x00000003 0x00000001 0x00000003 0x00000008 1383*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1384*833e5d42SEmmanuel Vadot 0x06020102 0x000a0505 0x73840a06 0x001f0000 >; 1385*833e5d42SEmmanuel Vadot }; 1386*833e5d42SEmmanuel Vadot 1387*833e5d42SEmmanuel Vadot timing-375000000 { 1388*833e5d42SEmmanuel Vadot clock-frequency = <375000000>; 1389*833e5d42SEmmanuel Vadot 1390*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x0000000b 0xc0000044 1391*833e5d42SEmmanuel Vadot 0x00000001 0x00000002 0x00000009 0x00000005 1392*833e5d42SEmmanuel Vadot 0x00000005 0x00000001 0x00000002 0x00000008 1393*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000003 0x00000006 1394*833e5d42SEmmanuel Vadot 0x06030202 0x000c0609 0x7086110a 0x001f0000 >; 1395*833e5d42SEmmanuel Vadot }; 1396*833e5d42SEmmanuel Vadot 1397*833e5d42SEmmanuel Vadot timing-750000000 { 1398*833e5d42SEmmanuel Vadot clock-frequency = <750000000>; 1399*833e5d42SEmmanuel Vadot 1400*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00000016 0xc0000087 1401*833e5d42SEmmanuel Vadot 0x00000003 0x00000004 0x00000012 0x0000000c 1402*833e5d42SEmmanuel Vadot 0x0000000b 0x00000002 0x00000003 0x0000000c 1403*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000004 0x00000008 1404*833e5d42SEmmanuel Vadot 0x08040202 0x00150c12 0x710c2213 0x001f0000 >; 1405*833e5d42SEmmanuel Vadot }; 1406*833e5d42SEmmanuel Vadot }; 1407*833e5d42SEmmanuel Vadot 1408*833e5d42SEmmanuel Vadot emc-timings-2 { 1409*833e5d42SEmmanuel Vadot /* Micron 2GB 750 MHZ */ 1410*833e5d42SEmmanuel Vadot nvidia,ram-code = <2>; 1411*833e5d42SEmmanuel Vadot 1412*833e5d42SEmmanuel Vadot timing-51000000 { 1413*833e5d42SEmmanuel Vadot clock-frequency = <51000000>; 1414*833e5d42SEmmanuel Vadot 1415*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00010003 0xc0000010 1416*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000002 0x00000000 1417*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000008 1418*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1419*833e5d42SEmmanuel Vadot 0x06020102 0x000a0502 0x73430303 0x001f0000 >; 1420*833e5d42SEmmanuel Vadot }; 1421*833e5d42SEmmanuel Vadot 1422*833e5d42SEmmanuel Vadot timing-102000000 { 1423*833e5d42SEmmanuel Vadot clock-frequency = <102000000>; 1424*833e5d42SEmmanuel Vadot 1425*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00000003 0xc0000018 1426*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000000 1427*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000008 1428*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1429*833e5d42SEmmanuel Vadot 0x06020102 0x000a0503 0x74430504 0x001f0000 >; 1430*833e5d42SEmmanuel Vadot }; 1431*833e5d42SEmmanuel Vadot 1432*833e5d42SEmmanuel Vadot timing-204000000 { 1433*833e5d42SEmmanuel Vadot clock-frequency = <204000000>; 1434*833e5d42SEmmanuel Vadot 1435*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00000006 0xc0000025 1436*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000005 0x00000002 1437*833e5d42SEmmanuel Vadot 0x00000003 0x00000001 0x00000003 0x00000008 1438*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1439*833e5d42SEmmanuel Vadot 0x06020102 0x000a0505 0x74040a06 0x001f0000 >; 1440*833e5d42SEmmanuel Vadot }; 1441*833e5d42SEmmanuel Vadot 1442*833e5d42SEmmanuel Vadot timing-375000000 { 1443*833e5d42SEmmanuel Vadot clock-frequency = <375000000>; 1444*833e5d42SEmmanuel Vadot 1445*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x0000000b 0xc0000044 1446*833e5d42SEmmanuel Vadot 0x00000001 0x00000002 0x00000009 0x00000005 1447*833e5d42SEmmanuel Vadot 0x00000005 0x00000001 0x00000002 0x00000008 1448*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000003 0x00000006 1449*833e5d42SEmmanuel Vadot 0x06030202 0x000d0709 0x7086110a 0x001f0000 >; 1450*833e5d42SEmmanuel Vadot }; 1451*833e5d42SEmmanuel Vadot 1452*833e5d42SEmmanuel Vadot timing-750000000 { 1453*833e5d42SEmmanuel Vadot clock-frequency = <750000000>; 1454*833e5d42SEmmanuel Vadot 1455*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00000016 0xc0000087 1456*833e5d42SEmmanuel Vadot 0x00000004 0x00000005 0x00000012 0x0000000c 1457*833e5d42SEmmanuel Vadot 0x0000000b 0x00000003 0x00000003 0x0000000c 1458*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000004 0x00000008 1459*833e5d42SEmmanuel Vadot 0x08040202 0x00160d12 0x710c2213 0x001f0000 >; 1460*833e5d42SEmmanuel Vadot }; 1461*833e5d42SEmmanuel Vadot }; 1462*833e5d42SEmmanuel Vadot }; 1463*833e5d42SEmmanuel Vadot 1464*833e5d42SEmmanuel Vadot memory-controller@7000f400 { 1465*833e5d42SEmmanuel Vadot emc-timings-0 { 1466*833e5d42SEmmanuel Vadot /* Elpida 2GB 750 MHZ */ 1467*833e5d42SEmmanuel Vadot nvidia,ram-code = <0>; 1468*833e5d42SEmmanuel Vadot 1469*833e5d42SEmmanuel Vadot timing-25500000 { 1470*833e5d42SEmmanuel Vadot clock-frequency = <25500000>; 1471*833e5d42SEmmanuel Vadot 1472*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1473*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1474*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200048>; 1475*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1476*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1477*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1478*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1479*833e5d42SEmmanuel Vadot 1480*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000001 1481*833e5d42SEmmanuel Vadot 0x00000007 0x00000000 0x00000000 0x00000002 1482*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000000 1483*833e5d42SEmmanuel Vadot 0x00000000 0x00000003 0x00000001 0x00000000 1484*833e5d42SEmmanuel Vadot 0x00000005 0x00000005 0x00000004 0x0000000a 1485*833e5d42SEmmanuel Vadot 0x0000000b 0x000000c0 0x00000000 0x00000030 1486*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1487*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x00000008 0x00000008 1488*833e5d42SEmmanuel Vadot 0x00000004 0x00000001 0x00000000 0x00000004 1489*833e5d42SEmmanuel Vadot 0x00000005 0x000000c7 0x00000006 0x00000004 1490*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x007800a4 1491*833e5d42SEmmanuel Vadot 0x00008000 0x000fc000 0x000fc000 0x000fc000 1492*833e5d42SEmmanuel Vadot 0x000fc000 0x000fc000 0x000fc000 0x000fc000 1493*833e5d42SEmmanuel Vadot 0x000fc000 0x00000000 0x00000000 0x00000000 1494*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1495*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1496*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1497*833e5d42SEmmanuel Vadot 0x00000000 0x000fc000 0x000fc000 0x000fc000 1498*833e5d42SEmmanuel Vadot 0x000fc000 0x000002a0 0x0800211c 0x00000000 1499*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1500*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00000000 1501*833e5d42SEmmanuel Vadot 0x00000040 0x000c000c 0xa0f10000 0x00000000 1502*833e5d42SEmmanuel Vadot 0x00000000 0x80000287 0xe8000000 0xff00ff00 >; 1503*833e5d42SEmmanuel Vadot }; 1504*833e5d42SEmmanuel Vadot 1505*833e5d42SEmmanuel Vadot timing-51000000 { 1506*833e5d42SEmmanuel Vadot clock-frequency = <51000000>; 1507*833e5d42SEmmanuel Vadot 1508*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1509*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1510*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200048>; 1511*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1512*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1513*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1514*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1515*833e5d42SEmmanuel Vadot 1516*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000002 1517*833e5d42SEmmanuel Vadot 0x0000000f 0x00000001 0x00000000 0x00000002 1518*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000000 1519*833e5d42SEmmanuel Vadot 0x00000000 0x00000003 0x00000001 0x00000000 1520*833e5d42SEmmanuel Vadot 0x00000005 0x00000005 0x00000004 0x0000000a 1521*833e5d42SEmmanuel Vadot 0x0000000b 0x00000181 0x00000000 0x00000060 1522*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1523*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x00000010 0x00000010 1524*833e5d42SEmmanuel Vadot 0x00000004 0x00000002 0x00000000 0x00000004 1525*833e5d42SEmmanuel Vadot 0x00000005 0x0000018e 0x00000006 0x00000004 1526*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x007800a4 1527*833e5d42SEmmanuel Vadot 0x00008000 0x000fc000 0x000fc000 0x000fc000 1528*833e5d42SEmmanuel Vadot 0x000fc000 0x000fc000 0x000fc000 0x000fc000 1529*833e5d42SEmmanuel Vadot 0x000fc000 0x00000000 0x00000000 0x00000000 1530*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1531*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1532*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1533*833e5d42SEmmanuel Vadot 0x00000000 0x000fc000 0x000fc000 0x000fc000 1534*833e5d42SEmmanuel Vadot 0x000fc000 0x000002a0 0x0800211c 0x00000000 1535*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1536*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00000000 1537*833e5d42SEmmanuel Vadot 0x00000040 0x000c000c 0xa0f10000 0x00000000 1538*833e5d42SEmmanuel Vadot 0x00000000 0x8000040b 0xe8000000 0xff00ff00 >; 1539*833e5d42SEmmanuel Vadot }; 1540*833e5d42SEmmanuel Vadot 1541*833e5d42SEmmanuel Vadot timing-102000000 { 1542*833e5d42SEmmanuel Vadot clock-frequency = <102000000>; 1543*833e5d42SEmmanuel Vadot 1544*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1545*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1546*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200048>; 1547*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1548*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1549*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1550*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1551*833e5d42SEmmanuel Vadot 1552*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000004 1553*833e5d42SEmmanuel Vadot 0x0000001e 0x00000003 0x00000001 0x00000002 1554*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000001 1555*833e5d42SEmmanuel Vadot 0x00000001 0x00000003 0x00000001 0x00000000 1556*833e5d42SEmmanuel Vadot 0x00000005 0x00000005 0x00000004 0x0000000a 1557*833e5d42SEmmanuel Vadot 0x0000000b 0x00000303 0x00000000 0x000000c0 1558*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1559*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x00000020 0x00000020 1560*833e5d42SEmmanuel Vadot 0x00000004 0x00000004 0x00000000 0x00000004 1561*833e5d42SEmmanuel Vadot 0x00000005 0x0000031c 0x00000006 0x00000004 1562*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x007800a4 1563*833e5d42SEmmanuel Vadot 0x00008000 0x000fc000 0x000fc000 0x000fc000 1564*833e5d42SEmmanuel Vadot 0x000fc000 0x000fc000 0x000fc000 0x000fc000 1565*833e5d42SEmmanuel Vadot 0x000fc000 0x00000000 0x00000000 0x00000000 1566*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1567*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1568*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1569*833e5d42SEmmanuel Vadot 0x00000000 0x000fc000 0x000fc000 0x000fc000 1570*833e5d42SEmmanuel Vadot 0x000fc000 0x000002a0 0x0800211c 0x00000000 1571*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1572*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00000000 1573*833e5d42SEmmanuel Vadot 0x00000040 0x000c000c 0xa0f10000 0x00000000 1574*833e5d42SEmmanuel Vadot 0x00000000 0x80000713 0xe8000000 0xff00ff00 >; 1575*833e5d42SEmmanuel Vadot }; 1576*833e5d42SEmmanuel Vadot 1577*833e5d42SEmmanuel Vadot timing-204000000 { 1578*833e5d42SEmmanuel Vadot clock-frequency = <204000000>; 1579*833e5d42SEmmanuel Vadot 1580*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1581*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1582*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200048>; 1583*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1584*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1585*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1586*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1587*833e5d42SEmmanuel Vadot 1588*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000009 1589*833e5d42SEmmanuel Vadot 0x0000003d 0x00000007 0x00000002 0x00000002 1590*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000002 1591*833e5d42SEmmanuel Vadot 0x00000002 0x00000003 0x00000001 0x00000000 1592*833e5d42SEmmanuel Vadot 0x00000005 0x00000006 0x00000004 0x0000000a 1593*833e5d42SEmmanuel Vadot 0x0000000b 0x00000607 0x00000000 0x00000181 1594*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1595*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x00000040 0x00000040 1596*833e5d42SEmmanuel Vadot 0x00000004 0x00000007 0x00000000 0x00000004 1597*833e5d42SEmmanuel Vadot 0x00000005 0x00000638 0x00000007 0x00000004 1598*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x004400a4 1599*833e5d42SEmmanuel Vadot 0x00008000 0x00080000 0x00080000 0x00080000 1600*833e5d42SEmmanuel Vadot 0x00080000 0x00080000 0x00080000 0x00080000 1601*833e5d42SEmmanuel Vadot 0x00080000 0x00000000 0x00000000 0x00000000 1602*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1603*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1604*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1605*833e5d42SEmmanuel Vadot 0x00000000 0x00080000 0x00080000 0x00080000 1606*833e5d42SEmmanuel Vadot 0x00080000 0x000002a0 0x0800211c 0x00000000 1607*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1608*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00020000 1609*833e5d42SEmmanuel Vadot 0x00000100 0x000c000c 0xa0f10000 0x00000000 1610*833e5d42SEmmanuel Vadot 0x00000000 0x80000d22 0xe8000000 0xff00ff00 >; 1611*833e5d42SEmmanuel Vadot }; 1612*833e5d42SEmmanuel Vadot 1613*833e5d42SEmmanuel Vadot timing-375000000 { 1614*833e5d42SEmmanuel Vadot clock-frequency = <375000000>; 1615*833e5d42SEmmanuel Vadot 1616*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1617*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100002>; 1618*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200040>; 1619*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80000521>; 1620*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1621*833e5d42SEmmanuel Vadot 1622*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000011 1623*833e5d42SEmmanuel Vadot 0x0000006f 0x0000000c 0x00000004 0x00000003 1624*833e5d42SEmmanuel Vadot 0x00000008 0x00000002 0x0000000a 0x00000004 1625*833e5d42SEmmanuel Vadot 0x00000004 0x00000002 0x00000001 0x00000000 1626*833e5d42SEmmanuel Vadot 0x00000004 0x00000006 0x00000004 0x0000000a 1627*833e5d42SEmmanuel Vadot 0x0000000c 0x00000b2d 0x00000000 0x000002cb 1628*833e5d42SEmmanuel Vadot 0x00000001 0x00000008 0x00000001 0x00000000 1629*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x00000075 0x00000200 1630*833e5d42SEmmanuel Vadot 0x00000004 0x0000000c 0x00000000 0x00000004 1631*833e5d42SEmmanuel Vadot 0x00000005 0x00000b6d 0x00000000 0x00000004 1632*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00007088 0x00200084 1633*833e5d42SEmmanuel Vadot 0x00008000 0x00034000 0x00034000 0x00034000 1634*833e5d42SEmmanuel Vadot 0x00034000 0x00014000 0x00014000 0x00014000 1635*833e5d42SEmmanuel Vadot 0x00014000 0x00000000 0x00000000 0x00000000 1636*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1637*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1638*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1639*833e5d42SEmmanuel Vadot 0x00000000 0x00048000 0x00048000 0x00048000 1640*833e5d42SEmmanuel Vadot 0x00048000 0x000002a0 0x0600013d 0x00000000 1641*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f508 0x05057404 0x54000007 1642*833e5d42SEmmanuel Vadot 0x080001e8 0x06000021 0x00000802 0x00020000 1643*833e5d42SEmmanuel Vadot 0x00000100 0x0150000c 0xa0f10000 0x00000000 1644*833e5d42SEmmanuel Vadot 0x00000000 0x8000174b 0xe8000000 0xff00ff89 >; 1645*833e5d42SEmmanuel Vadot }; 1646*833e5d42SEmmanuel Vadot 1647*833e5d42SEmmanuel Vadot timing-750000000 { 1648*833e5d42SEmmanuel Vadot clock-frequency = <750000000>; 1649*833e5d42SEmmanuel Vadot 1650*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1651*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100002>; 1652*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200058>; 1653*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80000d71>; 1654*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1655*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1656*833e5d42SEmmanuel Vadot 1657*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000023 1658*833e5d42SEmmanuel Vadot 0x000000df 0x00000019 0x00000009 0x00000005 1659*833e5d42SEmmanuel Vadot 0x0000000d 0x00000004 0x00000013 0x00000009 1660*833e5d42SEmmanuel Vadot 0x00000009 0x00000003 0x00000001 0x00000000 1661*833e5d42SEmmanuel Vadot 0x00000007 0x0000000b 0x00000009 0x0000000b 1662*833e5d42SEmmanuel Vadot 0x00000011 0x0000169a 0x00000000 0x000005a6 1663*833e5d42SEmmanuel Vadot 0x00000003 0x00000010 0x00000001 0x00000000 1664*833e5d42SEmmanuel Vadot 0x0000000e 0x00000018 0x000000e9 0x00000200 1665*833e5d42SEmmanuel Vadot 0x00000005 0x00000017 0x00000000 0x00000007 1666*833e5d42SEmmanuel Vadot 0x00000008 0x000016da 0x0000000c 0x00000004 1667*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00005088 0xf0080191 1668*833e5d42SEmmanuel Vadot 0x00008000 0x0000000a 0x0000000a 0x0000000a 1669*833e5d42SEmmanuel Vadot 0x0000000a 0x00000008 0x00000008 0x00000008 1670*833e5d42SEmmanuel Vadot 0x00000008 0x00000000 0x00000000 0x00000000 1671*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1672*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1673*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1674*833e5d42SEmmanuel Vadot 0x00000000 0x0000000a 0x0000000a 0x0000000a 1675*833e5d42SEmmanuel Vadot 0x0000000a 0x000002a0 0x0600013d 0x22220000 1676*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f501 0x07077404 0x54000000 1677*833e5d42SEmmanuel Vadot 0x080001e8 0x06000021 0x00000802 0x00020000 1678*833e5d42SEmmanuel Vadot 0x00000100 0x00df000c 0xa0f10000 0x00000000 1679*833e5d42SEmmanuel Vadot 0x00000000 0x80002d93 0xf8000000 0xff00ff49 >; 1680*833e5d42SEmmanuel Vadot }; 1681*833e5d42SEmmanuel Vadot }; 1682*833e5d42SEmmanuel Vadot 1683*833e5d42SEmmanuel Vadot emc-timings-1 { 1684*833e5d42SEmmanuel Vadot /* Hynix 2GB 750 MHZ */ 1685*833e5d42SEmmanuel Vadot nvidia,ram-code = <1>; 1686*833e5d42SEmmanuel Vadot 1687*833e5d42SEmmanuel Vadot timing-51000000 { 1688*833e5d42SEmmanuel Vadot clock-frequency = <51000000>; 1689*833e5d42SEmmanuel Vadot 1690*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1691*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1692*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200048>; 1693*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1694*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1695*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1696*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1697*833e5d42SEmmanuel Vadot 1698*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000002 1699*833e5d42SEmmanuel Vadot 0x0000000d 0x00000001 0x00000000 0x00000002 1700*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000000 1701*833e5d42SEmmanuel Vadot 0x00000000 0x00000003 0x00000001 0x00000000 1702*833e5d42SEmmanuel Vadot 0x00000005 0x00000005 0x00000004 0x0000000a 1703*833e5d42SEmmanuel Vadot 0x0000000b 0x00000181 0x00000000 0x00000060 1704*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1705*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x0000000e 0x0000000e 1706*833e5d42SEmmanuel Vadot 0x00000004 0x00000002 0x00000000 0x00000004 1707*833e5d42SEmmanuel Vadot 0x00000005 0x0000018e 0x00000006 0x00000004 1708*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x007800a4 1709*833e5d42SEmmanuel Vadot 0x00008000 0x000fc000 0x000fc000 0x000fc000 1710*833e5d42SEmmanuel Vadot 0x000fc000 0x000fc000 0x000fc000 0x000fc000 1711*833e5d42SEmmanuel Vadot 0x000fc000 0x00000000 0x00000000 0x00000000 1712*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1713*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1714*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1715*833e5d42SEmmanuel Vadot 0x00000000 0x000fc000 0x000fc000 0x000fc000 1716*833e5d42SEmmanuel Vadot 0x000fc000 0x000002a0 0x0800211c 0x00000000 1717*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1718*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00000000 1719*833e5d42SEmmanuel Vadot 0x00000040 0x000c000c 0xa0f10000 0x00000000 1720*833e5d42SEmmanuel Vadot 0x00000000 0x8000040b 0xe8000000 0xff00ff00 >; 1721*833e5d42SEmmanuel Vadot }; 1722*833e5d42SEmmanuel Vadot 1723*833e5d42SEmmanuel Vadot timing-102000000 { 1724*833e5d42SEmmanuel Vadot clock-frequency = <102000000>; 1725*833e5d42SEmmanuel Vadot 1726*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1727*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1728*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200048>; 1729*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1730*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1731*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1732*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1733*833e5d42SEmmanuel Vadot 1734*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000004 1735*833e5d42SEmmanuel Vadot 0x0000001a 0x00000003 0x00000001 0x00000002 1736*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000001 1737*833e5d42SEmmanuel Vadot 0x00000001 0x00000003 0x00000001 0x00000000 1738*833e5d42SEmmanuel Vadot 0x00000005 0x00000005 0x00000004 0x0000000a 1739*833e5d42SEmmanuel Vadot 0x0000000b 0x00000303 0x00000000 0x000000c0 1740*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1741*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x0000001c 0x0000001c 1742*833e5d42SEmmanuel Vadot 0x00000004 0x00000004 0x00000000 0x00000004 1743*833e5d42SEmmanuel Vadot 0x00000005 0x0000031c 0x00000006 0x00000004 1744*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x007800a4 1745*833e5d42SEmmanuel Vadot 0x00008000 0x000fc000 0x000fc000 0x000fc000 1746*833e5d42SEmmanuel Vadot 0x000fc000 0x000fc000 0x000fc000 0x000fc000 1747*833e5d42SEmmanuel Vadot 0x000fc000 0x00000000 0x00000000 0x00000000 1748*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1749*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1750*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1751*833e5d42SEmmanuel Vadot 0x00000000 0x000fc000 0x000fc000 0x000fc000 1752*833e5d42SEmmanuel Vadot 0x000fc000 0x000002a0 0x0800211c 0x00000000 1753*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1754*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00000000 1755*833e5d42SEmmanuel Vadot 0x00000040 0x000c000c 0xa0f10000 0x00000000 1756*833e5d42SEmmanuel Vadot 0x00000000 0x80000713 0xe8000000 0xff00ff00 >; 1757*833e5d42SEmmanuel Vadot }; 1758*833e5d42SEmmanuel Vadot 1759*833e5d42SEmmanuel Vadot timing-204000000 { 1760*833e5d42SEmmanuel Vadot clock-frequency = <204000000>; 1761*833e5d42SEmmanuel Vadot 1762*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1763*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1764*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200048>; 1765*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1766*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1767*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1768*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1769*833e5d42SEmmanuel Vadot 1770*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000009 1771*833e5d42SEmmanuel Vadot 0x00000035 0x00000007 0x00000002 0x00000002 1772*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000002 1773*833e5d42SEmmanuel Vadot 0x00000002 0x00000003 0x00000001 0x00000000 1774*833e5d42SEmmanuel Vadot 0x00000005 0x00000006 0x00000004 0x0000000a 1775*833e5d42SEmmanuel Vadot 0x0000000b 0x00000607 0x00000000 0x00000181 1776*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1777*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x00000038 0x00000038 1778*833e5d42SEmmanuel Vadot 0x00000004 0x00000007 0x00000000 0x00000004 1779*833e5d42SEmmanuel Vadot 0x00000005 0x00000638 0x00000007 0x00000004 1780*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x004400a4 1781*833e5d42SEmmanuel Vadot 0x00008000 0x00080000 0x00080000 0x00080000 1782*833e5d42SEmmanuel Vadot 0x00080000 0x00080000 0x00080000 0x00080000 1783*833e5d42SEmmanuel Vadot 0x00080000 0x00000000 0x00000000 0x00000000 1784*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1785*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1786*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1787*833e5d42SEmmanuel Vadot 0x00000000 0x00080000 0x00080000 0x00080000 1788*833e5d42SEmmanuel Vadot 0x00080000 0x000002a0 0x0800211c 0x00000000 1789*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1790*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00020000 1791*833e5d42SEmmanuel Vadot 0x00000100 0x000c000c 0xa0f10000 0x00000000 1792*833e5d42SEmmanuel Vadot 0x00000000 0x80000d22 0xe8000000 0xff00ff00 >; 1793*833e5d42SEmmanuel Vadot }; 1794*833e5d42SEmmanuel Vadot 1795*833e5d42SEmmanuel Vadot timing-375000000 { 1796*833e5d42SEmmanuel Vadot clock-frequency = <375000000>; 1797*833e5d42SEmmanuel Vadot 1798*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1799*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1800*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200040>; 1801*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80000521>; 1802*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1803*833e5d42SEmmanuel Vadot 1804*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000011 1805*833e5d42SEmmanuel Vadot 0x00000060 0x0000000c 0x00000003 0x00000004 1806*833e5d42SEmmanuel Vadot 0x00000008 0x00000002 0x0000000a 0x00000003 1807*833e5d42SEmmanuel Vadot 0x00000003 0x00000002 0x00000001 0x00000000 1808*833e5d42SEmmanuel Vadot 0x00000004 0x00000006 0x00000004 0x0000000a 1809*833e5d42SEmmanuel Vadot 0x0000000c 0x00000b2d 0x00000000 0x000002cb 1810*833e5d42SEmmanuel Vadot 0x00000001 0x00000008 0x00000001 0x00000000 1811*833e5d42SEmmanuel Vadot 0x00000007 0x00000010 0x00000066 0x00000200 1812*833e5d42SEmmanuel Vadot 0x00000004 0x0000000c 0x00000000 0x00000004 1813*833e5d42SEmmanuel Vadot 0x00000005 0x00000b6d 0x00000000 0x00000004 1814*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00007288 0x00200084 1815*833e5d42SEmmanuel Vadot 0x00008000 0x00044000 0x00044000 0x00044000 1816*833e5d42SEmmanuel Vadot 0x00044000 0x00014000 0x00014000 0x00014000 1817*833e5d42SEmmanuel Vadot 0x00014000 0x00000000 0x00000000 0x00000000 1818*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1819*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1820*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1821*833e5d42SEmmanuel Vadot 0x00000000 0x00048000 0x00048000 0x00048000 1822*833e5d42SEmmanuel Vadot 0x00048000 0x000002a0 0x0600013d 0x00000000 1823*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f508 0x05057404 0x54000007 1824*833e5d42SEmmanuel Vadot 0x08000168 0x06000021 0x00000802 0x00020000 1825*833e5d42SEmmanuel Vadot 0x00000100 0x015f000c 0xa0f10000 0x00000000 1826*833e5d42SEmmanuel Vadot 0x00000000 0x8000174b 0xe8000000 0xff00ff89 >; 1827*833e5d42SEmmanuel Vadot }; 1828*833e5d42SEmmanuel Vadot 1829*833e5d42SEmmanuel Vadot timing-750000000 { 1830*833e5d42SEmmanuel Vadot clock-frequency = <750000000>; 1831*833e5d42SEmmanuel Vadot 1832*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1833*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100002>; 1834*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200058>; 1835*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80000d71>; 1836*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1837*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1838*833e5d42SEmmanuel Vadot 1839*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000023 1840*833e5d42SEmmanuel Vadot 0x000000c1 0x00000019 0x00000008 0x00000005 1841*833e5d42SEmmanuel Vadot 0x0000000d 0x00000004 0x00000013 0x00000008 1842*833e5d42SEmmanuel Vadot 0x00000008 0x00000003 0x00000001 0x00000000 1843*833e5d42SEmmanuel Vadot 0x00000007 0x0000000b 0x00000009 0x0000000b 1844*833e5d42SEmmanuel Vadot 0x00000011 0x0000169a 0x00000000 0x000005a6 1845*833e5d42SEmmanuel Vadot 0x00000003 0x00000010 0x00000001 0x00000000 1846*833e5d42SEmmanuel Vadot 0x0000000e 0x00000018 0x000000cb 0x00000200 1847*833e5d42SEmmanuel Vadot 0x00000005 0x00000017 0x00000000 0x00000007 1848*833e5d42SEmmanuel Vadot 0x00000008 0x000016da 0x0000000c 0x00000004 1849*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00005088 0xf0080191 1850*833e5d42SEmmanuel Vadot 0x00008000 0x00008008 0x00000008 0x00000008 1851*833e5d42SEmmanuel Vadot 0x00000008 0x00000008 0x00000008 0x00000008 1852*833e5d42SEmmanuel Vadot 0x00000008 0x00000000 0x00000000 0x00000000 1853*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1854*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1855*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1856*833e5d42SEmmanuel Vadot 0x00000000 0x0000000a 0x0000000a 0x0000000a 1857*833e5d42SEmmanuel Vadot 0x0000000a 0x000002a0 0x0800013d 0x22220000 1858*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f501 0x07077404 0x54000000 1859*833e5d42SEmmanuel Vadot 0x080001e8 0x08000021 0x00000802 0x00020000 1860*833e5d42SEmmanuel Vadot 0x00000100 0x00fd000c 0xa0f10000 0x00000000 1861*833e5d42SEmmanuel Vadot 0x00000000 0x80002d93 0xe8000000 0xff00ff49 >; 1862*833e5d42SEmmanuel Vadot }; 1863*833e5d42SEmmanuel Vadot }; 1864*833e5d42SEmmanuel Vadot 1865*833e5d42SEmmanuel Vadot emc-timings-2 { 1866*833e5d42SEmmanuel Vadot /* Micron 2GB 750 MHZ */ 1867*833e5d42SEmmanuel Vadot nvidia,ram-code = <2>; 1868*833e5d42SEmmanuel Vadot 1869*833e5d42SEmmanuel Vadot timing-51000000 { 1870*833e5d42SEmmanuel Vadot clock-frequency = <51000000>; 1871*833e5d42SEmmanuel Vadot 1872*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1873*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1874*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200008>; 1875*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1876*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1877*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1878*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1879*833e5d42SEmmanuel Vadot 1880*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000002 1881*833e5d42SEmmanuel Vadot 0x00000008 0x00000001 0x00000000 0x00000002 1882*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000000 1883*833e5d42SEmmanuel Vadot 0x00000000 0x00000003 0x00000001 0x00000000 1884*833e5d42SEmmanuel Vadot 0x00000005 0x00000005 0x00000004 0x0000000a 1885*833e5d42SEmmanuel Vadot 0x0000000b 0x00000181 0x00000000 0x00000060 1886*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1887*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x00000009 0x00000009 1888*833e5d42SEmmanuel Vadot 0x00000004 0x00000002 0x00000000 0x00000004 1889*833e5d42SEmmanuel Vadot 0x00000005 0x0000018e 0x00000006 0x00000004 1890*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x007800a4 1891*833e5d42SEmmanuel Vadot 0x00008000 0x000fc000 0x000fc000 0x000fc000 1892*833e5d42SEmmanuel Vadot 0x000fc000 0x000fc000 0x000fc000 0x000fc000 1893*833e5d42SEmmanuel Vadot 0x000fc000 0x00000000 0x00000000 0x00000000 1894*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1895*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1896*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1897*833e5d42SEmmanuel Vadot 0x00000000 0x000fc000 0x000fc000 0x000fc000 1898*833e5d42SEmmanuel Vadot 0x000fc000 0x000002a0 0x0800211c 0x00000000 1899*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1900*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00000000 1901*833e5d42SEmmanuel Vadot 0x00000040 0x000c000c 0xa0f10000 0x00000000 1902*833e5d42SEmmanuel Vadot 0x00000000 0x8000040b 0xe8000000 0xff00ff00 >; 1903*833e5d42SEmmanuel Vadot }; 1904*833e5d42SEmmanuel Vadot 1905*833e5d42SEmmanuel Vadot timing-102000000 { 1906*833e5d42SEmmanuel Vadot clock-frequency = <102000000>; 1907*833e5d42SEmmanuel Vadot 1908*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1909*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1910*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200048>; 1911*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1912*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1913*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1914*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1915*833e5d42SEmmanuel Vadot 1916*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000004 1917*833e5d42SEmmanuel Vadot 0x0000001e 0x00000003 0x00000001 0x00000002 1918*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000001 1919*833e5d42SEmmanuel Vadot 0x00000001 0x00000003 0x00000001 0x00000000 1920*833e5d42SEmmanuel Vadot 0x00000005 0x00000005 0x00000004 0x0000000a 1921*833e5d42SEmmanuel Vadot 0x0000000b 0x00000303 0x00000000 0x000000c0 1922*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1923*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x00000020 0x00000020 1924*833e5d42SEmmanuel Vadot 0x00000004 0x00000004 0x00000000 0x00000004 1925*833e5d42SEmmanuel Vadot 0x00000005 0x0000031c 0x00000006 0x00000004 1926*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x007800a4 1927*833e5d42SEmmanuel Vadot 0x00008000 0x000fc000 0x000fc000 0x000fc000 1928*833e5d42SEmmanuel Vadot 0x000fc000 0x000fc000 0x000fc000 0x000fc000 1929*833e5d42SEmmanuel Vadot 0x000fc000 0x00000000 0x00000000 0x00000000 1930*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1931*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1932*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1933*833e5d42SEmmanuel Vadot 0x00000000 0x000fc000 0x000fc000 0x000fc000 1934*833e5d42SEmmanuel Vadot 0x000fc000 0x000002a0 0x0800211c 0x00000000 1935*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1936*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00000000 1937*833e5d42SEmmanuel Vadot 0x00000040 0x000c000c 0xa0f10000 0x00000000 1938*833e5d42SEmmanuel Vadot 0x00000000 0x80000713 0xe8000000 0xff00ff00 >; 1939*833e5d42SEmmanuel Vadot }; 1940*833e5d42SEmmanuel Vadot 1941*833e5d42SEmmanuel Vadot timing-204000000 { 1942*833e5d42SEmmanuel Vadot clock-frequency = <204000000>; 1943*833e5d42SEmmanuel Vadot 1944*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1945*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1946*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200048>; 1947*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1948*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1949*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1950*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1951*833e5d42SEmmanuel Vadot 1952*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000009 1953*833e5d42SEmmanuel Vadot 0x0000003d 0x00000007 0x00000002 0x00000002 1954*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000002 1955*833e5d42SEmmanuel Vadot 0x00000002 0x00000003 0x00000001 0x00000000 1956*833e5d42SEmmanuel Vadot 0x00000005 0x00000006 0x00000004 0x0000000a 1957*833e5d42SEmmanuel Vadot 0x0000000b 0x00000607 0x00000000 0x00000181 1958*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1959*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x00000040 0x00000040 1960*833e5d42SEmmanuel Vadot 0x00000004 0x00000007 0x00000000 0x00000004 1961*833e5d42SEmmanuel Vadot 0x00000005 0x00000638 0x00000007 0x00000004 1962*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x004400a4 1963*833e5d42SEmmanuel Vadot 0x00008000 0x00080000 0x00080000 0x00080000 1964*833e5d42SEmmanuel Vadot 0x00080000 0x00080000 0x00080000 0x00080000 1965*833e5d42SEmmanuel Vadot 0x00080000 0x00000000 0x00000000 0x00000000 1966*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1967*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1968*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1969*833e5d42SEmmanuel Vadot 0x00000000 0x00080000 0x00080000 0x00080000 1970*833e5d42SEmmanuel Vadot 0x00080000 0x000002a0 0x0800211c 0x00000000 1971*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1972*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00020000 1973*833e5d42SEmmanuel Vadot 0x00000100 0x000c000c 0xa0f10000 0x00000000 1974*833e5d42SEmmanuel Vadot 0x00000000 0x80000d22 0xe8000000 0xff00ff00 >; 1975*833e5d42SEmmanuel Vadot }; 1976*833e5d42SEmmanuel Vadot 1977*833e5d42SEmmanuel Vadot timing-375000000 { 1978*833e5d42SEmmanuel Vadot clock-frequency = <375000000>; 1979*833e5d42SEmmanuel Vadot 1980*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1981*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100002>; 1982*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200040>; 1983*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80000521>; 1984*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1985*833e5d42SEmmanuel Vadot 1986*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000011 1987*833e5d42SEmmanuel Vadot 0x0000006f 0x0000000c 0x00000004 0x00000003 1988*833e5d42SEmmanuel Vadot 0x00000008 0x00000002 0x0000000a 0x00000004 1989*833e5d42SEmmanuel Vadot 0x00000004 0x00000002 0x00000001 0x00000000 1990*833e5d42SEmmanuel Vadot 0x00000004 0x00000006 0x00000004 0x0000000a 1991*833e5d42SEmmanuel Vadot 0x0000000c 0x00000b2d 0x00000000 0x000002cb 1992*833e5d42SEmmanuel Vadot 0x00000001 0x00000008 0x00000001 0x00000000 1993*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x00000075 0x00000200 1994*833e5d42SEmmanuel Vadot 0x00000004 0x0000000c 0x00000000 0x00000004 1995*833e5d42SEmmanuel Vadot 0x00000005 0x00000b6d 0x00000000 0x00000004 1996*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00007088 0x00200084 1997*833e5d42SEmmanuel Vadot 0x00008000 0x00044000 0x00044000 0x00044000 1998*833e5d42SEmmanuel Vadot 0x00044000 0x00014000 0x00014000 0x00014000 1999*833e5d42SEmmanuel Vadot 0x00014000 0x00000000 0x00000000 0x00000000 2000*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 2001*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 2002*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 2003*833e5d42SEmmanuel Vadot 0x00000000 0x00048000 0x00048000 0x00048000 2004*833e5d42SEmmanuel Vadot 0x00048000 0x000002a0 0x0800013d 0x00000000 2005*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f508 0x05057404 0x54000007 2006*833e5d42SEmmanuel Vadot 0x080001e8 0x08000021 0x00000802 0x00020000 2007*833e5d42SEmmanuel Vadot 0x00000100 0x0150000c 0xa0f10000 0x00000000 2008*833e5d42SEmmanuel Vadot 0x00000000 0x8000174b 0xe8000000 0xff00ff89 >; 2009*833e5d42SEmmanuel Vadot }; 2010*833e5d42SEmmanuel Vadot 2011*833e5d42SEmmanuel Vadot timing-750000000 { 2012*833e5d42SEmmanuel Vadot clock-frequency = <750000000>; 2013*833e5d42SEmmanuel Vadot 2014*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 2015*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100002>; 2016*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200058>; 2017*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80000d71>; 2018*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 2019*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 2020*833e5d42SEmmanuel Vadot 2021*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000023 2022*833e5d42SEmmanuel Vadot 0x000000df 0x00000019 0x00000009 0x00000005 2023*833e5d42SEmmanuel Vadot 0x0000000d 0x00000004 0x00000013 0x00000009 2024*833e5d42SEmmanuel Vadot 0x00000009 0x00000006 0x00000001 0x00000000 2025*833e5d42SEmmanuel Vadot 0x00000007 0x0000000b 0x00000009 0x0000000b 2026*833e5d42SEmmanuel Vadot 0x00000011 0x0000169a 0x00000000 0x000005a6 2027*833e5d42SEmmanuel Vadot 0x00000003 0x00000010 0x00000001 0x00000000 2028*833e5d42SEmmanuel Vadot 0x0000000e 0x00000018 0x000000e9 0x00000200 2029*833e5d42SEmmanuel Vadot 0x00000005 0x00000017 0x00000000 0x00000007 2030*833e5d42SEmmanuel Vadot 0x00000008 0x000016da 0x0000000c 0x00000004 2031*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00005088 0xf0080191 2032*833e5d42SEmmanuel Vadot 0x00008000 0x0000800a 0x0000000a 0x0000000a 2033*833e5d42SEmmanuel Vadot 0x0000000a 0x00000008 0x00000008 0x00000008 2034*833e5d42SEmmanuel Vadot 0x00000008 0x00000000 0x00000000 0x00000000 2035*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 2036*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 2037*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 2038*833e5d42SEmmanuel Vadot 0x00000000 0x007fc00a 0x0000000a 0x0000000a 2039*833e5d42SEmmanuel Vadot 0x0000000a 0x000002a0 0x0800013d 0x22220000 2040*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f501 0x07077404 0x54000000 2041*833e5d42SEmmanuel Vadot 0x080001e8 0x08000021 0x00000802 0x00020000 2042*833e5d42SEmmanuel Vadot 0x00000100 0x00df000c 0xa0f10000 0x00000000 2043*833e5d42SEmmanuel Vadot 0x00000000 0x80002d93 0xf8000000 0xff00ff49 >; 2044*833e5d42SEmmanuel Vadot }; 2045*833e5d42SEmmanuel Vadot }; 2046*833e5d42SEmmanuel Vadot }; 2047*833e5d42SEmmanuel Vadot 2048*833e5d42SEmmanuel Vadot hda@70030000 { 2049*833e5d42SEmmanuel Vadot status = "okay"; 2050*833e5d42SEmmanuel Vadot }; 2051*833e5d42SEmmanuel Vadot 2052*833e5d42SEmmanuel Vadot ahub@70080000 { 2053*833e5d42SEmmanuel Vadot i2s@70080400 { /* i2s1 */ 2054*833e5d42SEmmanuel Vadot status = "okay"; 2055*833e5d42SEmmanuel Vadot }; 2056*833e5d42SEmmanuel Vadot 2057*833e5d42SEmmanuel Vadot /* BT SCO */ 2058*833e5d42SEmmanuel Vadot i2s@70080600 { /* i2s3 */ 2059*833e5d42SEmmanuel Vadot status = "okay"; 2060*833e5d42SEmmanuel Vadot }; 2061*833e5d42SEmmanuel Vadot }; 2062*833e5d42SEmmanuel Vadot 2063*833e5d42SEmmanuel Vadot sdmmc1: mmc@78000000 { 2064*833e5d42SEmmanuel Vadot status = "okay"; 2065*833e5d42SEmmanuel Vadot bus-width = <4>; 2066*833e5d42SEmmanuel Vadot 2067*833e5d42SEmmanuel Vadot cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; 2068*833e5d42SEmmanuel Vadot power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>; 2069*833e5d42SEmmanuel Vadot 2070*833e5d42SEmmanuel Vadot vmmc-supply = <&vdd_3v3_sys>; 2071*833e5d42SEmmanuel Vadot vqmmc-supply = <&vddio_usd>; 2072*833e5d42SEmmanuel Vadot }; 2073*833e5d42SEmmanuel Vadot 2074*833e5d42SEmmanuel Vadot sdmmc3: mmc@78000400 { 2075*833e5d42SEmmanuel Vadot status = "okay"; 2076*833e5d42SEmmanuel Vadot 2077*833e5d42SEmmanuel Vadot #address-cells = <1>; 2078*833e5d42SEmmanuel Vadot #size-cells = <0>; 2079*833e5d42SEmmanuel Vadot 2080*833e5d42SEmmanuel Vadot assigned-clocks = <&tegra_car TEGRA30_CLK_SDMMC3>; 2081*833e5d42SEmmanuel Vadot assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_C>; 2082*833e5d42SEmmanuel Vadot assigned-clock-rates = <50000000>; 2083*833e5d42SEmmanuel Vadot 2084*833e5d42SEmmanuel Vadot max-frequency = <50000000>; 2085*833e5d42SEmmanuel Vadot keep-power-in-suspend; 2086*833e5d42SEmmanuel Vadot bus-width = <4>; 2087*833e5d42SEmmanuel Vadot non-removable; 2088*833e5d42SEmmanuel Vadot 2089*833e5d42SEmmanuel Vadot mmc-pwrseq = <&brcm_wifi_pwrseq>; 2090*833e5d42SEmmanuel Vadot vmmc-supply = <&vdd_3v3_com>; 2091*833e5d42SEmmanuel Vadot vqmmc-supply = <&vdd_1v8_vio>; 2092*833e5d42SEmmanuel Vadot 2093*833e5d42SEmmanuel Vadot /* Azurewave AW-NH665 BCM4330B1 */ 2094*833e5d42SEmmanuel Vadot wifi@1 { 2095*833e5d42SEmmanuel Vadot compatible = "brcm,bcm4329-fmac"; 2096*833e5d42SEmmanuel Vadot reg = <1>; 2097*833e5d42SEmmanuel Vadot 2098*833e5d42SEmmanuel Vadot interrupt-parent = <&gpio>; 2099*833e5d42SEmmanuel Vadot interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_HIGH>; 2100*833e5d42SEmmanuel Vadot interrupt-names = "host-wake"; 2101*833e5d42SEmmanuel Vadot }; 2102*833e5d42SEmmanuel Vadot }; 2103*833e5d42SEmmanuel Vadot 2104*833e5d42SEmmanuel Vadot sdmmc4: mmc@78000600 { 2105*833e5d42SEmmanuel Vadot status = "okay"; 2106*833e5d42SEmmanuel Vadot bus-width = <8>; 2107*833e5d42SEmmanuel Vadot 2108*833e5d42SEmmanuel Vadot non-removable; 2109*833e5d42SEmmanuel Vadot mmc-ddr-1_8v; 2110*833e5d42SEmmanuel Vadot 2111*833e5d42SEmmanuel Vadot vmmc-supply = <&vcore_emmc>; 2112*833e5d42SEmmanuel Vadot vqmmc-supply = <&vdd_1v8_vio>; 2113*833e5d42SEmmanuel Vadot }; 2114*833e5d42SEmmanuel Vadot 2115*833e5d42SEmmanuel Vadot /* USB via ASUS connector */ 2116*833e5d42SEmmanuel Vadot usb@7d000000 { 2117*833e5d42SEmmanuel Vadot compatible = "nvidia,tegra30-udc"; 2118*833e5d42SEmmanuel Vadot status = "okay"; 2119*833e5d42SEmmanuel Vadot dr_mode = "peripheral"; 2120*833e5d42SEmmanuel Vadot }; 2121*833e5d42SEmmanuel Vadot 2122*833e5d42SEmmanuel Vadot usb-phy@7d000000 { 2123*833e5d42SEmmanuel Vadot status = "okay"; 2124*833e5d42SEmmanuel Vadot dr_mode = "peripheral"; 2125*833e5d42SEmmanuel Vadot nvidia,hssync-start-delay = <0>; 2126*833e5d42SEmmanuel Vadot nvidia,xcvr-lsfslew = <2>; 2127*833e5d42SEmmanuel Vadot nvidia,xcvr-lsrslew = <2>; 2128*833e5d42SEmmanuel Vadot vbus-supply = <&vdd_5v0_sys>; 2129*833e5d42SEmmanuel Vadot }; 2130*833e5d42SEmmanuel Vadot 2131*833e5d42SEmmanuel Vadot /* Dock's USB port */ 2132*833e5d42SEmmanuel Vadot usb@7d008000 { 2133*833e5d42SEmmanuel Vadot status = "okay"; 2134*833e5d42SEmmanuel Vadot }; 2135*833e5d42SEmmanuel Vadot 2136*833e5d42SEmmanuel Vadot usb-phy@7d008000 { 2137*833e5d42SEmmanuel Vadot status = "okay"; 2138*833e5d42SEmmanuel Vadot vbus-supply = <&vdd_5v0_bat>; 2139*833e5d42SEmmanuel Vadot }; 2140*833e5d42SEmmanuel Vadot 2141*833e5d42SEmmanuel Vadot backlight: backlight { 2142*833e5d42SEmmanuel Vadot compatible = "pwm-backlight"; 2143*833e5d42SEmmanuel Vadot 2144*833e5d42SEmmanuel Vadot enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; 2145*833e5d42SEmmanuel Vadot power-supply = <&vdd_5v0_bl>; 2146*833e5d42SEmmanuel Vadot pwms = <&pwm 0 71428>; 2147*833e5d42SEmmanuel Vadot 2148*833e5d42SEmmanuel Vadot brightness-levels = <1 255>; 2149*833e5d42SEmmanuel Vadot num-interpolated-steps = <254>; 2150*833e5d42SEmmanuel Vadot default-brightness-level = <15>; 2151*833e5d42SEmmanuel Vadot }; 2152*833e5d42SEmmanuel Vadot 2153*833e5d42SEmmanuel Vadot pad_battery: battery-pad { 2154*833e5d42SEmmanuel Vadot compatible = "simple-battery"; 2155*833e5d42SEmmanuel Vadot device-chemistry = "lithium-ion-polymer"; 2156*833e5d42SEmmanuel Vadot charge-full-design-microamp-hours = <6760000>; 2157*833e5d42SEmmanuel Vadot energy-full-design-microwatt-hours = <25000000>; 2158*833e5d42SEmmanuel Vadot operating-range-celsius = <0 45>; 2159*833e5d42SEmmanuel Vadot }; 2160*833e5d42SEmmanuel Vadot 2161*833e5d42SEmmanuel Vadot dock_battery: battery-dock { 2162*833e5d42SEmmanuel Vadot compatible = "simple-battery"; 2163*833e5d42SEmmanuel Vadot device-chemistry = "lithium-ion-polymer"; 2164*833e5d42SEmmanuel Vadot charge-full-design-microamp-hours = <2980000>; 2165*833e5d42SEmmanuel Vadot energy-full-design-microwatt-hours = <22000000>; 2166*833e5d42SEmmanuel Vadot operating-range-celsius = <0 45>; 2167*833e5d42SEmmanuel Vadot }; 2168*833e5d42SEmmanuel Vadot 2169*833e5d42SEmmanuel Vadot /* PMIC has a built-in 32KHz oscillator which is used by PMC */ 2170*833e5d42SEmmanuel Vadot clk32k_in: clock-32k { 2171*833e5d42SEmmanuel Vadot compatible = "fixed-clock"; 2172*833e5d42SEmmanuel Vadot #clock-cells = <0>; 2173*833e5d42SEmmanuel Vadot clock-frequency = <32768>; 2174*833e5d42SEmmanuel Vadot clock-output-names = "pmic-oscillator"; 2175*833e5d42SEmmanuel Vadot }; 2176*833e5d42SEmmanuel Vadot 2177*833e5d42SEmmanuel Vadot cpus { 2178*833e5d42SEmmanuel Vadot cpu0: cpu@0 { 2179*833e5d42SEmmanuel Vadot cpu-supply = <&vdd_cpu>; 2180*833e5d42SEmmanuel Vadot operating-points-v2 = <&cpu0_opp_table>; 2181*833e5d42SEmmanuel Vadot #cooling-cells = <2>; 2182*833e5d42SEmmanuel Vadot }; 2183*833e5d42SEmmanuel Vadot cpu1: cpu@1 { 2184*833e5d42SEmmanuel Vadot cpu-supply = <&vdd_cpu>; 2185*833e5d42SEmmanuel Vadot operating-points-v2 = <&cpu0_opp_table>; 2186*833e5d42SEmmanuel Vadot #cooling-cells = <2>; 2187*833e5d42SEmmanuel Vadot }; 2188*833e5d42SEmmanuel Vadot cpu2: cpu@2 { 2189*833e5d42SEmmanuel Vadot cpu-supply = <&vdd_cpu>; 2190*833e5d42SEmmanuel Vadot operating-points-v2 = <&cpu0_opp_table>; 2191*833e5d42SEmmanuel Vadot #cooling-cells = <2>; 2192*833e5d42SEmmanuel Vadot }; 2193*833e5d42SEmmanuel Vadot cpu3: cpu@3 { 2194*833e5d42SEmmanuel Vadot cpu-supply = <&vdd_cpu>; 2195*833e5d42SEmmanuel Vadot operating-points-v2 = <&cpu0_opp_table>; 2196*833e5d42SEmmanuel Vadot #cooling-cells = <2>; 2197*833e5d42SEmmanuel Vadot }; 2198*833e5d42SEmmanuel Vadot }; 2199*833e5d42SEmmanuel Vadot 2200*833e5d42SEmmanuel Vadot extcon-keys { 2201*833e5d42SEmmanuel Vadot compatible = "gpio-keys"; 2202*833e5d42SEmmanuel Vadot 2203*833e5d42SEmmanuel Vadot switch-dock-hall-sensor { 2204*833e5d42SEmmanuel Vadot label = "Lid sensor"; 2205*833e5d42SEmmanuel Vadot gpios = <&gpio TEGRA_GPIO(BB, 6) GPIO_ACTIVE_LOW>; 2206*833e5d42SEmmanuel Vadot linux,input-type = <EV_SW>; 2207*833e5d42SEmmanuel Vadot linux,code = <SW_LID>; 2208*833e5d42SEmmanuel Vadot debounce-interval = <500>; 2209*833e5d42SEmmanuel Vadot wakeup-event-action = <EV_ACT_ASSERTED>; 2210*833e5d42SEmmanuel Vadot wakeup-source; 2211*833e5d42SEmmanuel Vadot }; 2212*833e5d42SEmmanuel Vadot 2213*833e5d42SEmmanuel Vadot switch-lineout-detect { 2214*833e5d42SEmmanuel Vadot label = "Audio dock line-out detect"; 2215*833e5d42SEmmanuel Vadot gpios = <&gpio TEGRA_GPIO(X, 3) GPIO_ACTIVE_LOW>; 2216*833e5d42SEmmanuel Vadot linux,input-type = <EV_SW>; 2217*833e5d42SEmmanuel Vadot linux,code = <SW_LINEOUT_INSERT>; 2218*833e5d42SEmmanuel Vadot debounce-interval = <10>; 2219*833e5d42SEmmanuel Vadot wakeup-event-action = <EV_ACT_ASSERTED>; 2220*833e5d42SEmmanuel Vadot wakeup-source; 2221*833e5d42SEmmanuel Vadot }; 2222*833e5d42SEmmanuel Vadot }; 2223*833e5d42SEmmanuel Vadot 2224*833e5d42SEmmanuel Vadot gpio-keys { 2225*833e5d42SEmmanuel Vadot compatible = "gpio-keys"; 2226*833e5d42SEmmanuel Vadot 2227*833e5d42SEmmanuel Vadot key-power { 2228*833e5d42SEmmanuel Vadot label = "Power"; 2229*833e5d42SEmmanuel Vadot gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; 2230*833e5d42SEmmanuel Vadot linux,code = <KEY_POWER>; 2231*833e5d42SEmmanuel Vadot debounce-interval = <10>; 2232*833e5d42SEmmanuel Vadot wakeup-event-action = <EV_ACT_ASSERTED>; 2233*833e5d42SEmmanuel Vadot wakeup-source; 2234*833e5d42SEmmanuel Vadot }; 2235*833e5d42SEmmanuel Vadot 2236*833e5d42SEmmanuel Vadot key-volume-down { 2237*833e5d42SEmmanuel Vadot label = "Volume Down"; 2238*833e5d42SEmmanuel Vadot gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>; 2239*833e5d42SEmmanuel Vadot linux,code = <KEY_VOLUMEDOWN>; 2240*833e5d42SEmmanuel Vadot debounce-interval = <10>; 2241*833e5d42SEmmanuel Vadot wakeup-event-action = <EV_ACT_ASSERTED>; 2242*833e5d42SEmmanuel Vadot wakeup-source; 2243*833e5d42SEmmanuel Vadot }; 2244*833e5d42SEmmanuel Vadot 2245*833e5d42SEmmanuel Vadot key-volume-up { 2246*833e5d42SEmmanuel Vadot label = "Volume Up"; 2247*833e5d42SEmmanuel Vadot gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>; 2248*833e5d42SEmmanuel Vadot linux,code = <KEY_VOLUMEUP>; 2249*833e5d42SEmmanuel Vadot debounce-interval = <10>; 2250*833e5d42SEmmanuel Vadot wakeup-event-action = <EV_ACT_ASSERTED>; 2251*833e5d42SEmmanuel Vadot wakeup-source; 2252*833e5d42SEmmanuel Vadot }; 2253*833e5d42SEmmanuel Vadot }; 2254*833e5d42SEmmanuel Vadot 2255*833e5d42SEmmanuel Vadot haptic-feedback { 2256*833e5d42SEmmanuel Vadot compatible = "gpio-vibrator"; 2257*833e5d42SEmmanuel Vadot enable-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; 2258*833e5d42SEmmanuel Vadot vcc-supply = <&vdd_3v3_sys>; 2259*833e5d42SEmmanuel Vadot }; 2260*833e5d42SEmmanuel Vadot 2261*833e5d42SEmmanuel Vadot opp-table-actmon { 2262*833e5d42SEmmanuel Vadot /delete-node/ opp-800000000; 2263*833e5d42SEmmanuel Vadot /delete-node/ opp-900000000; 2264*833e5d42SEmmanuel Vadot }; 2265*833e5d42SEmmanuel Vadot 2266*833e5d42SEmmanuel Vadot opp-table-emc { 2267*833e5d42SEmmanuel Vadot /delete-node/ opp-800000000-1300; 2268*833e5d42SEmmanuel Vadot /delete-node/ opp-900000000-1350; 2269*833e5d42SEmmanuel Vadot }; 2270*833e5d42SEmmanuel Vadot 2271*833e5d42SEmmanuel Vadot brcm_wifi_pwrseq: pwrseq-wifi { 2272*833e5d42SEmmanuel Vadot compatible = "mmc-pwrseq-simple"; 2273*833e5d42SEmmanuel Vadot 2274*833e5d42SEmmanuel Vadot clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>; 2275*833e5d42SEmmanuel Vadot clock-names = "ext_clock"; 2276*833e5d42SEmmanuel Vadot 2277*833e5d42SEmmanuel Vadot reset-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>; 2278*833e5d42SEmmanuel Vadot post-power-on-delay-ms = <300>; 2279*833e5d42SEmmanuel Vadot power-off-delay-us = <300>; 2280*833e5d42SEmmanuel Vadot }; 2281*833e5d42SEmmanuel Vadot 2282*833e5d42SEmmanuel Vadot vdd_5v0_bat: regulator-bat { 2283*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 2284*833e5d42SEmmanuel Vadot regulator-name = "vdd_ac_bat"; 2285*833e5d42SEmmanuel Vadot regulator-min-microvolt = <5000000>; 2286*833e5d42SEmmanuel Vadot regulator-max-microvolt = <5000000>; 2287*833e5d42SEmmanuel Vadot regulator-always-on; 2288*833e5d42SEmmanuel Vadot regulator-boot-on; 2289*833e5d42SEmmanuel Vadot }; 2290*833e5d42SEmmanuel Vadot 2291*833e5d42SEmmanuel Vadot vdd_5v0_cp: regulator-sby { 2292*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 2293*833e5d42SEmmanuel Vadot regulator-name = "vdd_5v0_sby"; 2294*833e5d42SEmmanuel Vadot regulator-min-microvolt = <5000000>; 2295*833e5d42SEmmanuel Vadot regulator-max-microvolt = <5000000>; 2296*833e5d42SEmmanuel Vadot regulator-always-on; 2297*833e5d42SEmmanuel Vadot regulator-boot-on; 2298*833e5d42SEmmanuel Vadot gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; 2299*833e5d42SEmmanuel Vadot enable-active-high; 2300*833e5d42SEmmanuel Vadot vin-supply = <&vdd_5v0_bat>; 2301*833e5d42SEmmanuel Vadot }; 2302*833e5d42SEmmanuel Vadot 2303*833e5d42SEmmanuel Vadot vdd_5v0_sys: regulator-5v { 2304*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 2305*833e5d42SEmmanuel Vadot regulator-name = "vdd_5v0_sys"; 2306*833e5d42SEmmanuel Vadot regulator-min-microvolt = <5000000>; 2307*833e5d42SEmmanuel Vadot regulator-max-microvolt = <5000000>; 2308*833e5d42SEmmanuel Vadot regulator-always-on; 2309*833e5d42SEmmanuel Vadot regulator-boot-on; 2310*833e5d42SEmmanuel Vadot gpio = <&pmic 8 GPIO_ACTIVE_HIGH>; 2311*833e5d42SEmmanuel Vadot enable-active-high; 2312*833e5d42SEmmanuel Vadot vin-supply = <&vdd_5v0_bat>; 2313*833e5d42SEmmanuel Vadot }; 2314*833e5d42SEmmanuel Vadot 2315*833e5d42SEmmanuel Vadot vdd_1v5_ddr: regulator-ddr { 2316*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 2317*833e5d42SEmmanuel Vadot regulator-name = "vdd_ddr"; 2318*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1500000>; 2319*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1500000>; 2320*833e5d42SEmmanuel Vadot regulator-always-on; 2321*833e5d42SEmmanuel Vadot regulator-boot-on; 2322*833e5d42SEmmanuel Vadot gpio = <&pmic 7 GPIO_ACTIVE_HIGH>; 2323*833e5d42SEmmanuel Vadot enable-active-high; 2324*833e5d42SEmmanuel Vadot vin-supply = <&vdd_5v0_bat>; 2325*833e5d42SEmmanuel Vadot }; 2326*833e5d42SEmmanuel Vadot 2327*833e5d42SEmmanuel Vadot vdd_3v3_sys: regulator-3v { 2328*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 2329*833e5d42SEmmanuel Vadot regulator-name = "vdd_3v3_sys"; 2330*833e5d42SEmmanuel Vadot regulator-min-microvolt = <3300000>; 2331*833e5d42SEmmanuel Vadot regulator-max-microvolt = <3300000>; 2332*833e5d42SEmmanuel Vadot regulator-always-on; 2333*833e5d42SEmmanuel Vadot regulator-boot-on; 2334*833e5d42SEmmanuel Vadot gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; 2335*833e5d42SEmmanuel Vadot enable-active-high; 2336*833e5d42SEmmanuel Vadot vin-supply = <&vdd_5v0_bat>; 2337*833e5d42SEmmanuel Vadot }; 2338*833e5d42SEmmanuel Vadot 2339*833e5d42SEmmanuel Vadot vdd_3v3_com: regulator-com { 2340*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 2341*833e5d42SEmmanuel Vadot regulator-name = "vdd_3v3_com"; 2342*833e5d42SEmmanuel Vadot regulator-min-microvolt = <3300000>; 2343*833e5d42SEmmanuel Vadot regulator-max-microvolt = <3300000>; 2344*833e5d42SEmmanuel Vadot regulator-always-on; 2345*833e5d42SEmmanuel Vadot gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; 2346*833e5d42SEmmanuel Vadot enable-active-high; 2347*833e5d42SEmmanuel Vadot vin-supply = <&vdd_3v3_sys>; 2348*833e5d42SEmmanuel Vadot }; 2349*833e5d42SEmmanuel Vadot 2350*833e5d42SEmmanuel Vadot vdd_3v3_als: regulator-als { 2351*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 2352*833e5d42SEmmanuel Vadot regulator-name = "vdd_3v3_als"; 2353*833e5d42SEmmanuel Vadot regulator-min-microvolt = <3300000>; 2354*833e5d42SEmmanuel Vadot regulator-max-microvolt = <3300000>; 2355*833e5d42SEmmanuel Vadot regulator-always-on; 2356*833e5d42SEmmanuel Vadot gpio = <&gpio TEGRA_GPIO(L, 5) GPIO_ACTIVE_HIGH>; 2357*833e5d42SEmmanuel Vadot enable-active-high; 2358*833e5d42SEmmanuel Vadot vin-supply = <&vdd_3v3_sys>; 2359*833e5d42SEmmanuel Vadot }; 2360*833e5d42SEmmanuel Vadot 2361*833e5d42SEmmanuel Vadot vdd_5v0_bl: regulator-bl { 2362*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 2363*833e5d42SEmmanuel Vadot regulator-name = "vdd_5v0_bl"; 2364*833e5d42SEmmanuel Vadot regulator-min-microvolt = <5000000>; 2365*833e5d42SEmmanuel Vadot regulator-max-microvolt = <5000000>; 2366*833e5d42SEmmanuel Vadot regulator-boot-on; 2367*833e5d42SEmmanuel Vadot gpio = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>; 2368*833e5d42SEmmanuel Vadot enable-active-high; 2369*833e5d42SEmmanuel Vadot vin-supply = <&vdd_5v0_bat>; 2370*833e5d42SEmmanuel Vadot }; 2371*833e5d42SEmmanuel Vadot 2372*833e5d42SEmmanuel Vadot hdmi_5v0_sys: regulator-hdmi { 2373*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 2374*833e5d42SEmmanuel Vadot regulator-name = "hdmi_5v0_sys"; 2375*833e5d42SEmmanuel Vadot regulator-min-microvolt = <5000000>; 2376*833e5d42SEmmanuel Vadot regulator-max-microvolt = <5000000>; 2377*833e5d42SEmmanuel Vadot gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; 2378*833e5d42SEmmanuel Vadot enable-active-high; 2379*833e5d42SEmmanuel Vadot vin-supply = <&vdd_5v0_sys>; 2380*833e5d42SEmmanuel Vadot }; 2381*833e5d42SEmmanuel Vadot 2382*833e5d42SEmmanuel Vadot sound { 2383*833e5d42SEmmanuel Vadot compatible = "asus,tegra-audio-rt5640-tf600t", 2384*833e5d42SEmmanuel Vadot "nvidia,tegra-audio-rt5640"; 2385*833e5d42SEmmanuel Vadot nvidia,model = "Asus VivoTab RT TF600T RT5640"; 2386*833e5d42SEmmanuel Vadot 2387*833e5d42SEmmanuel Vadot nvidia,audio-routing = 2388*833e5d42SEmmanuel Vadot "Headphones", "HPOR", 2389*833e5d42SEmmanuel Vadot "Headphones", "HPOL", 2390*833e5d42SEmmanuel Vadot "Speakers", "SPORP", 2391*833e5d42SEmmanuel Vadot "Speakers", "SPORN", 2392*833e5d42SEmmanuel Vadot "Speakers", "SPOLP", 2393*833e5d42SEmmanuel Vadot "Speakers", "SPOLN", 2394*833e5d42SEmmanuel Vadot "DMIC1", "Mic Jack"; 2395*833e5d42SEmmanuel Vadot 2396*833e5d42SEmmanuel Vadot nvidia,i2s-controller = <&tegra_i2s1>; 2397*833e5d42SEmmanuel Vadot nvidia,audio-codec = <&rt5640>; 2398*833e5d42SEmmanuel Vadot 2399*833e5d42SEmmanuel Vadot nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; 2400*833e5d42SEmmanuel Vadot nvidia,mic-det-gpios = <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_LOW>; 2401*833e5d42SEmmanuel Vadot nvidia,coupled-mic-hp-det; 2402*833e5d42SEmmanuel Vadot 2403*833e5d42SEmmanuel Vadot clocks = <&tegra_car TEGRA30_CLK_PLL_A>, 2404*833e5d42SEmmanuel Vadot <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 2405*833e5d42SEmmanuel Vadot <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 2406*833e5d42SEmmanuel Vadot clock-names = "pll_a", "pll_a_out0", "mclk"; 2407*833e5d42SEmmanuel Vadot 2408*833e5d42SEmmanuel Vadot assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>, 2409*833e5d42SEmmanuel Vadot <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 2410*833e5d42SEmmanuel Vadot 2411*833e5d42SEmmanuel Vadot assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 2412*833e5d42SEmmanuel Vadot <&tegra_car TEGRA30_CLK_EXTERN1>; 2413*833e5d42SEmmanuel Vadot }; 2414*833e5d42SEmmanuel Vadot 2415*833e5d42SEmmanuel Vadot thermal-zones { 2416*833e5d42SEmmanuel Vadot /* 2417*833e5d42SEmmanuel Vadot * NCT72 has two sensors: 2418*833e5d42SEmmanuel Vadot * 2419*833e5d42SEmmanuel Vadot * 0: internal that monitors ambient/skin temperature 2420*833e5d42SEmmanuel Vadot * 1: external that is connected to the CPU's diode 2421*833e5d42SEmmanuel Vadot * 2422*833e5d42SEmmanuel Vadot * Ideally we should use userspace thermal governor, 2423*833e5d42SEmmanuel Vadot * but it's a much more complex solution. The "skin" 2424*833e5d42SEmmanuel Vadot * zone exists as a simpler solution which prevents 2425*833e5d42SEmmanuel Vadot * Transformers from getting too hot from a user's 2426*833e5d42SEmmanuel Vadot * tactile perspective. The CPU zone is intended to 2427*833e5d42SEmmanuel Vadot * protect silicon from damage. 2428*833e5d42SEmmanuel Vadot */ 2429*833e5d42SEmmanuel Vadot 2430*833e5d42SEmmanuel Vadot skin-thermal { 2431*833e5d42SEmmanuel Vadot polling-delay-passive = <1000>; /* milliseconds */ 2432*833e5d42SEmmanuel Vadot polling-delay = <5000>; /* milliseconds */ 2433*833e5d42SEmmanuel Vadot 2434*833e5d42SEmmanuel Vadot thermal-sensors = <&nct72 0>; 2435*833e5d42SEmmanuel Vadot 2436*833e5d42SEmmanuel Vadot trips { 2437*833e5d42SEmmanuel Vadot trip0: skin-alert { 2438*833e5d42SEmmanuel Vadot /* throttle at 57C until temperature drops to 56.8C */ 2439*833e5d42SEmmanuel Vadot temperature = <57000>; 2440*833e5d42SEmmanuel Vadot hysteresis = <200>; 2441*833e5d42SEmmanuel Vadot type = "passive"; 2442*833e5d42SEmmanuel Vadot }; 2443*833e5d42SEmmanuel Vadot 2444*833e5d42SEmmanuel Vadot trip1: skin-crit { 2445*833e5d42SEmmanuel Vadot /* shut down at 65C */ 2446*833e5d42SEmmanuel Vadot temperature = <65000>; 2447*833e5d42SEmmanuel Vadot hysteresis = <2000>; 2448*833e5d42SEmmanuel Vadot type = "critical"; 2449*833e5d42SEmmanuel Vadot }; 2450*833e5d42SEmmanuel Vadot }; 2451*833e5d42SEmmanuel Vadot 2452*833e5d42SEmmanuel Vadot cooling-maps { 2453*833e5d42SEmmanuel Vadot map0 { 2454*833e5d42SEmmanuel Vadot trip = <&trip0>; 2455*833e5d42SEmmanuel Vadot cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2456*833e5d42SEmmanuel Vadot <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2457*833e5d42SEmmanuel Vadot <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2458*833e5d42SEmmanuel Vadot <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2459*833e5d42SEmmanuel Vadot <&actmon THERMAL_NO_LIMIT 2460*833e5d42SEmmanuel Vadot THERMAL_NO_LIMIT>; 2461*833e5d42SEmmanuel Vadot }; 2462*833e5d42SEmmanuel Vadot }; 2463*833e5d42SEmmanuel Vadot }; 2464*833e5d42SEmmanuel Vadot 2465*833e5d42SEmmanuel Vadot cpu-thermal { 2466*833e5d42SEmmanuel Vadot polling-delay-passive = <1000>; /* milliseconds */ 2467*833e5d42SEmmanuel Vadot polling-delay = <5000>; /* milliseconds */ 2468*833e5d42SEmmanuel Vadot 2469*833e5d42SEmmanuel Vadot thermal-sensors = <&nct72 1>; 2470*833e5d42SEmmanuel Vadot 2471*833e5d42SEmmanuel Vadot trips { 2472*833e5d42SEmmanuel Vadot trip2: cpu-alert { 2473*833e5d42SEmmanuel Vadot /* throttle at 75C until temperature drops to 74.8C */ 2474*833e5d42SEmmanuel Vadot temperature = <75000>; 2475*833e5d42SEmmanuel Vadot hysteresis = <200>; 2476*833e5d42SEmmanuel Vadot type = "passive"; 2477*833e5d42SEmmanuel Vadot }; 2478*833e5d42SEmmanuel Vadot 2479*833e5d42SEmmanuel Vadot trip3: cpu-crit { 2480*833e5d42SEmmanuel Vadot /* shut down at 90C */ 2481*833e5d42SEmmanuel Vadot temperature = <90000>; 2482*833e5d42SEmmanuel Vadot hysteresis = <2000>; 2483*833e5d42SEmmanuel Vadot type = "critical"; 2484*833e5d42SEmmanuel Vadot }; 2485*833e5d42SEmmanuel Vadot }; 2486*833e5d42SEmmanuel Vadot 2487*833e5d42SEmmanuel Vadot cooling-maps { 2488*833e5d42SEmmanuel Vadot map1 { 2489*833e5d42SEmmanuel Vadot trip = <&trip2>; 2490*833e5d42SEmmanuel Vadot cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2491*833e5d42SEmmanuel Vadot <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2492*833e5d42SEmmanuel Vadot <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2493*833e5d42SEmmanuel Vadot <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2494*833e5d42SEmmanuel Vadot <&actmon THERMAL_NO_LIMIT 2495*833e5d42SEmmanuel Vadot THERMAL_NO_LIMIT>; 2496*833e5d42SEmmanuel Vadot }; 2497*833e5d42SEmmanuel Vadot }; 2498*833e5d42SEmmanuel Vadot }; 2499*833e5d42SEmmanuel Vadot }; 2500*833e5d42SEmmanuel Vadot}; 2501