1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC 4*f126890aSEmmanuel Vadot * 5*f126890aSEmmanuel Vadot * Copyright (C) 2014 Microchip 6*f126890aSEmmanuel Vadot * Alexandre Belloni <alexandre.belloni@free-electrons.com> 7*f126890aSEmmanuel Vadot */ 8*f126890aSEmmanuel Vadot 9*f126890aSEmmanuel Vadot#include <dt-bindings/pinctrl/at91.h> 10*f126890aSEmmanuel Vadot#include <dt-bindings/clock/at91.h> 11*f126890aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/irq.h> 12*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 13*f126890aSEmmanuel Vadot#include <dt-bindings/pwm/pwm.h> 14*f126890aSEmmanuel Vadot#include <dt-bindings/mfd/at91-usart.h> 15*f126890aSEmmanuel Vadot 16*f126890aSEmmanuel Vadot/ { 17*f126890aSEmmanuel Vadot #address-cells = <1>; 18*f126890aSEmmanuel Vadot #size-cells = <1>; 19*f126890aSEmmanuel Vadot model = "Atmel AT91SAM9RL family SoC"; 20*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9rl", "atmel,at91sam9"; 21*f126890aSEmmanuel Vadot interrupt-parent = <&aic>; 22*f126890aSEmmanuel Vadot 23*f126890aSEmmanuel Vadot aliases { 24*f126890aSEmmanuel Vadot serial0 = &dbgu; 25*f126890aSEmmanuel Vadot serial1 = &usart0; 26*f126890aSEmmanuel Vadot serial2 = &usart1; 27*f126890aSEmmanuel Vadot serial3 = &usart2; 28*f126890aSEmmanuel Vadot serial4 = &usart3; 29*f126890aSEmmanuel Vadot gpio0 = &pioA; 30*f126890aSEmmanuel Vadot gpio1 = &pioB; 31*f126890aSEmmanuel Vadot gpio2 = &pioC; 32*f126890aSEmmanuel Vadot gpio3 = &pioD; 33*f126890aSEmmanuel Vadot tcb0 = &tcb0; 34*f126890aSEmmanuel Vadot i2c0 = &i2c0; 35*f126890aSEmmanuel Vadot i2c1 = &i2c1; 36*f126890aSEmmanuel Vadot ssc0 = &ssc0; 37*f126890aSEmmanuel Vadot ssc1 = &ssc1; 38*f126890aSEmmanuel Vadot pwm0 = &pwm0; 39*f126890aSEmmanuel Vadot }; 40*f126890aSEmmanuel Vadot 41*f126890aSEmmanuel Vadot cpus { 42*f126890aSEmmanuel Vadot #address-cells = <1>; 43*f126890aSEmmanuel Vadot #size-cells = <0>; 44*f126890aSEmmanuel Vadot 45*f126890aSEmmanuel Vadot cpu@0 { 46*f126890aSEmmanuel Vadot compatible = "arm,arm926ej-s"; 47*f126890aSEmmanuel Vadot device_type = "cpu"; 48*f126890aSEmmanuel Vadot reg = <0>; 49*f126890aSEmmanuel Vadot }; 50*f126890aSEmmanuel Vadot }; 51*f126890aSEmmanuel Vadot 52*f126890aSEmmanuel Vadot memory@20000000 { 53*f126890aSEmmanuel Vadot device_type = "memory"; 54*f126890aSEmmanuel Vadot reg = <0x20000000 0x04000000>; 55*f126890aSEmmanuel Vadot }; 56*f126890aSEmmanuel Vadot 57*f126890aSEmmanuel Vadot clocks { 58*f126890aSEmmanuel Vadot slow_xtal: slow_xtal { 59*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 60*f126890aSEmmanuel Vadot #clock-cells = <0>; 61*f126890aSEmmanuel Vadot clock-frequency = <0>; 62*f126890aSEmmanuel Vadot }; 63*f126890aSEmmanuel Vadot 64*f126890aSEmmanuel Vadot main_xtal: main_xtal { 65*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 66*f126890aSEmmanuel Vadot #clock-cells = <0>; 67*f126890aSEmmanuel Vadot clock-frequency = <0>; 68*f126890aSEmmanuel Vadot }; 69*f126890aSEmmanuel Vadot 70*f126890aSEmmanuel Vadot adc_op_clk: adc_op_clk{ 71*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 72*f126890aSEmmanuel Vadot #clock-cells = <0>; 73*f126890aSEmmanuel Vadot clock-frequency = <1000000>; 74*f126890aSEmmanuel Vadot }; 75*f126890aSEmmanuel Vadot }; 76*f126890aSEmmanuel Vadot 77*f126890aSEmmanuel Vadot sram: sram@300000 { 78*f126890aSEmmanuel Vadot compatible = "mmio-sram"; 79*f126890aSEmmanuel Vadot reg = <0x00300000 0x10000>; 80*f126890aSEmmanuel Vadot #address-cells = <1>; 81*f126890aSEmmanuel Vadot #size-cells = <1>; 82*f126890aSEmmanuel Vadot ranges = <0 0x00300000 0x10000>; 83*f126890aSEmmanuel Vadot }; 84*f126890aSEmmanuel Vadot 85*f126890aSEmmanuel Vadot ahb { 86*f126890aSEmmanuel Vadot compatible = "simple-bus"; 87*f126890aSEmmanuel Vadot #address-cells = <1>; 88*f126890aSEmmanuel Vadot #size-cells = <1>; 89*f126890aSEmmanuel Vadot ranges; 90*f126890aSEmmanuel Vadot 91*f126890aSEmmanuel Vadot fb0: fb@500000 { 92*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9rl-lcdc"; 93*f126890aSEmmanuel Vadot reg = <0x00500000 0x1000>; 94*f126890aSEmmanuel Vadot interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; 95*f126890aSEmmanuel Vadot pinctrl-names = "default"; 96*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_fb>; 97*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>; 98*f126890aSEmmanuel Vadot clock-names = "hclk", "lcdc_clk"; 99*f126890aSEmmanuel Vadot status = "disabled"; 100*f126890aSEmmanuel Vadot }; 101*f126890aSEmmanuel Vadot 102*f126890aSEmmanuel Vadot ebi: ebi@10000000 { 103*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9rl-ebi"; 104*f126890aSEmmanuel Vadot #address-cells = <2>; 105*f126890aSEmmanuel Vadot #size-cells = <1>; 106*f126890aSEmmanuel Vadot atmel,smc = <&smc>; 107*f126890aSEmmanuel Vadot atmel,matrix = <&matrix>; 108*f126890aSEmmanuel Vadot reg = <0x10000000 0x80000000>; 109*f126890aSEmmanuel Vadot ranges = <0x0 0x0 0x10000000 0x10000000 110*f126890aSEmmanuel Vadot 0x1 0x0 0x20000000 0x10000000 111*f126890aSEmmanuel Vadot 0x2 0x0 0x30000000 0x10000000 112*f126890aSEmmanuel Vadot 0x3 0x0 0x40000000 0x10000000 113*f126890aSEmmanuel Vadot 0x4 0x0 0x50000000 0x10000000 114*f126890aSEmmanuel Vadot 0x5 0x0 0x60000000 0x10000000>; 115*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 116*f126890aSEmmanuel Vadot status = "disabled"; 117*f126890aSEmmanuel Vadot 118*f126890aSEmmanuel Vadot nand_controller: nand-controller { 119*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9g45-nand-controller"; 120*f126890aSEmmanuel Vadot #address-cells = <2>; 121*f126890aSEmmanuel Vadot #size-cells = <1>; 122*f126890aSEmmanuel Vadot ranges; 123*f126890aSEmmanuel Vadot status = "disabled"; 124*f126890aSEmmanuel Vadot }; 125*f126890aSEmmanuel Vadot }; 126*f126890aSEmmanuel Vadot 127*f126890aSEmmanuel Vadot apb { 128*f126890aSEmmanuel Vadot compatible = "simple-bus"; 129*f126890aSEmmanuel Vadot #address-cells = <1>; 130*f126890aSEmmanuel Vadot #size-cells = <1>; 131*f126890aSEmmanuel Vadot ranges; 132*f126890aSEmmanuel Vadot 133*f126890aSEmmanuel Vadot tcb0: timer@fffa0000 { 134*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 135*f126890aSEmmanuel Vadot #address-cells = <1>; 136*f126890aSEmmanuel Vadot #size-cells = <0>; 137*f126890aSEmmanuel Vadot reg = <0xfffa0000 0x100>; 138*f126890aSEmmanuel Vadot interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>, 139*f126890aSEmmanuel Vadot <17 IRQ_TYPE_LEVEL_HIGH 0>, 140*f126890aSEmmanuel Vadot <18 IRQ_TYPE_LEVEL_HIGH 0>; 141*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; 142*f126890aSEmmanuel Vadot clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 143*f126890aSEmmanuel Vadot }; 144*f126890aSEmmanuel Vadot 145*f126890aSEmmanuel Vadot mmc0: mmc@fffa4000 { 146*f126890aSEmmanuel Vadot compatible = "atmel,hsmci"; 147*f126890aSEmmanuel Vadot reg = <0xfffa4000 0x600>; 148*f126890aSEmmanuel Vadot interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; 149*f126890aSEmmanuel Vadot #address-cells = <1>; 150*f126890aSEmmanuel Vadot #size-cells = <0>; 151*f126890aSEmmanuel Vadot pinctrl-names = "default"; 152*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 153*f126890aSEmmanuel Vadot clock-names = "mci_clk"; 154*f126890aSEmmanuel Vadot status = "disabled"; 155*f126890aSEmmanuel Vadot }; 156*f126890aSEmmanuel Vadot 157*f126890aSEmmanuel Vadot i2c0: i2c@fffa8000 { 158*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-i2c"; 159*f126890aSEmmanuel Vadot reg = <0xfffa8000 0x100>; 160*f126890aSEmmanuel Vadot interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; 161*f126890aSEmmanuel Vadot #address-cells = <1>; 162*f126890aSEmmanuel Vadot #size-cells = <0>; 163*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; 164*f126890aSEmmanuel Vadot status = "disabled"; 165*f126890aSEmmanuel Vadot }; 166*f126890aSEmmanuel Vadot 167*f126890aSEmmanuel Vadot i2c1: i2c@fffac000 { 168*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-i2c"; 169*f126890aSEmmanuel Vadot reg = <0xfffac000 0x100>; 170*f126890aSEmmanuel Vadot interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; 171*f126890aSEmmanuel Vadot #address-cells = <1>; 172*f126890aSEmmanuel Vadot #size-cells = <0>; 173*f126890aSEmmanuel Vadot status = "disabled"; 174*f126890aSEmmanuel Vadot }; 175*f126890aSEmmanuel Vadot 176*f126890aSEmmanuel Vadot usart0: serial@fffb0000 { 177*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-usart"; 178*f126890aSEmmanuel Vadot reg = <0xfffb0000 0x200>; 179*f126890aSEmmanuel Vadot atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 180*f126890aSEmmanuel Vadot interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 181*f126890aSEmmanuel Vadot atmel,use-dma-rx; 182*f126890aSEmmanuel Vadot atmel,use-dma-tx; 183*f126890aSEmmanuel Vadot pinctrl-names = "default"; 184*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usart0>; 185*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 186*f126890aSEmmanuel Vadot clock-names = "usart"; 187*f126890aSEmmanuel Vadot status = "disabled"; 188*f126890aSEmmanuel Vadot }; 189*f126890aSEmmanuel Vadot 190*f126890aSEmmanuel Vadot usart1: serial@fffb4000 { 191*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-usart"; 192*f126890aSEmmanuel Vadot reg = <0xfffb4000 0x200>; 193*f126890aSEmmanuel Vadot atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 194*f126890aSEmmanuel Vadot interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 195*f126890aSEmmanuel Vadot atmel,use-dma-rx; 196*f126890aSEmmanuel Vadot atmel,use-dma-tx; 197*f126890aSEmmanuel Vadot pinctrl-names = "default"; 198*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usart1>; 199*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 200*f126890aSEmmanuel Vadot clock-names = "usart"; 201*f126890aSEmmanuel Vadot status = "disabled"; 202*f126890aSEmmanuel Vadot }; 203*f126890aSEmmanuel Vadot 204*f126890aSEmmanuel Vadot usart2: serial@fffb8000 { 205*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-usart"; 206*f126890aSEmmanuel Vadot reg = <0xfffb8000 0x200>; 207*f126890aSEmmanuel Vadot atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 208*f126890aSEmmanuel Vadot interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 209*f126890aSEmmanuel Vadot atmel,use-dma-rx; 210*f126890aSEmmanuel Vadot atmel,use-dma-tx; 211*f126890aSEmmanuel Vadot pinctrl-names = "default"; 212*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usart2>; 213*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 214*f126890aSEmmanuel Vadot clock-names = "usart"; 215*f126890aSEmmanuel Vadot status = "disabled"; 216*f126890aSEmmanuel Vadot }; 217*f126890aSEmmanuel Vadot 218*f126890aSEmmanuel Vadot usart3: serial@fffbc000 { 219*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-usart"; 220*f126890aSEmmanuel Vadot reg = <0xfffbc000 0x200>; 221*f126890aSEmmanuel Vadot atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 222*f126890aSEmmanuel Vadot interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; 223*f126890aSEmmanuel Vadot atmel,use-dma-rx; 224*f126890aSEmmanuel Vadot atmel,use-dma-tx; 225*f126890aSEmmanuel Vadot pinctrl-names = "default"; 226*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usart3>; 227*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 228*f126890aSEmmanuel Vadot clock-names = "usart"; 229*f126890aSEmmanuel Vadot status = "disabled"; 230*f126890aSEmmanuel Vadot }; 231*f126890aSEmmanuel Vadot 232*f126890aSEmmanuel Vadot ssc0: ssc@fffc0000 { 233*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9rl-ssc"; 234*f126890aSEmmanuel Vadot reg = <0xfffc0000 0x4000>; 235*f126890aSEmmanuel Vadot interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 236*f126890aSEmmanuel Vadot pinctrl-names = "default"; 237*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 238*f126890aSEmmanuel Vadot status = "disabled"; 239*f126890aSEmmanuel Vadot }; 240*f126890aSEmmanuel Vadot 241*f126890aSEmmanuel Vadot ssc1: ssc@fffc4000 { 242*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9rl-ssc"; 243*f126890aSEmmanuel Vadot reg = <0xfffc4000 0x4000>; 244*f126890aSEmmanuel Vadot interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 245*f126890aSEmmanuel Vadot pinctrl-names = "default"; 246*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 247*f126890aSEmmanuel Vadot status = "disabled"; 248*f126890aSEmmanuel Vadot }; 249*f126890aSEmmanuel Vadot 250*f126890aSEmmanuel Vadot pwm0: pwm@fffc8000 { 251*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9rl-pwm"; 252*f126890aSEmmanuel Vadot reg = <0xfffc8000 0x300>; 253*f126890aSEmmanuel Vadot interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; 254*f126890aSEmmanuel Vadot #pwm-cells = <3>; 255*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 256*f126890aSEmmanuel Vadot clock-names = "pwm_clk"; 257*f126890aSEmmanuel Vadot status = "disabled"; 258*f126890aSEmmanuel Vadot }; 259*f126890aSEmmanuel Vadot 260*f126890aSEmmanuel Vadot spi0: spi@fffcc000 { 261*f126890aSEmmanuel Vadot #address-cells = <1>; 262*f126890aSEmmanuel Vadot #size-cells = <0>; 263*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-spi"; 264*f126890aSEmmanuel Vadot reg = <0xfffcc000 0x200>; 265*f126890aSEmmanuel Vadot interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; 266*f126890aSEmmanuel Vadot pinctrl-names = "default"; 267*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_spi0>; 268*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 269*f126890aSEmmanuel Vadot clock-names = "spi_clk"; 270*f126890aSEmmanuel Vadot status = "disabled"; 271*f126890aSEmmanuel Vadot }; 272*f126890aSEmmanuel Vadot 273*f126890aSEmmanuel Vadot adc0: adc@fffd0000 { 274*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9rl-adc"; 275*f126890aSEmmanuel Vadot reg = <0xfffd0000 0x100>; 276*f126890aSEmmanuel Vadot interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 277*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>; 278*f126890aSEmmanuel Vadot clock-names = "adc_clk", "adc_op_clk"; 279*f126890aSEmmanuel Vadot atmel,adc-use-external-triggers; 280*f126890aSEmmanuel Vadot atmel,adc-channels-used = <0x3f>; 281*f126890aSEmmanuel Vadot atmel,adc-vref = <3300>; 282*f126890aSEmmanuel Vadot atmel,adc-startup-time = <40>; 283*f126890aSEmmanuel Vadot }; 284*f126890aSEmmanuel Vadot 285*f126890aSEmmanuel Vadot usb0: gadget@fffd4000 { 286*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9rl-udc"; 287*f126890aSEmmanuel Vadot reg = <0x00600000 0x100000>, 288*f126890aSEmmanuel Vadot <0xfffd4000 0x4000>; 289*f126890aSEmmanuel Vadot interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 290*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>; 291*f126890aSEmmanuel Vadot clock-names = "pclk", "hclk"; 292*f126890aSEmmanuel Vadot status = "disabled"; 293*f126890aSEmmanuel Vadot }; 294*f126890aSEmmanuel Vadot 295*f126890aSEmmanuel Vadot dma0: dma-controller@ffffe600 { 296*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9rl-dma"; 297*f126890aSEmmanuel Vadot reg = <0xffffe600 0x200>; 298*f126890aSEmmanuel Vadot interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; 299*f126890aSEmmanuel Vadot #dma-cells = <2>; 300*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; 301*f126890aSEmmanuel Vadot clock-names = "dma_clk"; 302*f126890aSEmmanuel Vadot }; 303*f126890aSEmmanuel Vadot 304*f126890aSEmmanuel Vadot ramc0: ramc@ffffea00 { 305*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-sdramc"; 306*f126890aSEmmanuel Vadot reg = <0xffffea00 0x200>; 307*f126890aSEmmanuel Vadot }; 308*f126890aSEmmanuel Vadot 309*f126890aSEmmanuel Vadot smc: smc@ffffec00 { 310*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-smc", "syscon"; 311*f126890aSEmmanuel Vadot reg = <0xffffec00 0x200>; 312*f126890aSEmmanuel Vadot }; 313*f126890aSEmmanuel Vadot 314*f126890aSEmmanuel Vadot matrix: matrix@ffffee00 { 315*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9rl-matrix", "syscon"; 316*f126890aSEmmanuel Vadot reg = <0xffffee00 0x200>; 317*f126890aSEmmanuel Vadot }; 318*f126890aSEmmanuel Vadot 319*f126890aSEmmanuel Vadot aic: interrupt-controller@fffff000 { 320*f126890aSEmmanuel Vadot #interrupt-cells = <3>; 321*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-aic"; 322*f126890aSEmmanuel Vadot interrupt-controller; 323*f126890aSEmmanuel Vadot reg = <0xfffff000 0x200>; 324*f126890aSEmmanuel Vadot atmel,external-irqs = <31>; 325*f126890aSEmmanuel Vadot }; 326*f126890aSEmmanuel Vadot 327*f126890aSEmmanuel Vadot dbgu: serial@fffff200 { 328*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 329*f126890aSEmmanuel Vadot reg = <0xfffff200 0x200>; 330*f126890aSEmmanuel Vadot atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 331*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 332*f126890aSEmmanuel Vadot pinctrl-names = "default"; 333*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_dbgu>; 334*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 335*f126890aSEmmanuel Vadot clock-names = "usart"; 336*f126890aSEmmanuel Vadot status = "disabled"; 337*f126890aSEmmanuel Vadot }; 338*f126890aSEmmanuel Vadot 339*f126890aSEmmanuel Vadot pinctrl@fffff400 { 340*f126890aSEmmanuel Vadot #address-cells = <1>; 341*f126890aSEmmanuel Vadot #size-cells = <1>; 342*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 343*f126890aSEmmanuel Vadot ranges = <0xfffff400 0xfffff400 0x800>; 344*f126890aSEmmanuel Vadot 345*f126890aSEmmanuel Vadot atmel,mux-mask = 346*f126890aSEmmanuel Vadot /* A B */ 347*f126890aSEmmanuel Vadot <0xffffffff 0xe05c6738>, /* pioA */ 348*f126890aSEmmanuel Vadot <0xffffffff 0x0000c780>, /* pioB */ 349*f126890aSEmmanuel Vadot <0xffffffff 0xe3ffff0e>, /* pioC */ 350*f126890aSEmmanuel Vadot <0x003fffff 0x0001ff3c>; /* pioD */ 351*f126890aSEmmanuel Vadot 352*f126890aSEmmanuel Vadot /* shared pinctrl settings */ 353*f126890aSEmmanuel Vadot adc0 { 354*f126890aSEmmanuel Vadot pinctrl_adc0_ts: adc0_ts-0 { 355*f126890aSEmmanuel Vadot atmel,pins = 356*f126890aSEmmanuel Vadot <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, 357*f126890aSEmmanuel Vadot <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, 358*f126890aSEmmanuel Vadot <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, 359*f126890aSEmmanuel Vadot <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; 360*f126890aSEmmanuel Vadot }; 361*f126890aSEmmanuel Vadot 362*f126890aSEmmanuel Vadot pinctrl_adc0_ad0: adc0_ad0-0 { 363*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; 364*f126890aSEmmanuel Vadot }; 365*f126890aSEmmanuel Vadot 366*f126890aSEmmanuel Vadot pinctrl_adc0_ad1: adc0_ad1-0 { 367*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 368*f126890aSEmmanuel Vadot }; 369*f126890aSEmmanuel Vadot 370*f126890aSEmmanuel Vadot pinctrl_adc0_ad2: adc0_ad2-0 { 371*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; 372*f126890aSEmmanuel Vadot }; 373*f126890aSEmmanuel Vadot 374*f126890aSEmmanuel Vadot pinctrl_adc0_ad3: adc0_ad3-0 { 375*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; 376*f126890aSEmmanuel Vadot }; 377*f126890aSEmmanuel Vadot 378*f126890aSEmmanuel Vadot pinctrl_adc0_ad4: adc0_ad4-0 { 379*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; 380*f126890aSEmmanuel Vadot }; 381*f126890aSEmmanuel Vadot 382*f126890aSEmmanuel Vadot pinctrl_adc0_ad5: adc0_ad5-0 { 383*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; 384*f126890aSEmmanuel Vadot }; 385*f126890aSEmmanuel Vadot 386*f126890aSEmmanuel Vadot pinctrl_adc0_adtrg: adc0_adtrg-0 { 387*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 388*f126890aSEmmanuel Vadot }; 389*f126890aSEmmanuel Vadot }; 390*f126890aSEmmanuel Vadot 391*f126890aSEmmanuel Vadot dbgu { 392*f126890aSEmmanuel Vadot pinctrl_dbgu: dbgu-0 { 393*f126890aSEmmanuel Vadot atmel,pins = 394*f126890aSEmmanuel Vadot <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 395*f126890aSEmmanuel Vadot <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; 396*f126890aSEmmanuel Vadot }; 397*f126890aSEmmanuel Vadot }; 398*f126890aSEmmanuel Vadot 399*f126890aSEmmanuel Vadot ebi { 400*f126890aSEmmanuel Vadot pinctrl_ebi_addr_nand: ebi-addr-0 { 401*f126890aSEmmanuel Vadot atmel,pins = 402*f126890aSEmmanuel Vadot <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, 403*f126890aSEmmanuel Vadot <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; 404*f126890aSEmmanuel Vadot }; 405*f126890aSEmmanuel Vadot }; 406*f126890aSEmmanuel Vadot 407*f126890aSEmmanuel Vadot fb { 408*f126890aSEmmanuel Vadot pinctrl_fb: fb-0 { 409*f126890aSEmmanuel Vadot atmel,pins = 410*f126890aSEmmanuel Vadot <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>, 411*f126890aSEmmanuel Vadot <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, 412*f126890aSEmmanuel Vadot <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>, 413*f126890aSEmmanuel Vadot <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, 414*f126890aSEmmanuel Vadot <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, 415*f126890aSEmmanuel Vadot <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, 416*f126890aSEmmanuel Vadot <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, 417*f126890aSEmmanuel Vadot <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>, 418*f126890aSEmmanuel Vadot <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>, 419*f126890aSEmmanuel Vadot <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, 420*f126890aSEmmanuel Vadot <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>, 421*f126890aSEmmanuel Vadot <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>, 422*f126890aSEmmanuel Vadot <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, 423*f126890aSEmmanuel Vadot <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, 424*f126890aSEmmanuel Vadot <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>, 425*f126890aSEmmanuel Vadot <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, 426*f126890aSEmmanuel Vadot <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, 427*f126890aSEmmanuel Vadot <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>, 428*f126890aSEmmanuel Vadot <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, 429*f126890aSEmmanuel Vadot <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, 430*f126890aSEmmanuel Vadot <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; 431*f126890aSEmmanuel Vadot }; 432*f126890aSEmmanuel Vadot }; 433*f126890aSEmmanuel Vadot 434*f126890aSEmmanuel Vadot i2c_gpio0 { 435*f126890aSEmmanuel Vadot pinctrl_i2c_gpio0: i2c_gpio0-0 { 436*f126890aSEmmanuel Vadot atmel,pins = 437*f126890aSEmmanuel Vadot <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, 438*f126890aSEmmanuel Vadot <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; 439*f126890aSEmmanuel Vadot }; 440*f126890aSEmmanuel Vadot }; 441*f126890aSEmmanuel Vadot 442*f126890aSEmmanuel Vadot i2c_gpio1 { 443*f126890aSEmmanuel Vadot pinctrl_i2c_gpio1: i2c_gpio1-0 { 444*f126890aSEmmanuel Vadot atmel,pins = 445*f126890aSEmmanuel Vadot <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, 446*f126890aSEmmanuel Vadot <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; 447*f126890aSEmmanuel Vadot }; 448*f126890aSEmmanuel Vadot }; 449*f126890aSEmmanuel Vadot 450*f126890aSEmmanuel Vadot mmc0 { 451*f126890aSEmmanuel Vadot pinctrl_mmc0_clk: mmc0_clk-0 { 452*f126890aSEmmanuel Vadot atmel,pins = 453*f126890aSEmmanuel Vadot <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; 454*f126890aSEmmanuel Vadot }; 455*f126890aSEmmanuel Vadot 456*f126890aSEmmanuel Vadot pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 457*f126890aSEmmanuel Vadot atmel,pins = 458*f126890aSEmmanuel Vadot <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 459*f126890aSEmmanuel Vadot <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 460*f126890aSEmmanuel Vadot }; 461*f126890aSEmmanuel Vadot 462*f126890aSEmmanuel Vadot pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 463*f126890aSEmmanuel Vadot atmel,pins = 464*f126890aSEmmanuel Vadot <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 465*f126890aSEmmanuel Vadot <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 466*f126890aSEmmanuel Vadot <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 467*f126890aSEmmanuel Vadot }; 468*f126890aSEmmanuel Vadot }; 469*f126890aSEmmanuel Vadot 470*f126890aSEmmanuel Vadot nand { 471*f126890aSEmmanuel Vadot pinctrl_nand_rb: nand-rb-0 { 472*f126890aSEmmanuel Vadot atmel,pins = 473*f126890aSEmmanuel Vadot <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 474*f126890aSEmmanuel Vadot }; 475*f126890aSEmmanuel Vadot 476*f126890aSEmmanuel Vadot pinctrl_nand_cs: nand-cs-0 { 477*f126890aSEmmanuel Vadot atmel,pins = 478*f126890aSEmmanuel Vadot <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 479*f126890aSEmmanuel Vadot }; 480*f126890aSEmmanuel Vadot 481*f126890aSEmmanuel Vadot pinctrl_nand_oe_we: nand-oe-we-0 { 482*f126890aSEmmanuel Vadot atmel,pins = 483*f126890aSEmmanuel Vadot <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>, 484*f126890aSEmmanuel Vadot <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; 485*f126890aSEmmanuel Vadot }; 486*f126890aSEmmanuel Vadot }; 487*f126890aSEmmanuel Vadot 488*f126890aSEmmanuel Vadot pwm0 { 489*f126890aSEmmanuel Vadot pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 { 490*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 491*f126890aSEmmanuel Vadot }; 492*f126890aSEmmanuel Vadot 493*f126890aSEmmanuel Vadot pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 { 494*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 495*f126890aSEmmanuel Vadot }; 496*f126890aSEmmanuel Vadot 497*f126890aSEmmanuel Vadot pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 { 498*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; 499*f126890aSEmmanuel Vadot }; 500*f126890aSEmmanuel Vadot 501*f126890aSEmmanuel Vadot pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 { 502*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 503*f126890aSEmmanuel Vadot }; 504*f126890aSEmmanuel Vadot 505*f126890aSEmmanuel Vadot pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 { 506*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 507*f126890aSEmmanuel Vadot }; 508*f126890aSEmmanuel Vadot 509*f126890aSEmmanuel Vadot pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 { 510*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; 511*f126890aSEmmanuel Vadot }; 512*f126890aSEmmanuel Vadot 513*f126890aSEmmanuel Vadot pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 { 514*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; 515*f126890aSEmmanuel Vadot }; 516*f126890aSEmmanuel Vadot 517*f126890aSEmmanuel Vadot pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 { 518*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; 519*f126890aSEmmanuel Vadot }; 520*f126890aSEmmanuel Vadot 521*f126890aSEmmanuel Vadot pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 { 522*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; 523*f126890aSEmmanuel Vadot }; 524*f126890aSEmmanuel Vadot 525*f126890aSEmmanuel Vadot pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 { 526*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 527*f126890aSEmmanuel Vadot }; 528*f126890aSEmmanuel Vadot 529*f126890aSEmmanuel Vadot pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 { 530*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 531*f126890aSEmmanuel Vadot }; 532*f126890aSEmmanuel Vadot }; 533*f126890aSEmmanuel Vadot 534*f126890aSEmmanuel Vadot spi0 { 535*f126890aSEmmanuel Vadot pinctrl_spi0: spi0-0 { 536*f126890aSEmmanuel Vadot atmel,pins = 537*f126890aSEmmanuel Vadot <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, 538*f126890aSEmmanuel Vadot <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>, 539*f126890aSEmmanuel Vadot <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 540*f126890aSEmmanuel Vadot }; 541*f126890aSEmmanuel Vadot }; 542*f126890aSEmmanuel Vadot 543*f126890aSEmmanuel Vadot ssc0 { 544*f126890aSEmmanuel Vadot pinctrl_ssc0_tx: ssc0_tx-0 { 545*f126890aSEmmanuel Vadot atmel,pins = 546*f126890aSEmmanuel Vadot <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, 547*f126890aSEmmanuel Vadot <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, 548*f126890aSEmmanuel Vadot <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; 549*f126890aSEmmanuel Vadot }; 550*f126890aSEmmanuel Vadot 551*f126890aSEmmanuel Vadot pinctrl_ssc0_rx: ssc0_rx-0 { 552*f126890aSEmmanuel Vadot atmel,pins = 553*f126890aSEmmanuel Vadot <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, 554*f126890aSEmmanuel Vadot <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, 555*f126890aSEmmanuel Vadot <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; 556*f126890aSEmmanuel Vadot }; 557*f126890aSEmmanuel Vadot }; 558*f126890aSEmmanuel Vadot 559*f126890aSEmmanuel Vadot ssc1 { 560*f126890aSEmmanuel Vadot pinctrl_ssc1_tx: ssc1_tx-0 { 561*f126890aSEmmanuel Vadot atmel,pins = 562*f126890aSEmmanuel Vadot <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, 563*f126890aSEmmanuel Vadot <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, 564*f126890aSEmmanuel Vadot <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; 565*f126890aSEmmanuel Vadot }; 566*f126890aSEmmanuel Vadot 567*f126890aSEmmanuel Vadot pinctrl_ssc1_rx: ssc1_rx-0 { 568*f126890aSEmmanuel Vadot atmel,pins = 569*f126890aSEmmanuel Vadot <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>, 570*f126890aSEmmanuel Vadot <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, 571*f126890aSEmmanuel Vadot <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; 572*f126890aSEmmanuel Vadot }; 573*f126890aSEmmanuel Vadot }; 574*f126890aSEmmanuel Vadot 575*f126890aSEmmanuel Vadot tcb0 { 576*f126890aSEmmanuel Vadot pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 577*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 578*f126890aSEmmanuel Vadot }; 579*f126890aSEmmanuel Vadot 580*f126890aSEmmanuel Vadot pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 581*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; 582*f126890aSEmmanuel Vadot }; 583*f126890aSEmmanuel Vadot 584*f126890aSEmmanuel Vadot pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 585*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; 586*f126890aSEmmanuel Vadot }; 587*f126890aSEmmanuel Vadot 588*f126890aSEmmanuel Vadot pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 589*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; 590*f126890aSEmmanuel Vadot }; 591*f126890aSEmmanuel Vadot 592*f126890aSEmmanuel Vadot pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 593*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; 594*f126890aSEmmanuel Vadot }; 595*f126890aSEmmanuel Vadot 596*f126890aSEmmanuel Vadot pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 597*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; 598*f126890aSEmmanuel Vadot }; 599*f126890aSEmmanuel Vadot 600*f126890aSEmmanuel Vadot pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 601*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; 602*f126890aSEmmanuel Vadot }; 603*f126890aSEmmanuel Vadot 604*f126890aSEmmanuel Vadot pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 605*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; 606*f126890aSEmmanuel Vadot }; 607*f126890aSEmmanuel Vadot 608*f126890aSEmmanuel Vadot pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 609*f126890aSEmmanuel Vadot atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; 610*f126890aSEmmanuel Vadot }; 611*f126890aSEmmanuel Vadot }; 612*f126890aSEmmanuel Vadot 613*f126890aSEmmanuel Vadot usart0 { 614*f126890aSEmmanuel Vadot pinctrl_usart0: usart0-0 { 615*f126890aSEmmanuel Vadot atmel,pins = 616*f126890aSEmmanuel Vadot <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 617*f126890aSEmmanuel Vadot <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 618*f126890aSEmmanuel Vadot }; 619*f126890aSEmmanuel Vadot 620*f126890aSEmmanuel Vadot pinctrl_usart0_rts: usart0_rts-0 { 621*f126890aSEmmanuel Vadot atmel,pins = 622*f126890aSEmmanuel Vadot <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; 623*f126890aSEmmanuel Vadot }; 624*f126890aSEmmanuel Vadot 625*f126890aSEmmanuel Vadot pinctrl_usart0_cts: usart0_cts-0 { 626*f126890aSEmmanuel Vadot atmel,pins = 627*f126890aSEmmanuel Vadot <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; 628*f126890aSEmmanuel Vadot }; 629*f126890aSEmmanuel Vadot 630*f126890aSEmmanuel Vadot pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { 631*f126890aSEmmanuel Vadot atmel,pins = 632*f126890aSEmmanuel Vadot <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>, 633*f126890aSEmmanuel Vadot <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 634*f126890aSEmmanuel Vadot }; 635*f126890aSEmmanuel Vadot 636*f126890aSEmmanuel Vadot pinctrl_usart0_dcd: usart0_dcd-0 { 637*f126890aSEmmanuel Vadot atmel,pins = 638*f126890aSEmmanuel Vadot <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; 639*f126890aSEmmanuel Vadot }; 640*f126890aSEmmanuel Vadot 641*f126890aSEmmanuel Vadot pinctrl_usart0_ri: usart0_ri-0 { 642*f126890aSEmmanuel Vadot atmel,pins = 643*f126890aSEmmanuel Vadot <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; 644*f126890aSEmmanuel Vadot }; 645*f126890aSEmmanuel Vadot 646*f126890aSEmmanuel Vadot pinctrl_usart0_sck: usart0_sck-0 { 647*f126890aSEmmanuel Vadot atmel,pins = 648*f126890aSEmmanuel Vadot <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; 649*f126890aSEmmanuel Vadot }; 650*f126890aSEmmanuel Vadot }; 651*f126890aSEmmanuel Vadot 652*f126890aSEmmanuel Vadot usart1 { 653*f126890aSEmmanuel Vadot pinctrl_usart1: usart1-0 { 654*f126890aSEmmanuel Vadot atmel,pins = 655*f126890aSEmmanuel Vadot <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 656*f126890aSEmmanuel Vadot <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 657*f126890aSEmmanuel Vadot }; 658*f126890aSEmmanuel Vadot 659*f126890aSEmmanuel Vadot pinctrl_usart1_rts: usart1_rts-0 { 660*f126890aSEmmanuel Vadot atmel,pins = 661*f126890aSEmmanuel Vadot <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 662*f126890aSEmmanuel Vadot }; 663*f126890aSEmmanuel Vadot 664*f126890aSEmmanuel Vadot pinctrl_usart1_cts: usart1_cts-0 { 665*f126890aSEmmanuel Vadot atmel,pins = 666*f126890aSEmmanuel Vadot <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 667*f126890aSEmmanuel Vadot }; 668*f126890aSEmmanuel Vadot 669*f126890aSEmmanuel Vadot pinctrl_usart1_sck: usart1_sck-0 { 670*f126890aSEmmanuel Vadot atmel,pins = 671*f126890aSEmmanuel Vadot <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 672*f126890aSEmmanuel Vadot }; 673*f126890aSEmmanuel Vadot }; 674*f126890aSEmmanuel Vadot 675*f126890aSEmmanuel Vadot usart2 { 676*f126890aSEmmanuel Vadot pinctrl_usart2: usart2-0 { 677*f126890aSEmmanuel Vadot atmel,pins = 678*f126890aSEmmanuel Vadot <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 679*f126890aSEmmanuel Vadot <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 680*f126890aSEmmanuel Vadot }; 681*f126890aSEmmanuel Vadot 682*f126890aSEmmanuel Vadot pinctrl_usart2_rts: usart2_rts-0 { 683*f126890aSEmmanuel Vadot atmel,pins = 684*f126890aSEmmanuel Vadot <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 685*f126890aSEmmanuel Vadot }; 686*f126890aSEmmanuel Vadot 687*f126890aSEmmanuel Vadot pinctrl_usart2_cts: usart2_cts-0 { 688*f126890aSEmmanuel Vadot atmel,pins = 689*f126890aSEmmanuel Vadot <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; 690*f126890aSEmmanuel Vadot }; 691*f126890aSEmmanuel Vadot 692*f126890aSEmmanuel Vadot pinctrl_usart2_sck: usart2_sck-0 { 693*f126890aSEmmanuel Vadot atmel,pins = 694*f126890aSEmmanuel Vadot <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; 695*f126890aSEmmanuel Vadot }; 696*f126890aSEmmanuel Vadot }; 697*f126890aSEmmanuel Vadot 698*f126890aSEmmanuel Vadot usart3 { 699*f126890aSEmmanuel Vadot pinctrl_usart3: usart3-0 { 700*f126890aSEmmanuel Vadot atmel,pins = 701*f126890aSEmmanuel Vadot <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 702*f126890aSEmmanuel Vadot <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 703*f126890aSEmmanuel Vadot }; 704*f126890aSEmmanuel Vadot 705*f126890aSEmmanuel Vadot pinctrl_usart3_rts: usart3_rts-0 { 706*f126890aSEmmanuel Vadot atmel,pins = 707*f126890aSEmmanuel Vadot <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; 708*f126890aSEmmanuel Vadot }; 709*f126890aSEmmanuel Vadot 710*f126890aSEmmanuel Vadot pinctrl_usart3_cts: usart3_cts-0 { 711*f126890aSEmmanuel Vadot atmel,pins = 712*f126890aSEmmanuel Vadot <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 713*f126890aSEmmanuel Vadot }; 714*f126890aSEmmanuel Vadot 715*f126890aSEmmanuel Vadot pinctrl_usart3_sck: usart3_sck-0 { 716*f126890aSEmmanuel Vadot atmel,pins = 717*f126890aSEmmanuel Vadot <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; 718*f126890aSEmmanuel Vadot }; 719*f126890aSEmmanuel Vadot }; 720*f126890aSEmmanuel Vadot 721*f126890aSEmmanuel Vadot pioA: gpio@fffff400 { 722*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-gpio"; 723*f126890aSEmmanuel Vadot reg = <0xfffff400 0x200>; 724*f126890aSEmmanuel Vadot interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 725*f126890aSEmmanuel Vadot #gpio-cells = <2>; 726*f126890aSEmmanuel Vadot gpio-controller; 727*f126890aSEmmanuel Vadot interrupt-controller; 728*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 729*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 730*f126890aSEmmanuel Vadot }; 731*f126890aSEmmanuel Vadot 732*f126890aSEmmanuel Vadot pioB: gpio@fffff600 { 733*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-gpio"; 734*f126890aSEmmanuel Vadot reg = <0xfffff600 0x200>; 735*f126890aSEmmanuel Vadot interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 736*f126890aSEmmanuel Vadot #gpio-cells = <2>; 737*f126890aSEmmanuel Vadot gpio-controller; 738*f126890aSEmmanuel Vadot interrupt-controller; 739*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 740*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; 741*f126890aSEmmanuel Vadot }; 742*f126890aSEmmanuel Vadot 743*f126890aSEmmanuel Vadot pioC: gpio@fffff800 { 744*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-gpio"; 745*f126890aSEmmanuel Vadot reg = <0xfffff800 0x200>; 746*f126890aSEmmanuel Vadot interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 747*f126890aSEmmanuel Vadot #gpio-cells = <2>; 748*f126890aSEmmanuel Vadot gpio-controller; 749*f126890aSEmmanuel Vadot interrupt-controller; 750*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 751*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 752*f126890aSEmmanuel Vadot }; 753*f126890aSEmmanuel Vadot 754*f126890aSEmmanuel Vadot pioD: gpio@fffffa00 { 755*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-gpio"; 756*f126890aSEmmanuel Vadot reg = <0xfffffa00 0x200>; 757*f126890aSEmmanuel Vadot interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; 758*f126890aSEmmanuel Vadot #gpio-cells = <2>; 759*f126890aSEmmanuel Vadot gpio-controller; 760*f126890aSEmmanuel Vadot interrupt-controller; 761*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 762*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 763*f126890aSEmmanuel Vadot }; 764*f126890aSEmmanuel Vadot }; 765*f126890aSEmmanuel Vadot 766*f126890aSEmmanuel Vadot pmc: clock-controller@fffffc00 { 767*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9rl-pmc", "syscon"; 768*f126890aSEmmanuel Vadot reg = <0xfffffc00 0x100>; 769*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 770*f126890aSEmmanuel Vadot #clock-cells = <2>; 771*f126890aSEmmanuel Vadot clocks = <&clk32k>, <&main_xtal>; 772*f126890aSEmmanuel Vadot clock-names = "slow_clk", "main_xtal"; 773*f126890aSEmmanuel Vadot }; 774*f126890aSEmmanuel Vadot 775*f126890aSEmmanuel Vadot reset-controller@fffffd00 { 776*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-rstc"; 777*f126890aSEmmanuel Vadot reg = <0xfffffd00 0x10>; 778*f126890aSEmmanuel Vadot clocks = <&clk32k>; 779*f126890aSEmmanuel Vadot }; 780*f126890aSEmmanuel Vadot 781*f126890aSEmmanuel Vadot poweroff@fffffd10 { 782*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-shdwc"; 783*f126890aSEmmanuel Vadot reg = <0xfffffd10 0x10>; 784*f126890aSEmmanuel Vadot clocks = <&clk32k>; 785*f126890aSEmmanuel Vadot }; 786*f126890aSEmmanuel Vadot 787*f126890aSEmmanuel Vadot pit: timer@fffffd30 { 788*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-pit"; 789*f126890aSEmmanuel Vadot reg = <0xfffffd30 0xf>; 790*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 791*f126890aSEmmanuel Vadot clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 792*f126890aSEmmanuel Vadot }; 793*f126890aSEmmanuel Vadot 794*f126890aSEmmanuel Vadot watchdog@fffffd40 { 795*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-wdt"; 796*f126890aSEmmanuel Vadot reg = <0xfffffd40 0x10>; 797*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 798*f126890aSEmmanuel Vadot clocks = <&clk32k>; 799*f126890aSEmmanuel Vadot status = "disabled"; 800*f126890aSEmmanuel Vadot }; 801*f126890aSEmmanuel Vadot 802*f126890aSEmmanuel Vadot clk32k: clock-controller@fffffd50 { 803*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9x5-sckc"; 804*f126890aSEmmanuel Vadot reg = <0xfffffd50 0x4>; 805*f126890aSEmmanuel Vadot clocks = <&slow_xtal>; 806*f126890aSEmmanuel Vadot #clock-cells = <0>; 807*f126890aSEmmanuel Vadot }; 808*f126890aSEmmanuel Vadot 809*f126890aSEmmanuel Vadot rtc@fffffd20 { 810*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-rtt"; 811*f126890aSEmmanuel Vadot reg = <0xfffffd20 0x10>; 812*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 813*f126890aSEmmanuel Vadot clocks = <&clk32k>; 814*f126890aSEmmanuel Vadot status = "disabled"; 815*f126890aSEmmanuel Vadot }; 816*f126890aSEmmanuel Vadot 817*f126890aSEmmanuel Vadot gpbr: syscon@fffffd60 { 818*f126890aSEmmanuel Vadot compatible = "atmel,at91sam9260-gpbr", "syscon"; 819*f126890aSEmmanuel Vadot reg = <0xfffffd60 0x10>; 820*f126890aSEmmanuel Vadot status = "disabled"; 821*f126890aSEmmanuel Vadot }; 822*f126890aSEmmanuel Vadot 823*f126890aSEmmanuel Vadot rtc@fffffe00 { 824*f126890aSEmmanuel Vadot compatible = "atmel,at91rm9200-rtc"; 825*f126890aSEmmanuel Vadot reg = <0xfffffe00 0x40>; 826*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 827*f126890aSEmmanuel Vadot clocks = <&clk32k>; 828*f126890aSEmmanuel Vadot status = "disabled"; 829*f126890aSEmmanuel Vadot }; 830*f126890aSEmmanuel Vadot 831*f126890aSEmmanuel Vadot }; 832*f126890aSEmmanuel Vadot }; 833*f126890aSEmmanuel Vadot 834*f126890aSEmmanuel Vadot i2c-gpio-0 { 835*f126890aSEmmanuel Vadot compatible = "i2c-gpio"; 836*f126890aSEmmanuel Vadot gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */ 837*f126890aSEmmanuel Vadot <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */ 838*f126890aSEmmanuel Vadot i2c-gpio,sda-open-drain; 839*f126890aSEmmanuel Vadot i2c-gpio,scl-open-drain; 840*f126890aSEmmanuel Vadot i2c-gpio,delay-us = <2>; /* ~100 kHz */ 841*f126890aSEmmanuel Vadot #address-cells = <1>; 842*f126890aSEmmanuel Vadot #size-cells = <0>; 843*f126890aSEmmanuel Vadot pinctrl-names = "default"; 844*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c_gpio0>; 845*f126890aSEmmanuel Vadot status = "disabled"; 846*f126890aSEmmanuel Vadot }; 847*f126890aSEmmanuel Vadot 848*f126890aSEmmanuel Vadot i2c-gpio-1 { 849*f126890aSEmmanuel Vadot compatible = "i2c-gpio"; 850*f126890aSEmmanuel Vadot gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */ 851*f126890aSEmmanuel Vadot <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */ 852*f126890aSEmmanuel Vadot i2c-gpio,sda-open-drain; 853*f126890aSEmmanuel Vadot i2c-gpio,scl-open-drain; 854*f126890aSEmmanuel Vadot i2c-gpio,delay-us = <2>; /* ~100 kHz */ 855*f126890aSEmmanuel Vadot #address-cells = <1>; 856*f126890aSEmmanuel Vadot #size-cells = <0>; 857*f126890aSEmmanuel Vadot pinctrl-names = "default"; 858*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c_gpio1>; 859*f126890aSEmmanuel Vadot status = "disabled"; 860*f126890aSEmmanuel Vadot }; 861*f126890aSEmmanuel Vadot}; 862