xref: /freebsd/sys/contrib/device-tree/src/arm/microchip/at91sam9263.dtsi (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-only
2*f126890aSEmmanuel Vadot/*
3*f126890aSEmmanuel Vadot * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
4*f126890aSEmmanuel Vadot *
5*f126890aSEmmanuel Vadot *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6*f126890aSEmmanuel Vadot */
7*f126890aSEmmanuel Vadot
8*f126890aSEmmanuel Vadot#include <dt-bindings/pinctrl/at91.h>
9*f126890aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/irq.h>
10*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h>
11*f126890aSEmmanuel Vadot#include <dt-bindings/clock/at91.h>
12*f126890aSEmmanuel Vadot#include <dt-bindings/mfd/at91-usart.h>
13*f126890aSEmmanuel Vadot
14*f126890aSEmmanuel Vadot/ {
15*f126890aSEmmanuel Vadot	#address-cells = <1>;
16*f126890aSEmmanuel Vadot	#size-cells = <1>;
17*f126890aSEmmanuel Vadot	model = "Atmel AT91SAM9263 family SoC";
18*f126890aSEmmanuel Vadot	compatible = "atmel,at91sam9263";
19*f126890aSEmmanuel Vadot	interrupt-parent = <&aic>;
20*f126890aSEmmanuel Vadot
21*f126890aSEmmanuel Vadot	aliases {
22*f126890aSEmmanuel Vadot		serial0 = &dbgu;
23*f126890aSEmmanuel Vadot		serial1 = &usart0;
24*f126890aSEmmanuel Vadot		serial2 = &usart1;
25*f126890aSEmmanuel Vadot		serial3 = &usart2;
26*f126890aSEmmanuel Vadot		gpio0 = &pioA;
27*f126890aSEmmanuel Vadot		gpio1 = &pioB;
28*f126890aSEmmanuel Vadot		gpio2 = &pioC;
29*f126890aSEmmanuel Vadot		gpio3 = &pioD;
30*f126890aSEmmanuel Vadot		gpio4 = &pioE;
31*f126890aSEmmanuel Vadot		tcb0 = &tcb0;
32*f126890aSEmmanuel Vadot		i2c0 = &i2c0;
33*f126890aSEmmanuel Vadot		ssc0 = &ssc0;
34*f126890aSEmmanuel Vadot		ssc1 = &ssc1;
35*f126890aSEmmanuel Vadot		pwm0 = &pwm0;
36*f126890aSEmmanuel Vadot	};
37*f126890aSEmmanuel Vadot
38*f126890aSEmmanuel Vadot	cpus {
39*f126890aSEmmanuel Vadot		#address-cells = <1>;
40*f126890aSEmmanuel Vadot		#size-cells = <0>;
41*f126890aSEmmanuel Vadot
42*f126890aSEmmanuel Vadot		cpu@0 {
43*f126890aSEmmanuel Vadot			compatible = "arm,arm926ej-s";
44*f126890aSEmmanuel Vadot			device_type = "cpu";
45*f126890aSEmmanuel Vadot			reg = <0>;
46*f126890aSEmmanuel Vadot		};
47*f126890aSEmmanuel Vadot	};
48*f126890aSEmmanuel Vadot
49*f126890aSEmmanuel Vadot	memory@20000000 {
50*f126890aSEmmanuel Vadot		device_type = "memory";
51*f126890aSEmmanuel Vadot		reg = <0x20000000 0x08000000>;
52*f126890aSEmmanuel Vadot	};
53*f126890aSEmmanuel Vadot
54*f126890aSEmmanuel Vadot	clocks {
55*f126890aSEmmanuel Vadot		main_xtal: main_xtal {
56*f126890aSEmmanuel Vadot			compatible = "fixed-clock";
57*f126890aSEmmanuel Vadot			#clock-cells = <0>;
58*f126890aSEmmanuel Vadot			clock-frequency = <0>;
59*f126890aSEmmanuel Vadot		};
60*f126890aSEmmanuel Vadot
61*f126890aSEmmanuel Vadot		slow_xtal: slow_xtal {
62*f126890aSEmmanuel Vadot			compatible = "fixed-clock";
63*f126890aSEmmanuel Vadot			#clock-cells = <0>;
64*f126890aSEmmanuel Vadot			clock-frequency = <0>;
65*f126890aSEmmanuel Vadot		};
66*f126890aSEmmanuel Vadot	};
67*f126890aSEmmanuel Vadot
68*f126890aSEmmanuel Vadot	sram0: sram@300000 {
69*f126890aSEmmanuel Vadot		compatible = "mmio-sram";
70*f126890aSEmmanuel Vadot		reg = <0x00300000 0x14000>;
71*f126890aSEmmanuel Vadot		#address-cells = <1>;
72*f126890aSEmmanuel Vadot		#size-cells = <1>;
73*f126890aSEmmanuel Vadot		ranges = <0 0x00300000 0x14000>;
74*f126890aSEmmanuel Vadot	};
75*f126890aSEmmanuel Vadot
76*f126890aSEmmanuel Vadot	sram1: sram@500000 {
77*f126890aSEmmanuel Vadot		compatible = "mmio-sram";
78*f126890aSEmmanuel Vadot		reg = <0x00500000 0x4000>;
79*f126890aSEmmanuel Vadot		#address-cells = <1>;
80*f126890aSEmmanuel Vadot		#size-cells = <1>;
81*f126890aSEmmanuel Vadot		ranges = <0 0x00500000 0x4000>;
82*f126890aSEmmanuel Vadot	};
83*f126890aSEmmanuel Vadot
84*f126890aSEmmanuel Vadot	ahb {
85*f126890aSEmmanuel Vadot		compatible = "simple-bus";
86*f126890aSEmmanuel Vadot		#address-cells = <1>;
87*f126890aSEmmanuel Vadot		#size-cells = <1>;
88*f126890aSEmmanuel Vadot		ranges;
89*f126890aSEmmanuel Vadot
90*f126890aSEmmanuel Vadot		apb {
91*f126890aSEmmanuel Vadot			compatible = "simple-bus";
92*f126890aSEmmanuel Vadot			#address-cells = <1>;
93*f126890aSEmmanuel Vadot			#size-cells = <1>;
94*f126890aSEmmanuel Vadot			ranges;
95*f126890aSEmmanuel Vadot
96*f126890aSEmmanuel Vadot			aic: interrupt-controller@fffff000 {
97*f126890aSEmmanuel Vadot				#interrupt-cells = <3>;
98*f126890aSEmmanuel Vadot				compatible = "atmel,at91rm9200-aic";
99*f126890aSEmmanuel Vadot				interrupt-controller;
100*f126890aSEmmanuel Vadot				reg = <0xfffff000 0x200>;
101*f126890aSEmmanuel Vadot				atmel,external-irqs = <30 31>;
102*f126890aSEmmanuel Vadot			};
103*f126890aSEmmanuel Vadot
104*f126890aSEmmanuel Vadot			pmc: clock-controller@fffffc00 {
105*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9263-pmc", "syscon";
106*f126890aSEmmanuel Vadot				reg = <0xfffffc00 0x100>;
107*f126890aSEmmanuel Vadot				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
108*f126890aSEmmanuel Vadot				#clock-cells = <2>;
109*f126890aSEmmanuel Vadot				clocks = <&slow_xtal>, <&main_xtal>;
110*f126890aSEmmanuel Vadot				clock-names = "slow_xtal", "main_xtal";
111*f126890aSEmmanuel Vadot			};
112*f126890aSEmmanuel Vadot
113*f126890aSEmmanuel Vadot			ramc0: ramc@ffffe200 {
114*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-sdramc";
115*f126890aSEmmanuel Vadot				reg = <0xffffe200 0x200>;
116*f126890aSEmmanuel Vadot			};
117*f126890aSEmmanuel Vadot
118*f126890aSEmmanuel Vadot			smc0: smc@ffffe400 {
119*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-smc", "syscon";
120*f126890aSEmmanuel Vadot				reg = <0xffffe400 0x200>;
121*f126890aSEmmanuel Vadot			};
122*f126890aSEmmanuel Vadot
123*f126890aSEmmanuel Vadot			ramc1: ramc@ffffe800 {
124*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-sdramc";
125*f126890aSEmmanuel Vadot				reg = <0xffffe800 0x200>;
126*f126890aSEmmanuel Vadot			};
127*f126890aSEmmanuel Vadot
128*f126890aSEmmanuel Vadot			smc1: smc@ffffea00 {
129*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-smc", "syscon";
130*f126890aSEmmanuel Vadot				reg = <0xffffea00 0x200>;
131*f126890aSEmmanuel Vadot			};
132*f126890aSEmmanuel Vadot
133*f126890aSEmmanuel Vadot			matrix: matrix@ffffec00 {
134*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9263-matrix", "syscon";
135*f126890aSEmmanuel Vadot				reg = <0xffffec00 0x200>;
136*f126890aSEmmanuel Vadot			};
137*f126890aSEmmanuel Vadot
138*f126890aSEmmanuel Vadot			pit: timer@fffffd30 {
139*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-pit";
140*f126890aSEmmanuel Vadot				reg = <0xfffffd30 0xf>;
141*f126890aSEmmanuel Vadot				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
142*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
143*f126890aSEmmanuel Vadot			};
144*f126890aSEmmanuel Vadot
145*f126890aSEmmanuel Vadot			tcb0: timer@fff7c000 {
146*f126890aSEmmanuel Vadot				compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
147*f126890aSEmmanuel Vadot				#address-cells = <1>;
148*f126890aSEmmanuel Vadot				#size-cells = <0>;
149*f126890aSEmmanuel Vadot				reg = <0xfff7c000 0x100>;
150*f126890aSEmmanuel Vadot				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
151*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
152*f126890aSEmmanuel Vadot				clock-names = "t0_clk", "slow_clk";
153*f126890aSEmmanuel Vadot			};
154*f126890aSEmmanuel Vadot
155*f126890aSEmmanuel Vadot			reset-controller@fffffd00 {
156*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-rstc";
157*f126890aSEmmanuel Vadot				reg = <0xfffffd00 0x10>;
158*f126890aSEmmanuel Vadot				clocks = <&slow_xtal>;
159*f126890aSEmmanuel Vadot			};
160*f126890aSEmmanuel Vadot
161*f126890aSEmmanuel Vadot			poweroff@fffffd10 {
162*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-shdwc";
163*f126890aSEmmanuel Vadot				reg = <0xfffffd10 0x10>;
164*f126890aSEmmanuel Vadot				clocks = <&slow_xtal>;
165*f126890aSEmmanuel Vadot			};
166*f126890aSEmmanuel Vadot
167*f126890aSEmmanuel Vadot			pinctrl@fffff200 {
168*f126890aSEmmanuel Vadot				#address-cells = <1>;
169*f126890aSEmmanuel Vadot				#size-cells = <1>;
170*f126890aSEmmanuel Vadot				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
171*f126890aSEmmanuel Vadot				ranges = <0xfffff200 0xfffff200 0xa00>;
172*f126890aSEmmanuel Vadot
173*f126890aSEmmanuel Vadot				atmel,mux-mask = <
174*f126890aSEmmanuel Vadot				      /*    A         B     */
175*f126890aSEmmanuel Vadot				       0xfffffffb 0xffffe07f  /* pioA */
176*f126890aSEmmanuel Vadot				       0x0007ffff 0x39072fff  /* pioB */
177*f126890aSEmmanuel Vadot				       0xffffffff 0x3ffffff8  /* pioC */
178*f126890aSEmmanuel Vadot				       0xfffffbff 0xffffffff  /* pioD */
179*f126890aSEmmanuel Vadot				       0xffe00fff 0xfbfcff00  /* pioE */
180*f126890aSEmmanuel Vadot				      >;
181*f126890aSEmmanuel Vadot
182*f126890aSEmmanuel Vadot				/* shared pinctrl settings */
183*f126890aSEmmanuel Vadot				dbgu {
184*f126890aSEmmanuel Vadot					pinctrl_dbgu: dbgu-0 {
185*f126890aSEmmanuel Vadot						atmel,pins =
186*f126890aSEmmanuel Vadot							<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
187*f126890aSEmmanuel Vadot							 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
188*f126890aSEmmanuel Vadot					};
189*f126890aSEmmanuel Vadot				};
190*f126890aSEmmanuel Vadot
191*f126890aSEmmanuel Vadot				usart0 {
192*f126890aSEmmanuel Vadot					pinctrl_usart0: usart0-0 {
193*f126890aSEmmanuel Vadot						atmel,pins =
194*f126890aSEmmanuel Vadot							<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
195*f126890aSEmmanuel Vadot							 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
196*f126890aSEmmanuel Vadot					};
197*f126890aSEmmanuel Vadot
198*f126890aSEmmanuel Vadot					pinctrl_usart0_rts: usart0_rts-0 {
199*f126890aSEmmanuel Vadot						atmel,pins =
200*f126890aSEmmanuel Vadot							<AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA28 periph A */
201*f126890aSEmmanuel Vadot					};
202*f126890aSEmmanuel Vadot
203*f126890aSEmmanuel Vadot					pinctrl_usart0_cts: usart0_cts-0 {
204*f126890aSEmmanuel Vadot						atmel,pins =
205*f126890aSEmmanuel Vadot							<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA29 periph A */
206*f126890aSEmmanuel Vadot					};
207*f126890aSEmmanuel Vadot				};
208*f126890aSEmmanuel Vadot
209*f126890aSEmmanuel Vadot				usart1 {
210*f126890aSEmmanuel Vadot					pinctrl_usart1: usart1-0 {
211*f126890aSEmmanuel Vadot						atmel,pins =
212*f126890aSEmmanuel Vadot							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
213*f126890aSEmmanuel Vadot							 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
214*f126890aSEmmanuel Vadot					};
215*f126890aSEmmanuel Vadot
216*f126890aSEmmanuel Vadot					pinctrl_usart1_rts: usart1_rts-0 {
217*f126890aSEmmanuel Vadot						atmel,pins =
218*f126890aSEmmanuel Vadot							<AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD7 periph B */
219*f126890aSEmmanuel Vadot					};
220*f126890aSEmmanuel Vadot
221*f126890aSEmmanuel Vadot					pinctrl_usart1_cts: usart1_cts-0 {
222*f126890aSEmmanuel Vadot						atmel,pins =
223*f126890aSEmmanuel Vadot							<AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD8 periph B */
224*f126890aSEmmanuel Vadot					};
225*f126890aSEmmanuel Vadot				};
226*f126890aSEmmanuel Vadot
227*f126890aSEmmanuel Vadot				usart2 {
228*f126890aSEmmanuel Vadot					pinctrl_usart2: usart2-0 {
229*f126890aSEmmanuel Vadot						atmel,pins =
230*f126890aSEmmanuel Vadot							<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
231*f126890aSEmmanuel Vadot							 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
232*f126890aSEmmanuel Vadot					};
233*f126890aSEmmanuel Vadot
234*f126890aSEmmanuel Vadot					pinctrl_usart2_rts: usart2_rts-0 {
235*f126890aSEmmanuel Vadot						atmel,pins =
236*f126890aSEmmanuel Vadot							<AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD5 periph B */
237*f126890aSEmmanuel Vadot					};
238*f126890aSEmmanuel Vadot
239*f126890aSEmmanuel Vadot					pinctrl_usart2_cts: usart2_cts-0 {
240*f126890aSEmmanuel Vadot						atmel,pins =
241*f126890aSEmmanuel Vadot							<AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD6 periph B */
242*f126890aSEmmanuel Vadot					};
243*f126890aSEmmanuel Vadot				};
244*f126890aSEmmanuel Vadot
245*f126890aSEmmanuel Vadot				nand {
246*f126890aSEmmanuel Vadot					pinctrl_nand_rb: nand-rb-0 {
247*f126890aSEmmanuel Vadot						atmel,pins =
248*f126890aSEmmanuel Vadot							<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
249*f126890aSEmmanuel Vadot					};
250*f126890aSEmmanuel Vadot
251*f126890aSEmmanuel Vadot					pinctrl_nand_cs: nand-cs-0 {
252*f126890aSEmmanuel Vadot						atmel,pins =
253*f126890aSEmmanuel Vadot							 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
254*f126890aSEmmanuel Vadot					};
255*f126890aSEmmanuel Vadot				};
256*f126890aSEmmanuel Vadot
257*f126890aSEmmanuel Vadot				macb {
258*f126890aSEmmanuel Vadot					pinctrl_macb_rmii: macb_rmii-0 {
259*f126890aSEmmanuel Vadot						atmel,pins =
260*f126890aSEmmanuel Vadot							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC25 periph B */
261*f126890aSEmmanuel Vadot							 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE21 periph A */
262*f126890aSEmmanuel Vadot							 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE23 periph A */
263*f126890aSEmmanuel Vadot							 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE24 periph A */
264*f126890aSEmmanuel Vadot							 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE25 periph A */
265*f126890aSEmmanuel Vadot							 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE26 periph A */
266*f126890aSEmmanuel Vadot							 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE27 periph A */
267*f126890aSEmmanuel Vadot							 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE28 periph A */
268*f126890aSEmmanuel Vadot							 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE29 periph A */
269*f126890aSEmmanuel Vadot							 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PE30 periph A */
270*f126890aSEmmanuel Vadot					};
271*f126890aSEmmanuel Vadot
272*f126890aSEmmanuel Vadot					pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
273*f126890aSEmmanuel Vadot						atmel,pins =
274*f126890aSEmmanuel Vadot							<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC20 periph B */
275*f126890aSEmmanuel Vadot							 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC21 periph B */
276*f126890aSEmmanuel Vadot							 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC22 periph B */
277*f126890aSEmmanuel Vadot							 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC23 periph B */
278*f126890aSEmmanuel Vadot							 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC24 periph B */
279*f126890aSEmmanuel Vadot							 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC25 periph B */
280*f126890aSEmmanuel Vadot							 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC27 periph B */
281*f126890aSEmmanuel Vadot							 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PE22 periph B */
282*f126890aSEmmanuel Vadot					};
283*f126890aSEmmanuel Vadot				};
284*f126890aSEmmanuel Vadot
285*f126890aSEmmanuel Vadot				mmc0 {
286*f126890aSEmmanuel Vadot					pinctrl_mmc0_clk: mmc0_clk-0 {
287*f126890aSEmmanuel Vadot						atmel,pins =
288*f126890aSEmmanuel Vadot							<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA12 periph A */
289*f126890aSEmmanuel Vadot					};
290*f126890aSEmmanuel Vadot
291*f126890aSEmmanuel Vadot					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
292*f126890aSEmmanuel Vadot						atmel,pins =
293*f126890aSEmmanuel Vadot							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA1 periph A with pullup */
294*f126890aSEmmanuel Vadot							 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA0 periph A with pullup */
295*f126890aSEmmanuel Vadot					};
296*f126890aSEmmanuel Vadot
297*f126890aSEmmanuel Vadot					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
298*f126890aSEmmanuel Vadot						atmel,pins =
299*f126890aSEmmanuel Vadot							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA3 periph A with pullup */
300*f126890aSEmmanuel Vadot							 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA4 periph A with pullup */
301*f126890aSEmmanuel Vadot							 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA5 periph A with pullup */
302*f126890aSEmmanuel Vadot					};
303*f126890aSEmmanuel Vadot
304*f126890aSEmmanuel Vadot					pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
305*f126890aSEmmanuel Vadot						atmel,pins =
306*f126890aSEmmanuel Vadot							<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA16 periph A with pullup */
307*f126890aSEmmanuel Vadot							 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA17 periph A with pullup */
308*f126890aSEmmanuel Vadot					};
309*f126890aSEmmanuel Vadot
310*f126890aSEmmanuel Vadot					pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
311*f126890aSEmmanuel Vadot						atmel,pins =
312*f126890aSEmmanuel Vadot							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA18 periph A with pullup */
313*f126890aSEmmanuel Vadot							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA19 periph A with pullup */
314*f126890aSEmmanuel Vadot							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA20 periph A with pullup */
315*f126890aSEmmanuel Vadot					};
316*f126890aSEmmanuel Vadot				};
317*f126890aSEmmanuel Vadot
318*f126890aSEmmanuel Vadot				mmc1 {
319*f126890aSEmmanuel Vadot					pinctrl_mmc1_clk: mmc1_clk-0 {
320*f126890aSEmmanuel Vadot						atmel,pins =
321*f126890aSEmmanuel Vadot							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA6 periph A */
322*f126890aSEmmanuel Vadot					};
323*f126890aSEmmanuel Vadot
324*f126890aSEmmanuel Vadot					pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
325*f126890aSEmmanuel Vadot						atmel,pins =
326*f126890aSEmmanuel Vadot							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA7 periph A with pullup */
327*f126890aSEmmanuel Vadot							 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA8 periph A with pullup */
328*f126890aSEmmanuel Vadot					};
329*f126890aSEmmanuel Vadot
330*f126890aSEmmanuel Vadot					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
331*f126890aSEmmanuel Vadot						atmel,pins =
332*f126890aSEmmanuel Vadot							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA9 periph A with pullup */
333*f126890aSEmmanuel Vadot							 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA10 periph A with pullup */
334*f126890aSEmmanuel Vadot							 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA11 periph A with pullup */
335*f126890aSEmmanuel Vadot					};
336*f126890aSEmmanuel Vadot
337*f126890aSEmmanuel Vadot					pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
338*f126890aSEmmanuel Vadot						atmel,pins =
339*f126890aSEmmanuel Vadot							<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA21 periph A with pullup */
340*f126890aSEmmanuel Vadot							 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA22 periph A with pullup */
341*f126890aSEmmanuel Vadot					};
342*f126890aSEmmanuel Vadot
343*f126890aSEmmanuel Vadot					pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
344*f126890aSEmmanuel Vadot						atmel,pins =
345*f126890aSEmmanuel Vadot							<AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA23 periph A with pullup */
346*f126890aSEmmanuel Vadot							 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA24 periph A with pullup */
347*f126890aSEmmanuel Vadot							 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA25 periph A with pullup */
348*f126890aSEmmanuel Vadot					};
349*f126890aSEmmanuel Vadot				};
350*f126890aSEmmanuel Vadot
351*f126890aSEmmanuel Vadot				ssc0 {
352*f126890aSEmmanuel Vadot					pinctrl_ssc0_tx: ssc0_tx-0 {
353*f126890aSEmmanuel Vadot						atmel,pins =
354*f126890aSEmmanuel Vadot							<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB0 periph B */
355*f126890aSEmmanuel Vadot							 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB1 periph B */
356*f126890aSEmmanuel Vadot							 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB2 periph B */
357*f126890aSEmmanuel Vadot					};
358*f126890aSEmmanuel Vadot
359*f126890aSEmmanuel Vadot					pinctrl_ssc0_rx: ssc0_rx-0 {
360*f126890aSEmmanuel Vadot						atmel,pins =
361*f126890aSEmmanuel Vadot							<AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB3 periph B */
362*f126890aSEmmanuel Vadot							 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB4 periph B */
363*f126890aSEmmanuel Vadot							 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB5 periph B */
364*f126890aSEmmanuel Vadot					};
365*f126890aSEmmanuel Vadot				};
366*f126890aSEmmanuel Vadot
367*f126890aSEmmanuel Vadot				ssc1 {
368*f126890aSEmmanuel Vadot					pinctrl_ssc1_tx: ssc1_tx-0 {
369*f126890aSEmmanuel Vadot						atmel,pins =
370*f126890aSEmmanuel Vadot							<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB6 periph A */
371*f126890aSEmmanuel Vadot							 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB7 periph A */
372*f126890aSEmmanuel Vadot							 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB8 periph A */
373*f126890aSEmmanuel Vadot					};
374*f126890aSEmmanuel Vadot
375*f126890aSEmmanuel Vadot					pinctrl_ssc1_rx: ssc1_rx-0 {
376*f126890aSEmmanuel Vadot						atmel,pins =
377*f126890aSEmmanuel Vadot							<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB9 periph A */
378*f126890aSEmmanuel Vadot							 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB10 periph A */
379*f126890aSEmmanuel Vadot							 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB11 periph A */
380*f126890aSEmmanuel Vadot					};
381*f126890aSEmmanuel Vadot				};
382*f126890aSEmmanuel Vadot
383*f126890aSEmmanuel Vadot				spi0 {
384*f126890aSEmmanuel Vadot					pinctrl_spi0: spi0-0 {
385*f126890aSEmmanuel Vadot						atmel,pins =
386*f126890aSEmmanuel Vadot							<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA0 periph B SPI0_MISO pin */
387*f126890aSEmmanuel Vadot							 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA1 periph B SPI0_MOSI pin */
388*f126890aSEmmanuel Vadot							 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA2 periph B SPI0_SPCK pin */
389*f126890aSEmmanuel Vadot					};
390*f126890aSEmmanuel Vadot				};
391*f126890aSEmmanuel Vadot
392*f126890aSEmmanuel Vadot				spi1 {
393*f126890aSEmmanuel Vadot					pinctrl_spi1: spi1-0 {
394*f126890aSEmmanuel Vadot						atmel,pins =
395*f126890aSEmmanuel Vadot							<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB12 periph A SPI1_MISO pin */
396*f126890aSEmmanuel Vadot							 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB13 periph A SPI1_MOSI pin */
397*f126890aSEmmanuel Vadot							 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB14 periph A SPI1_SPCK pin */
398*f126890aSEmmanuel Vadot					};
399*f126890aSEmmanuel Vadot				};
400*f126890aSEmmanuel Vadot
401*f126890aSEmmanuel Vadot				tcb0 {
402*f126890aSEmmanuel Vadot					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
403*f126890aSEmmanuel Vadot						atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
404*f126890aSEmmanuel Vadot					};
405*f126890aSEmmanuel Vadot
406*f126890aSEmmanuel Vadot					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
407*f126890aSEmmanuel Vadot						atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
408*f126890aSEmmanuel Vadot					};
409*f126890aSEmmanuel Vadot
410*f126890aSEmmanuel Vadot					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
411*f126890aSEmmanuel Vadot						atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
412*f126890aSEmmanuel Vadot					};
413*f126890aSEmmanuel Vadot
414*f126890aSEmmanuel Vadot					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
415*f126890aSEmmanuel Vadot						atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
416*f126890aSEmmanuel Vadot					};
417*f126890aSEmmanuel Vadot
418*f126890aSEmmanuel Vadot					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
419*f126890aSEmmanuel Vadot						atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
420*f126890aSEmmanuel Vadot					};
421*f126890aSEmmanuel Vadot
422*f126890aSEmmanuel Vadot					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
423*f126890aSEmmanuel Vadot						atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
424*f126890aSEmmanuel Vadot					};
425*f126890aSEmmanuel Vadot
426*f126890aSEmmanuel Vadot					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
427*f126890aSEmmanuel Vadot						atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
428*f126890aSEmmanuel Vadot					};
429*f126890aSEmmanuel Vadot
430*f126890aSEmmanuel Vadot					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
431*f126890aSEmmanuel Vadot						atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
432*f126890aSEmmanuel Vadot					};
433*f126890aSEmmanuel Vadot
434*f126890aSEmmanuel Vadot					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
435*f126890aSEmmanuel Vadot						atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
436*f126890aSEmmanuel Vadot					};
437*f126890aSEmmanuel Vadot				};
438*f126890aSEmmanuel Vadot
439*f126890aSEmmanuel Vadot				fb {
440*f126890aSEmmanuel Vadot					pinctrl_fb: fb-0 {
441*f126890aSEmmanuel Vadot						atmel,pins =
442*f126890aSEmmanuel Vadot							<AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC1 periph A */
443*f126890aSEmmanuel Vadot							 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC2 periph A */
444*f126890aSEmmanuel Vadot							 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC3 periph A */
445*f126890aSEmmanuel Vadot							 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB9 periph B */
446*f126890aSEmmanuel Vadot							 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC6 periph A */
447*f126890aSEmmanuel Vadot							 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC7 periph A */
448*f126890aSEmmanuel Vadot							 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC8 periph A */
449*f126890aSEmmanuel Vadot							 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC9 periph A */
450*f126890aSEmmanuel Vadot							 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC10 periph A */
451*f126890aSEmmanuel Vadot							 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC11 periph A */
452*f126890aSEmmanuel Vadot							 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC14 periph A */
453*f126890aSEmmanuel Vadot							 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC15 periph A */
454*f126890aSEmmanuel Vadot							 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC16 periph A */
455*f126890aSEmmanuel Vadot							 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC12 periph B */
456*f126890aSEmmanuel Vadot							 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC18 periph A */
457*f126890aSEmmanuel Vadot							 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC19 periph A */
458*f126890aSEmmanuel Vadot							 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC22 periph A */
459*f126890aSEmmanuel Vadot							 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC23 periph A */
460*f126890aSEmmanuel Vadot							 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC24 periph A */
461*f126890aSEmmanuel Vadot							 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC17 periph B */
462*f126890aSEmmanuel Vadot							 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC26 periph A */
463*f126890aSEmmanuel Vadot							 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PC27 periph A */
464*f126890aSEmmanuel Vadot					};
465*f126890aSEmmanuel Vadot				};
466*f126890aSEmmanuel Vadot
467*f126890aSEmmanuel Vadot				can {
468*f126890aSEmmanuel Vadot					pinctrl_can_rx_tx: can_rx_tx {
469*f126890aSEmmanuel Vadot						atmel,pins =
470*f126890aSEmmanuel Vadot							<AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* CANRX, conflicts with IRQ0 */
471*f126890aSEmmanuel Vadot							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* CANTX, conflicts with PCK0 */
472*f126890aSEmmanuel Vadot					};
473*f126890aSEmmanuel Vadot				};
474*f126890aSEmmanuel Vadot
475*f126890aSEmmanuel Vadot				ac97 {
476*f126890aSEmmanuel Vadot					pinctrl_ac97: ac97-0 {
477*f126890aSEmmanuel Vadot						atmel,pins =
478*f126890aSEmmanuel Vadot							<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB12 periph A AC97FS pin */
479*f126890aSEmmanuel Vadot							 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB13 periph A AC97CK pin */
480*f126890aSEmmanuel Vadot							 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB14 periph A AC97TX pin */
481*f126890aSEmmanuel Vadot							 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB14 periph A AC97RX pin */
482*f126890aSEmmanuel Vadot					};
483*f126890aSEmmanuel Vadot				};
484*f126890aSEmmanuel Vadot
485*f126890aSEmmanuel Vadot				pioA: gpio@fffff200 {
486*f126890aSEmmanuel Vadot					compatible = "atmel,at91rm9200-gpio";
487*f126890aSEmmanuel Vadot					reg = <0xfffff200 0x200>;
488*f126890aSEmmanuel Vadot					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
489*f126890aSEmmanuel Vadot					#gpio-cells = <2>;
490*f126890aSEmmanuel Vadot					gpio-controller;
491*f126890aSEmmanuel Vadot					interrupt-controller;
492*f126890aSEmmanuel Vadot					#interrupt-cells = <2>;
493*f126890aSEmmanuel Vadot					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
494*f126890aSEmmanuel Vadot				};
495*f126890aSEmmanuel Vadot
496*f126890aSEmmanuel Vadot				pioB: gpio@fffff400 {
497*f126890aSEmmanuel Vadot					compatible = "atmel,at91rm9200-gpio";
498*f126890aSEmmanuel Vadot					reg = <0xfffff400 0x200>;
499*f126890aSEmmanuel Vadot					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
500*f126890aSEmmanuel Vadot					#gpio-cells = <2>;
501*f126890aSEmmanuel Vadot					gpio-controller;
502*f126890aSEmmanuel Vadot					interrupt-controller;
503*f126890aSEmmanuel Vadot					#interrupt-cells = <2>;
504*f126890aSEmmanuel Vadot					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
505*f126890aSEmmanuel Vadot				};
506*f126890aSEmmanuel Vadot
507*f126890aSEmmanuel Vadot				pioC: gpio@fffff600 {
508*f126890aSEmmanuel Vadot					compatible = "atmel,at91rm9200-gpio";
509*f126890aSEmmanuel Vadot					reg = <0xfffff600 0x200>;
510*f126890aSEmmanuel Vadot					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
511*f126890aSEmmanuel Vadot					#gpio-cells = <2>;
512*f126890aSEmmanuel Vadot					gpio-controller;
513*f126890aSEmmanuel Vadot					interrupt-controller;
514*f126890aSEmmanuel Vadot					#interrupt-cells = <2>;
515*f126890aSEmmanuel Vadot					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
516*f126890aSEmmanuel Vadot				};
517*f126890aSEmmanuel Vadot
518*f126890aSEmmanuel Vadot				pioD: gpio@fffff800 {
519*f126890aSEmmanuel Vadot					compatible = "atmel,at91rm9200-gpio";
520*f126890aSEmmanuel Vadot					reg = <0xfffff800 0x200>;
521*f126890aSEmmanuel Vadot					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
522*f126890aSEmmanuel Vadot					#gpio-cells = <2>;
523*f126890aSEmmanuel Vadot					gpio-controller;
524*f126890aSEmmanuel Vadot					interrupt-controller;
525*f126890aSEmmanuel Vadot					#interrupt-cells = <2>;
526*f126890aSEmmanuel Vadot					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
527*f126890aSEmmanuel Vadot				};
528*f126890aSEmmanuel Vadot
529*f126890aSEmmanuel Vadot				pioE: gpio@fffffa00 {
530*f126890aSEmmanuel Vadot					compatible = "atmel,at91rm9200-gpio";
531*f126890aSEmmanuel Vadot					reg = <0xfffffa00 0x200>;
532*f126890aSEmmanuel Vadot					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
533*f126890aSEmmanuel Vadot					#gpio-cells = <2>;
534*f126890aSEmmanuel Vadot					gpio-controller;
535*f126890aSEmmanuel Vadot					interrupt-controller;
536*f126890aSEmmanuel Vadot					#interrupt-cells = <2>;
537*f126890aSEmmanuel Vadot					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
538*f126890aSEmmanuel Vadot				};
539*f126890aSEmmanuel Vadot			};
540*f126890aSEmmanuel Vadot
541*f126890aSEmmanuel Vadot			dbgu: serial@ffffee00 {
542*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
543*f126890aSEmmanuel Vadot				reg = <0xffffee00 0x200>;
544*f126890aSEmmanuel Vadot				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
545*f126890aSEmmanuel Vadot				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
546*f126890aSEmmanuel Vadot				pinctrl-names = "default";
547*f126890aSEmmanuel Vadot				pinctrl-0 = <&pinctrl_dbgu>;
548*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
549*f126890aSEmmanuel Vadot				clock-names = "usart";
550*f126890aSEmmanuel Vadot				status = "disabled";
551*f126890aSEmmanuel Vadot			};
552*f126890aSEmmanuel Vadot
553*f126890aSEmmanuel Vadot			usart0: serial@fff8c000 {
554*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-usart";
555*f126890aSEmmanuel Vadot				reg = <0xfff8c000 0x200>;
556*f126890aSEmmanuel Vadot				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
557*f126890aSEmmanuel Vadot				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
558*f126890aSEmmanuel Vadot				atmel,use-dma-rx;
559*f126890aSEmmanuel Vadot				atmel,use-dma-tx;
560*f126890aSEmmanuel Vadot				pinctrl-names = "default";
561*f126890aSEmmanuel Vadot				pinctrl-0 = <&pinctrl_usart0>;
562*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
563*f126890aSEmmanuel Vadot				clock-names = "usart";
564*f126890aSEmmanuel Vadot				status = "disabled";
565*f126890aSEmmanuel Vadot			};
566*f126890aSEmmanuel Vadot
567*f126890aSEmmanuel Vadot			usart1: serial@fff90000 {
568*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-usart";
569*f126890aSEmmanuel Vadot				reg = <0xfff90000 0x200>;
570*f126890aSEmmanuel Vadot				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
571*f126890aSEmmanuel Vadot				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
572*f126890aSEmmanuel Vadot				atmel,use-dma-rx;
573*f126890aSEmmanuel Vadot				atmel,use-dma-tx;
574*f126890aSEmmanuel Vadot				pinctrl-names = "default";
575*f126890aSEmmanuel Vadot				pinctrl-0 = <&pinctrl_usart1>;
576*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
577*f126890aSEmmanuel Vadot				clock-names = "usart";
578*f126890aSEmmanuel Vadot				status = "disabled";
579*f126890aSEmmanuel Vadot			};
580*f126890aSEmmanuel Vadot
581*f126890aSEmmanuel Vadot			usart2: serial@fff94000 {
582*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-usart";
583*f126890aSEmmanuel Vadot				reg = <0xfff94000 0x200>;
584*f126890aSEmmanuel Vadot				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
585*f126890aSEmmanuel Vadot				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
586*f126890aSEmmanuel Vadot				atmel,use-dma-rx;
587*f126890aSEmmanuel Vadot				atmel,use-dma-tx;
588*f126890aSEmmanuel Vadot				pinctrl-names = "default";
589*f126890aSEmmanuel Vadot				pinctrl-0 = <&pinctrl_usart2>;
590*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
591*f126890aSEmmanuel Vadot				clock-names = "usart";
592*f126890aSEmmanuel Vadot				status = "disabled";
593*f126890aSEmmanuel Vadot			};
594*f126890aSEmmanuel Vadot
595*f126890aSEmmanuel Vadot			ssc0: ssc@fff98000 {
596*f126890aSEmmanuel Vadot				compatible = "atmel,at91rm9200-ssc";
597*f126890aSEmmanuel Vadot				reg = <0xfff98000 0x4000>;
598*f126890aSEmmanuel Vadot				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
599*f126890aSEmmanuel Vadot				pinctrl-names = "default";
600*f126890aSEmmanuel Vadot				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
601*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
602*f126890aSEmmanuel Vadot				clock-names = "pclk";
603*f126890aSEmmanuel Vadot				status = "disabled";
604*f126890aSEmmanuel Vadot			};
605*f126890aSEmmanuel Vadot
606*f126890aSEmmanuel Vadot			ssc1: ssc@fff9c000 {
607*f126890aSEmmanuel Vadot				compatible = "atmel,at91rm9200-ssc";
608*f126890aSEmmanuel Vadot				reg = <0xfff9c000 0x4000>;
609*f126890aSEmmanuel Vadot				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
610*f126890aSEmmanuel Vadot				pinctrl-names = "default";
611*f126890aSEmmanuel Vadot				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
612*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
613*f126890aSEmmanuel Vadot				clock-names = "pclk";
614*f126890aSEmmanuel Vadot				status = "disabled";
615*f126890aSEmmanuel Vadot			};
616*f126890aSEmmanuel Vadot
617*f126890aSEmmanuel Vadot			ac97: sound@fffa0000 {
618*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9263-ac97c";
619*f126890aSEmmanuel Vadot				reg = <0xfffa0000 0x4000>;
620*f126890aSEmmanuel Vadot				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>;
621*f126890aSEmmanuel Vadot				pinctrl-names = "default";
622*f126890aSEmmanuel Vadot				pinctrl-0 = <&pinctrl_ac97>;
623*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
624*f126890aSEmmanuel Vadot				clock-names = "ac97_clk";
625*f126890aSEmmanuel Vadot				status = "disabled";
626*f126890aSEmmanuel Vadot			};
627*f126890aSEmmanuel Vadot
628*f126890aSEmmanuel Vadot			macb0: ethernet@fffbc000 {
629*f126890aSEmmanuel Vadot				compatible = "cdns,at91sam9260-macb", "cdns,macb";
630*f126890aSEmmanuel Vadot				reg = <0xfffbc000 0x100>;
631*f126890aSEmmanuel Vadot				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
632*f126890aSEmmanuel Vadot				pinctrl-names = "default";
633*f126890aSEmmanuel Vadot				pinctrl-0 = <&pinctrl_macb_rmii>;
634*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
635*f126890aSEmmanuel Vadot				clock-names = "hclk", "pclk";
636*f126890aSEmmanuel Vadot				status = "disabled";
637*f126890aSEmmanuel Vadot			};
638*f126890aSEmmanuel Vadot
639*f126890aSEmmanuel Vadot			usb1: gadget@fff78000 {
640*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9263-udc";
641*f126890aSEmmanuel Vadot				reg = <0xfff78000 0x4000>;
642*f126890aSEmmanuel Vadot				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
643*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_SYSTEM 7>;
644*f126890aSEmmanuel Vadot				clock-names = "pclk", "hclk";
645*f126890aSEmmanuel Vadot				status = "disabled";
646*f126890aSEmmanuel Vadot			};
647*f126890aSEmmanuel Vadot
648*f126890aSEmmanuel Vadot			i2c0: i2c@fff88000 {
649*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-i2c";
650*f126890aSEmmanuel Vadot				reg = <0xfff88000 0x100>;
651*f126890aSEmmanuel Vadot				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
652*f126890aSEmmanuel Vadot				#address-cells = <1>;
653*f126890aSEmmanuel Vadot				#size-cells = <0>;
654*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
655*f126890aSEmmanuel Vadot				status = "disabled";
656*f126890aSEmmanuel Vadot			};
657*f126890aSEmmanuel Vadot
658*f126890aSEmmanuel Vadot			mmc0: mmc@fff80000 {
659*f126890aSEmmanuel Vadot				compatible = "atmel,hsmci";
660*f126890aSEmmanuel Vadot				reg = <0xfff80000 0x600>;
661*f126890aSEmmanuel Vadot				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
662*f126890aSEmmanuel Vadot				#address-cells = <1>;
663*f126890aSEmmanuel Vadot				#size-cells = <0>;
664*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
665*f126890aSEmmanuel Vadot				clock-names = "mci_clk";
666*f126890aSEmmanuel Vadot				status = "disabled";
667*f126890aSEmmanuel Vadot			};
668*f126890aSEmmanuel Vadot
669*f126890aSEmmanuel Vadot			mmc1: mmc@fff84000 {
670*f126890aSEmmanuel Vadot				compatible = "atmel,hsmci";
671*f126890aSEmmanuel Vadot				reg = <0xfff84000 0x600>;
672*f126890aSEmmanuel Vadot				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
673*f126890aSEmmanuel Vadot				#address-cells = <1>;
674*f126890aSEmmanuel Vadot				#size-cells = <0>;
675*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
676*f126890aSEmmanuel Vadot				clock-names = "mci_clk";
677*f126890aSEmmanuel Vadot				status = "disabled";
678*f126890aSEmmanuel Vadot			};
679*f126890aSEmmanuel Vadot
680*f126890aSEmmanuel Vadot			watchdog@fffffd40 {
681*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-wdt";
682*f126890aSEmmanuel Vadot				reg = <0xfffffd40 0x10>;
683*f126890aSEmmanuel Vadot				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
684*f126890aSEmmanuel Vadot				clocks = <&slow_xtal>;
685*f126890aSEmmanuel Vadot				atmel,watchdog-type = "hardware";
686*f126890aSEmmanuel Vadot				atmel,reset-type = "all";
687*f126890aSEmmanuel Vadot				atmel,dbg-halt;
688*f126890aSEmmanuel Vadot				status = "disabled";
689*f126890aSEmmanuel Vadot			};
690*f126890aSEmmanuel Vadot
691*f126890aSEmmanuel Vadot			spi0: spi@fffa4000 {
692*f126890aSEmmanuel Vadot				#address-cells = <1>;
693*f126890aSEmmanuel Vadot				#size-cells = <0>;
694*f126890aSEmmanuel Vadot				compatible = "atmel,at91rm9200-spi";
695*f126890aSEmmanuel Vadot				reg = <0xfffa4000 0x200>;
696*f126890aSEmmanuel Vadot				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
697*f126890aSEmmanuel Vadot				pinctrl-names = "default";
698*f126890aSEmmanuel Vadot				pinctrl-0 = <&pinctrl_spi0>;
699*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
700*f126890aSEmmanuel Vadot				clock-names = "spi_clk";
701*f126890aSEmmanuel Vadot				status = "disabled";
702*f126890aSEmmanuel Vadot			};
703*f126890aSEmmanuel Vadot
704*f126890aSEmmanuel Vadot			spi1: spi@fffa8000 {
705*f126890aSEmmanuel Vadot				#address-cells = <1>;
706*f126890aSEmmanuel Vadot				#size-cells = <0>;
707*f126890aSEmmanuel Vadot				compatible = "atmel,at91rm9200-spi";
708*f126890aSEmmanuel Vadot				reg = <0xfffa8000 0x200>;
709*f126890aSEmmanuel Vadot				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
710*f126890aSEmmanuel Vadot				pinctrl-names = "default";
711*f126890aSEmmanuel Vadot				pinctrl-0 = <&pinctrl_spi1>;
712*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
713*f126890aSEmmanuel Vadot				clock-names = "spi_clk";
714*f126890aSEmmanuel Vadot				status = "disabled";
715*f126890aSEmmanuel Vadot			};
716*f126890aSEmmanuel Vadot
717*f126890aSEmmanuel Vadot			pwm0: pwm@fffb8000 {
718*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9rl-pwm";
719*f126890aSEmmanuel Vadot				reg = <0xfffb8000 0x300>;
720*f126890aSEmmanuel Vadot				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
721*f126890aSEmmanuel Vadot				#pwm-cells = <3>;
722*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
723*f126890aSEmmanuel Vadot				clock-names = "pwm_clk";
724*f126890aSEmmanuel Vadot				status = "disabled";
725*f126890aSEmmanuel Vadot			};
726*f126890aSEmmanuel Vadot
727*f126890aSEmmanuel Vadot			can: can@fffac000 {
728*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9263-can";
729*f126890aSEmmanuel Vadot				reg = <0xfffac000 0x300>;
730*f126890aSEmmanuel Vadot				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
731*f126890aSEmmanuel Vadot				pinctrl-names = "default";
732*f126890aSEmmanuel Vadot				pinctrl-0 = <&pinctrl_can_rx_tx>;
733*f126890aSEmmanuel Vadot				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
734*f126890aSEmmanuel Vadot				clock-names = "can_clk";
735*f126890aSEmmanuel Vadot			};
736*f126890aSEmmanuel Vadot
737*f126890aSEmmanuel Vadot			rtc@fffffd20 {
738*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-rtt";
739*f126890aSEmmanuel Vadot				reg = <0xfffffd20 0x10>;
740*f126890aSEmmanuel Vadot				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
741*f126890aSEmmanuel Vadot				clocks = <&slow_xtal>;
742*f126890aSEmmanuel Vadot				status = "disabled";
743*f126890aSEmmanuel Vadot			};
744*f126890aSEmmanuel Vadot
745*f126890aSEmmanuel Vadot			rtc@fffffd50 {
746*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-rtt";
747*f126890aSEmmanuel Vadot				reg = <0xfffffd50 0x10>;
748*f126890aSEmmanuel Vadot				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
749*f126890aSEmmanuel Vadot				clocks = <&slow_xtal>;
750*f126890aSEmmanuel Vadot				status = "disabled";
751*f126890aSEmmanuel Vadot			};
752*f126890aSEmmanuel Vadot
753*f126890aSEmmanuel Vadot			gpbr: syscon@fffffd60 {
754*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-gpbr", "syscon";
755*f126890aSEmmanuel Vadot				reg = <0xfffffd60 0x50>;
756*f126890aSEmmanuel Vadot				status = "disabled";
757*f126890aSEmmanuel Vadot			};
758*f126890aSEmmanuel Vadot		};
759*f126890aSEmmanuel Vadot
760*f126890aSEmmanuel Vadot		fb0: fb@700000 {
761*f126890aSEmmanuel Vadot			compatible = "atmel,at91sam9263-lcdc";
762*f126890aSEmmanuel Vadot			reg = <0x00700000 0x1000>;
763*f126890aSEmmanuel Vadot			interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
764*f126890aSEmmanuel Vadot			pinctrl-names = "default";
765*f126890aSEmmanuel Vadot			pinctrl-0 = <&pinctrl_fb>;
766*f126890aSEmmanuel Vadot			clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 26>;
767*f126890aSEmmanuel Vadot			clock-names = "lcdc_clk", "hclk";
768*f126890aSEmmanuel Vadot			status = "disabled";
769*f126890aSEmmanuel Vadot		};
770*f126890aSEmmanuel Vadot
771*f126890aSEmmanuel Vadot		usb0: ohci@a00000 {
772*f126890aSEmmanuel Vadot			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
773*f126890aSEmmanuel Vadot			reg = <0x00a00000 0x100000>;
774*f126890aSEmmanuel Vadot			interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
775*f126890aSEmmanuel Vadot			clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_SYSTEM 6>;
776*f126890aSEmmanuel Vadot			clock-names = "ohci_clk", "hclk", "uhpck";
777*f126890aSEmmanuel Vadot			status = "disabled";
778*f126890aSEmmanuel Vadot		};
779*f126890aSEmmanuel Vadot
780*f126890aSEmmanuel Vadot		ebi0: ebi@10000000 {
781*f126890aSEmmanuel Vadot			compatible = "atmel,at91sam9263-ebi0";
782*f126890aSEmmanuel Vadot			#address-cells = <2>;
783*f126890aSEmmanuel Vadot			#size-cells = <1>;
784*f126890aSEmmanuel Vadot			atmel,smc = <&smc0>;
785*f126890aSEmmanuel Vadot			atmel,matrix = <&matrix>;
786*f126890aSEmmanuel Vadot			reg = <0x10000000 0x80000000>;
787*f126890aSEmmanuel Vadot			ranges = <0x0 0x0 0x10000000 0x10000000
788*f126890aSEmmanuel Vadot				  0x1 0x0 0x20000000 0x10000000
789*f126890aSEmmanuel Vadot				  0x2 0x0 0x30000000 0x10000000
790*f126890aSEmmanuel Vadot				  0x3 0x0 0x40000000 0x10000000
791*f126890aSEmmanuel Vadot				  0x4 0x0 0x50000000 0x10000000
792*f126890aSEmmanuel Vadot				  0x5 0x0 0x60000000 0x10000000>;
793*f126890aSEmmanuel Vadot			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
794*f126890aSEmmanuel Vadot			status = "disabled";
795*f126890aSEmmanuel Vadot
796*f126890aSEmmanuel Vadot			nand_controller0: nand-controller {
797*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-nand-controller";
798*f126890aSEmmanuel Vadot				#address-cells = <2>;
799*f126890aSEmmanuel Vadot				#size-cells = <1>;
800*f126890aSEmmanuel Vadot				ranges;
801*f126890aSEmmanuel Vadot				status = "disabled";
802*f126890aSEmmanuel Vadot			};
803*f126890aSEmmanuel Vadot		};
804*f126890aSEmmanuel Vadot
805*f126890aSEmmanuel Vadot		ebi1: ebi@70000000 {
806*f126890aSEmmanuel Vadot			compatible = "atmel,at91sam9263-ebi1";
807*f126890aSEmmanuel Vadot			#address-cells = <2>;
808*f126890aSEmmanuel Vadot			#size-cells = <1>;
809*f126890aSEmmanuel Vadot			atmel,smc = <&smc1>;
810*f126890aSEmmanuel Vadot			atmel,matrix = <&matrix>;
811*f126890aSEmmanuel Vadot			reg = <0x80000000 0x20000000>;
812*f126890aSEmmanuel Vadot			ranges = <0x0 0x0 0x80000000 0x10000000
813*f126890aSEmmanuel Vadot				  0x1 0x0 0x90000000 0x10000000>;
814*f126890aSEmmanuel Vadot			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
815*f126890aSEmmanuel Vadot			status = "disabled";
816*f126890aSEmmanuel Vadot
817*f126890aSEmmanuel Vadot			nand_controller1: nand-controller {
818*f126890aSEmmanuel Vadot				compatible = "atmel,at91sam9260-nand-controller";
819*f126890aSEmmanuel Vadot				#address-cells = <2>;
820*f126890aSEmmanuel Vadot				#size-cells = <1>;
821*f126890aSEmmanuel Vadot				ranges;
822*f126890aSEmmanuel Vadot				status = "disabled";
823*f126890aSEmmanuel Vadot			};
824*f126890aSEmmanuel Vadot		};
825*f126890aSEmmanuel Vadot	};
826*f126890aSEmmanuel Vadot
827*f126890aSEmmanuel Vadot	i2c-gpio-0 {
828*f126890aSEmmanuel Vadot		compatible = "i2c-gpio";
829*f126890aSEmmanuel Vadot		gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
830*f126890aSEmmanuel Vadot			 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
831*f126890aSEmmanuel Vadot			>;
832*f126890aSEmmanuel Vadot		i2c-gpio,sda-open-drain;
833*f126890aSEmmanuel Vadot		i2c-gpio,scl-open-drain;
834*f126890aSEmmanuel Vadot		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
835*f126890aSEmmanuel Vadot		#address-cells = <1>;
836*f126890aSEmmanuel Vadot		#size-cells = <0>;
837*f126890aSEmmanuel Vadot		status = "disabled";
838*f126890aSEmmanuel Vadot	};
839*f126890aSEmmanuel Vadot};
840