1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2015 MediaTek Inc. 4 * Author: Erin Lo <erin.lo@mediatek.com> 5 * 6 */ 7 8/dts-v1/; 9#include <dt-bindings/gpio/gpio.h> 10#include "mt2701.dtsi" 11 12/ { 13 model = "MediaTek MT2701 evaluation board"; 14 compatible = "mediatek,mt2701-evb", "mediatek,mt2701"; 15 16 memory { 17 device_type = "memory"; 18 reg = <0 0x80000000 0 0x40000000>; 19 }; 20 21 sound:sound { 22 compatible = "mediatek,mt2701-cs42448-machine"; 23 mediatek,platform = <&afe>; 24 /* CS42448 Machine name */ 25 audio-routing = 26 "Line Out Jack", "AOUT1L", 27 "Line Out Jack", "AOUT1R", 28 "Line Out Jack", "AOUT2L", 29 "Line Out Jack", "AOUT2R", 30 "Line Out Jack", "AOUT3L", 31 "Line Out Jack", "AOUT3R", 32 "Line Out Jack", "AOUT4L", 33 "Line Out Jack", "AOUT4R", 34 "AIN1L", "AMIC", 35 "AIN1R", "AMIC", 36 "AIN2L", "Tuner In", 37 "AIN2R", "Tuner In", 38 "AIN3L", "Satellite Tuner In", 39 "AIN3R", "Satellite Tuner In", 40 "AIN3L", "AUX In", 41 "AIN3R", "AUX In"; 42 mediatek,audio-codec = <&cs42448>; 43 mediatek,audio-codec-bt-mrg = <&bt_sco_codec>; 44 pinctrl-names = "default"; 45 pinctrl-0 = <&aud_pins_default>; 46 i2s1-in-sel-gpio1 = <&pio 53 0>; 47 i2s1-in-sel-gpio2 = <&pio 54 0>; 48 status = "okay"; 49 }; 50 51 bt_sco_codec:bt_sco_codec { 52 compatible = "linux,bt-sco"; 53 }; 54 55 backlight_lcd: backlight_lcd { 56 compatible = "pwm-backlight"; 57 pwms = <&bls 0 100000>; 58 brightness-levels = < 59 0 16 32 48 64 80 96 112 60 128 144 160 176 192 208 224 240 61 255 62 >; 63 default-brightness-level = <9>; 64 }; 65 66 usb_vbus: regulator@0 { 67 compatible = "regulator-fixed"; 68 regulator-name = "usb_vbus"; 69 regulator-min-microvolt = <5000000>; 70 regulator-max-microvolt = <5000000>; 71 gpio = <&pio 45 GPIO_ACTIVE_HIGH>; 72 enable-active-high; 73 }; 74}; 75 76&auxadc { 77 status = "okay"; 78}; 79 80&bls { 81 status = "okay"; 82 pinctrl-names = "default"; 83 pinctrl-0 = <&pwm_bls_gpio>; 84}; 85 86&i2c0 { 87 pinctrl-names = "default"; 88 pinctrl-0 = <&i2c0_pins_a>; 89 status = "okay"; 90}; 91 92&i2c1 { 93 pinctrl-names = "default"; 94 pinctrl-0 = <&i2c1_pins_a>; 95 status = "okay"; 96}; 97 98&i2c2 { 99 pinctrl-names = "default"; 100 pinctrl-0 = <&i2c2_pins_a>; 101 status = "okay"; 102 cs42448: cs42448@48 { 103 compatible = "cirrus,cs42448"; 104 reg = <0x48>; 105 clocks = <&topckgen CLK_TOP_AUD_I2S1_MCLK>; 106 clock-names = "mclk"; 107 }; 108}; 109 110&pio { 111 i2c0_pins_a: i2c0@0 { 112 pins1 { 113 pinmux = <MT2701_PIN_75_SDA0__FUNC_SDA0>, 114 <MT2701_PIN_76_SCL0__FUNC_SCL0>; 115 bias-disable; 116 }; 117 }; 118 119 i2c1_pins_a: i2c1@0 { 120 pins1 { 121 pinmux = <MT2701_PIN_57_SDA1__FUNC_SDA1>, 122 <MT2701_PIN_58_SCL1__FUNC_SCL1>; 123 bias-disable; 124 }; 125 }; 126 127 i2c2_pins_a: i2c2@0 { 128 pins1 { 129 pinmux = <MT2701_PIN_77_SDA2__FUNC_SDA2>, 130 <MT2701_PIN_78_SCL2__FUNC_SCL2>; 131 bias-disable; 132 }; 133 }; 134 135 pwm_bls_gpio: pwm_bls_gpio { 136 pins_cmd_dat { 137 pinmux = <MT2701_PIN_208_AUD_EXT_CK1__FUNC_DISP_PWM>; 138 }; 139 }; 140 141 spi_pins_a: spi0@0 { 142 pins_spi { 143 pinmux = <MT2701_PIN_53_SPI0_CSN__FUNC_SPI0_CS>, 144 <MT2701_PIN_54_SPI0_CK__FUNC_SPI0_CK>, 145 <MT2701_PIN_55_SPI0_MI__FUNC_SPI0_MI>, 146 <MT2701_PIN_56_SPI0_MO__FUNC_SPI0_MO>; 147 bias-disable; 148 }; 149 }; 150 151 aud_pins_default: audiodefault { 152 pins_cmd_dat { 153 pinmux = <MT2701_PIN_49_I2S0_DATA__FUNC_I2S0_DATA>, 154 <MT2701_PIN_72_I2S0_DATA_IN__FUNC_I2S0_DATA_IN>, 155 <MT2701_PIN_73_I2S0_LRCK__FUNC_I2S0_LRCK>, 156 <MT2701_PIN_74_I2S0_BCK__FUNC_I2S0_BCK>, 157 <MT2701_PIN_126_I2S0_MCLK__FUNC_I2S0_MCLK>, 158 <MT2701_PIN_33_I2S1_DATA__FUNC_I2S1_DATA>, 159 <MT2701_PIN_34_I2S1_DATA_IN__FUNC_I2S1_DATA_IN>, 160 <MT2701_PIN_35_I2S1_BCK__FUNC_I2S1_BCK>, 161 <MT2701_PIN_36_I2S1_LRCK__FUNC_I2S1_LRCK>, 162 <MT2701_PIN_37_I2S1_MCLK__FUNC_I2S1_MCLK>, 163 <MT2701_PIN_203_PWM0__FUNC_I2S2_DATA>, 164 <MT2701_PIN_204_PWM1__FUNC_I2S3_DATA>, 165 <MT2701_PIN_53_SPI0_CSN__FUNC_GPIO53>, 166 <MT2701_PIN_54_SPI0_CK__FUNC_GPIO54>, 167 <MT2701_PIN_18_PCM_CLK__FUNC_MRG_CLK>, 168 <MT2701_PIN_19_PCM_SYNC__FUNC_MRG_SYNC>, 169 <MT2701_PIN_20_PCM_RX__FUNC_MRG_TX>, 170 <MT2701_PIN_21_PCM_TX__FUNC_MRG_RX>; 171 drive-strength = <MTK_DRIVE_12mA>; 172 bias-pull-down; 173 }; 174 }; 175 176 spi_pins_b: spi1@0 { 177 pins_spi { 178 pinmux = <MT2701_PIN_7_SPI1_CSN__FUNC_SPI1_CS>, 179 <MT2701_PIN_8_SPI1_MI__FUNC_SPI1_MI>, 180 <MT2701_PIN_9_SPI1_MO__FUNC_SPI1_MO>, 181 <MT2701_PIN_199_SPI1_CLK__FUNC_SPI1_CK>; 182 bias-disable; 183 }; 184 }; 185 186 spi_pins_c: spi2@0 { 187 pins_spi { 188 pinmux = <MT2701_PIN_101_SPI2_CSN__FUNC_SPI2_CS>, 189 <MT2701_PIN_102_SPI2_MI__FUNC_SPI2_MI>, 190 <MT2701_PIN_103_SPI2_MO__FUNC_SPI2_MO>, 191 <MT2701_PIN_104_SPI2_CLK__FUNC_SPI2_CK>; 192 bias-disable; 193 }; 194 }; 195}; 196 197&spi0 { 198 pinctrl-names = "default"; 199 pinctrl-0 = <&spi_pins_a>; 200 status = "disabled"; 201}; 202 203&spi1 { 204 pinctrl-names = "default"; 205 pinctrl-0 = <&spi_pins_b>; 206 status = "disabled"; 207}; 208 209&spi2 { 210 pinctrl-names = "default"; 211 pinctrl-0 = <&spi_pins_c>; 212 status = "disabled"; 213}; 214 215&nor_flash { 216 pinctrl-names = "default"; 217 pinctrl-0 = <&nor_pins_default>; 218 status = "okay"; 219 flash@0 { 220 compatible = "jedec,spi-nor"; 221 reg = <0>; 222 }; 223}; 224 225&pio { 226 nor_pins_default: nor { 227 pins1 { 228 pinmux = <MT2701_PIN_240_EXT_XCS__FUNC_EXT_XCS>, 229 <MT2701_PIN_241_EXT_SCK__FUNC_EXT_SCK>, 230 <MT2701_PIN_239_EXT_SDIO0__FUNC_EXT_SDIO0>, 231 <MT2701_PIN_238_EXT_SDIO1__FUNC_EXT_SDIO1>, 232 <MT2701_PIN_237_EXT_SDIO2__FUNC_EXT_SDIO2>, 233 <MT2701_PIN_236_EXT_SDIO3__FUNC_EXT_SDIO3>; 234 drive-strength = <MTK_DRIVE_4mA>; 235 bias-pull-up; 236 }; 237 }; 238}; 239 240&uart0 { 241 status = "okay"; 242}; 243 244&usb2 { 245 status = "okay"; 246 usb-role-switch; 247 connector { 248 compatible = "gpio-usb-b-connector", "usb-b-connector"; 249 type = "micro"; 250 id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>; 251 vbus-supply = <&usb_vbus>; 252 }; 253}; 254