1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2*f126890aSEmmanuel Vadot/ { 3*f126890aSEmmanuel Vadot mbus@f1000000 { 4*f126890aSEmmanuel Vadot pciec: pcie@82000000 { 5*f126890aSEmmanuel Vadot compatible = "marvell,kirkwood-pcie"; 6*f126890aSEmmanuel Vadot status = "disabled"; 7*f126890aSEmmanuel Vadot device_type = "pci"; 8*f126890aSEmmanuel Vadot 9*f126890aSEmmanuel Vadot #address-cells = <3>; 10*f126890aSEmmanuel Vadot #size-cells = <2>; 11*f126890aSEmmanuel Vadot 12*f126890aSEmmanuel Vadot bus-range = <0x00 0xff>; 13*f126890aSEmmanuel Vadot 14*f126890aSEmmanuel Vadot ranges = 15*f126890aSEmmanuel Vadot <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 16*f126890aSEmmanuel Vadot 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 17*f126890aSEmmanuel Vadot 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>; 18*f126890aSEmmanuel Vadot 19*f126890aSEmmanuel Vadot pcie0: pcie@1,0 { 20*f126890aSEmmanuel Vadot device_type = "pci"; 21*f126890aSEmmanuel Vadot assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; 22*f126890aSEmmanuel Vadot reg = <0x0800 0 0 0 0>; 23*f126890aSEmmanuel Vadot #address-cells = <3>; 24*f126890aSEmmanuel Vadot #size-cells = <2>; 25*f126890aSEmmanuel Vadot #interrupt-cells = <1>; 26*f126890aSEmmanuel Vadot ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 27*f126890aSEmmanuel Vadot 0x81000000 0 0 0x81000000 0x1 0 1 0>; 28*f126890aSEmmanuel Vadot bus-range = <0x00 0xff>; 29*f126890aSEmmanuel Vadot interrupt-names = "intx", "error"; 30*f126890aSEmmanuel Vadot interrupts = <9>, <44>; 31*f126890aSEmmanuel Vadot interrupt-map-mask = <0 0 0 7>; 32*f126890aSEmmanuel Vadot interrupt-map = <0 0 0 1 &pcie_intc 0>, 33*f126890aSEmmanuel Vadot <0 0 0 2 &pcie_intc 1>, 34*f126890aSEmmanuel Vadot <0 0 0 3 &pcie_intc 2>, 35*f126890aSEmmanuel Vadot <0 0 0 4 &pcie_intc 3>; 36*f126890aSEmmanuel Vadot marvell,pcie-port = <0>; 37*f126890aSEmmanuel Vadot marvell,pcie-lane = <0>; 38*f126890aSEmmanuel Vadot clocks = <&gate_clk 2>; 39*f126890aSEmmanuel Vadot status = "disabled"; 40*f126890aSEmmanuel Vadot 41*f126890aSEmmanuel Vadot pcie_intc: interrupt-controller { 42*f126890aSEmmanuel Vadot interrupt-controller; 43*f126890aSEmmanuel Vadot #interrupt-cells = <1>; 44*f126890aSEmmanuel Vadot }; 45*f126890aSEmmanuel Vadot }; 46*f126890aSEmmanuel Vadot }; 47*f126890aSEmmanuel Vadot }; 48*f126890aSEmmanuel Vadot 49*f126890aSEmmanuel Vadot ocp@f1000000 { 50*f126890aSEmmanuel Vadot pinctrl: pin-controller@10000 { 51*f126890aSEmmanuel Vadot compatible = "marvell,88f6281-pinctrl"; 52*f126890aSEmmanuel Vadot 53*f126890aSEmmanuel Vadot pmx_sata0: pmx-sata0 { 54*f126890aSEmmanuel Vadot marvell,pins = "mpp5", "mpp21", "mpp23"; 55*f126890aSEmmanuel Vadot marvell,function = "sata0"; 56*f126890aSEmmanuel Vadot }; 57*f126890aSEmmanuel Vadot pmx_sata1: pmx-sata1 { 58*f126890aSEmmanuel Vadot marvell,pins = "mpp4", "mpp20", "mpp22"; 59*f126890aSEmmanuel Vadot marvell,function = "sata1"; 60*f126890aSEmmanuel Vadot }; 61*f126890aSEmmanuel Vadot pmx_sdio: pmx-sdio { 62*f126890aSEmmanuel Vadot marvell,pins = "mpp12", "mpp13", "mpp14", 63*f126890aSEmmanuel Vadot "mpp15", "mpp16", "mpp17"; 64*f126890aSEmmanuel Vadot marvell,function = "sdio"; 65*f126890aSEmmanuel Vadot }; 66*f126890aSEmmanuel Vadot }; 67*f126890aSEmmanuel Vadot 68*f126890aSEmmanuel Vadot rtc: rtc@10300 { 69*f126890aSEmmanuel Vadot compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; 70*f126890aSEmmanuel Vadot reg = <0x10300 0x20>; 71*f126890aSEmmanuel Vadot interrupts = <53>; 72*f126890aSEmmanuel Vadot clocks = <&gate_clk 7>; 73*f126890aSEmmanuel Vadot }; 74*f126890aSEmmanuel Vadot 75*f126890aSEmmanuel Vadot sata: sata@80000 { 76*f126890aSEmmanuel Vadot compatible = "marvell,orion-sata"; 77*f126890aSEmmanuel Vadot reg = <0x80000 0x5000>; 78*f126890aSEmmanuel Vadot interrupts = <21>; 79*f126890aSEmmanuel Vadot clocks = <&gate_clk 14>, <&gate_clk 15>; 80*f126890aSEmmanuel Vadot clock-names = "0", "1"; 81*f126890aSEmmanuel Vadot phys = <&sata_phy0>, <&sata_phy1>; 82*f126890aSEmmanuel Vadot phy-names = "port0", "port1"; 83*f126890aSEmmanuel Vadot status = "disabled"; 84*f126890aSEmmanuel Vadot }; 85*f126890aSEmmanuel Vadot 86*f126890aSEmmanuel Vadot sdio: mvsdio@90000 { 87*f126890aSEmmanuel Vadot compatible = "marvell,orion-sdio"; 88*f126890aSEmmanuel Vadot reg = <0x90000 0x200>; 89*f126890aSEmmanuel Vadot interrupts = <28>; 90*f126890aSEmmanuel Vadot clocks = <&gate_clk 4>; 91*f126890aSEmmanuel Vadot pinctrl-0 = <&pmx_sdio>; 92*f126890aSEmmanuel Vadot pinctrl-names = "default"; 93*f126890aSEmmanuel Vadot bus-width = <4>; 94*f126890aSEmmanuel Vadot cap-sdio-irq; 95*f126890aSEmmanuel Vadot cap-sd-highspeed; 96*f126890aSEmmanuel Vadot cap-mmc-highspeed; 97*f126890aSEmmanuel Vadot status = "disabled"; 98*f126890aSEmmanuel Vadot }; 99*f126890aSEmmanuel Vadot }; 100*f126890aSEmmanuel Vadot}; 101