1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828) 4 * 5 * Copyright (C) 2015 Russell King 6 */ 7 8/dts-v1/; 9#include "armada-388-clearfog.dtsi" 10 11/ { 12 model = "SolidRun Clearfog A1"; 13 compatible = "solidrun,clearfog-a1", "marvell,armada388", 14 "marvell,armada385", "marvell,armada380"; 15 16 soc { 17 internal-regs { 18 usb3@f0000 { 19 /* CON2, nearest CPU, USB2 only. */ 20 status = "okay"; 21 }; 22 }; 23 24 pcie { 25 pcie@3,0 { 26 /* Port 2, Lane 0. CON2, nearest CPU. */ 27 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; 28 status = "okay"; 29 }; 30 }; 31 }; 32 33 gpio-keys { 34 compatible = "gpio-keys"; 35 pinctrl-0 = <&rear_button_pins>; 36 pinctrl-names = "default"; 37 38 button-0 { 39 /* The rear SW3 button */ 40 label = "Rear Button"; 41 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; 42 linux,can-disable; 43 linux,code = <BTN_0>; 44 }; 45 }; 46}; 47 48ð1 { 49 /* ethernet@30000 */ 50 phy-mode = "1000base-x"; 51 52 fixed-link { 53 speed = <1000>; 54 full-duplex; 55 }; 56}; 57 58&expander0 { 59 /* 60 * PCA9655 GPIO expander: 61 * 0-CON3 CLKREQ# 62 * 1-CON3 PERST# 63 * 2-CON2 PERST# 64 * 3-CON3 W_DISABLE 65 * 4-CON2 CLKREQ# 66 * 5-USB3 overcurrent 67 * 6-USB3 power 68 * 7-CON2 W_DISABLE 69 * 8-JP4 P1 70 * 9-JP4 P4 71 * 10-JP4 P5 72 * 11-m.2 DEVSLP 73 * 12-SFP_LOS 74 * 13-SFP_TX_FAULT 75 * 14-SFP_TX_DISABLE 76 * 15-SFP_MOD_DEF0 77 */ 78 pcie2-0-clkreq-hog { 79 gpio-hog; 80 gpios = <4 GPIO_ACTIVE_LOW>; 81 input; 82 line-name = "pcie2.0-clkreq"; 83 }; 84 pcie2-0-w-disable-hog { 85 gpio-hog; 86 gpios = <7 GPIO_ACTIVE_LOW>; 87 output-low; 88 line-name = "pcie2.0-w-disable"; 89 }; 90}; 91 92&mdio { 93 status = "okay"; 94 95 switch@4 { 96 compatible = "marvell,mv88e6085"; 97 #address-cells = <1>; 98 #size-cells = <0>; 99 reg = <4>; 100 pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>; 101 pinctrl-names = "default"; 102 103 ports { 104 #address-cells = <1>; 105 #size-cells = <0>; 106 107 port@0 { 108 reg = <0>; 109 label = "lan5"; 110 }; 111 112 port@1 { 113 reg = <1>; 114 label = "lan4"; 115 }; 116 117 port@2 { 118 reg = <2>; 119 label = "lan3"; 120 }; 121 122 port@3 { 123 reg = <3>; 124 label = "lan2"; 125 }; 126 127 port@4 { 128 reg = <4>; 129 label = "lan1"; 130 }; 131 132 port@5 { 133 reg = <5>; 134 ethernet = <ð1>; 135 phy-mode = "1000base-x"; 136 137 fixed-link { 138 speed = <1000>; 139 full-duplex; 140 }; 141 }; 142 143 port@6 { 144 /* 88E1512 external phy */ 145 reg = <6>; 146 label = "lan6"; 147 phy-mode = "rgmii-id"; 148 149 fixed-link { 150 speed = <1000>; 151 full-duplex; 152 }; 153 }; 154 }; 155 }; 156}; 157 158&pinctrl { 159 clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins { 160 marvell,pins = "mpp46"; 161 marvell,function = "ref"; 162 }; 163 clearfog_dsa0_pins: clearfog-dsa0-pins { 164 marvell,pins = "mpp23", "mpp41"; 165 marvell,function = "gpio"; 166 }; 167 clearfog_spi1_cs_pins: spi1-cs-pins { 168 marvell,pins = "mpp55"; 169 marvell,function = "spi1"; 170 }; 171 rear_button_pins: rear-button-pins { 172 marvell,pins = "mpp34"; 173 marvell,function = "gpio"; 174 }; 175}; 176 177&spi1 { 178 /* 179 * Add SPI CS pins for clearfog: 180 * CS0: W25Q32 181 * CS1: 182 * CS2: mikrobus 183 */ 184 pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>; 185}; 186