1// SPDX-License-Identifier: GPL-2.0 2// Copyright (c) 2020 AMD Inc. 3// Author: Supreeth Venkatesh <supreeth.venkatesh@amd.com> 4/dts-v1/; 5 6#include "aspeed-g5.dtsi" 7#include <dt-bindings/gpio/aspeed-gpio.h> 8#include <dt-bindings/interrupt-controller/irq.h> 9 10/ { 11 model = "AMD EthanolX BMC"; 12 compatible = "amd,ethanolx-bmc", "aspeed,ast2500"; 13 14 memory@80000000 { 15 reg = <0x80000000 0x20000000>; 16 }; 17 18 reserved-memory { 19 #address-cells = <1>; 20 #size-cells = <1>; 21 ranges; 22 23 video_engine_memory: jpegbuffer { 24 size = <0x02000000>; /* 32M */ 25 alignment = <0x01000000>; 26 compatible = "shared-dma-pool"; 27 reusable; 28 }; 29 }; 30 31 32 aliases { 33 serial0 = &uart1; 34 serial4 = &uart5; 35 }; 36 chosen { 37 stdout-path = &uart5; 38 bootargs = "console=ttyS4,115200 earlycon"; 39 }; 40 leds { 41 compatible = "gpio-leds"; 42 43 fault { 44 gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>; 45 }; 46 47 identify { 48 gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>; 49 }; 50 }; 51 iio-hwmon { 52 compatible = "iio-hwmon"; 53 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>; 54 }; 55}; 56 57&fmc { 58 status = "okay"; 59 flash@0 { 60 status = "okay"; 61 m25p,fast-read; 62 label = "bmc"; 63 #include "openbmc-flash-layout.dtsi" 64 }; 65}; 66 67&spi1 { 68 status = "okay"; 69 pinctrl-names = "default"; 70 pinctrl-0 = <&pinctrl_spi1_default>; 71 flash@0 { 72 status = "okay"; 73 m25p,fast-read; 74 label = "bios"; 75 spi-max-frequency = <100000000>; 76 }; 77}; 78 79&mac0 { 80 status = "okay"; 81 82 pinctrl-names = "default"; 83 pinctrl-0 = <&pinctrl_rmii1_default>; 84 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>, 85 <&syscon ASPEED_CLK_MAC1RCLK>; 86 clock-names = "MACCLK", "RCLK"; 87}; 88 89&uart1 { 90 //Host Console 91 status = "okay"; 92 pinctrl-names = "default"; 93 pinctrl-0 = <&pinctrl_txd1_default 94 &pinctrl_rxd1_default 95 &pinctrl_nrts1_default 96 &pinctrl_ncts1_default>; 97}; 98 99&uart5 { 100 //BMC Console 101 status = "okay"; 102}; 103 104&adc { 105 status = "okay"; 106 107 pinctrl-names = "default"; 108 pinctrl-0 = <&pinctrl_adc0_default 109 &pinctrl_adc1_default 110 &pinctrl_adc2_default 111 &pinctrl_adc3_default 112 &pinctrl_adc4_default>; 113}; 114 115&gpio { 116 status = "okay"; 117 gpio-line-names = 118 /*A0-A7*/ "","","FAULT_LED","CHASSIS_ID_LED","","","","", 119 /*B0-B7*/ "","","","","","","","", 120 /*C0-C7*/ "CHASSIS_ID_BTN","INTRUDER","AC_LOSS","","","","","", 121 /*D0-D7*/ "HDT_DBREQ","LOCAL_SPI_ROM_SEL","FPGA_SPI_ROM_SEL","JTAG_MUX_S", 122 "JTAG_MUX_OE","HDT_SEL","ASERT_WARM_RST_BTN","FPGA_RSVD", 123 /*E0-E7*/ "","","MON_P0_PWR_BTN","MON_P0_RST_BTN","MON_P0_NMI_BTN", 124 "MON_P0_PWR_GOOD","MON_PWROK","MON_RESET", 125 /*F0-F7*/ "MON_P0_PROCHOT","MON_P1_PROCHOT","MON_P0_THERMTRIP", 126 "MON_P1_THERMTRIP","P0_PRESENT","P1_PRESENT","MON_ATX_PWR_OK","", 127 /*G0-G7*/ "BRD_REV_ID_3","BRD_REV_ID_2","BRD_REV_ID_1","BRD_REV_ID_0", 128 "P0_APML_ALERT","P1_APML_ALERT","FPGA ALERT","", 129 /*H0-H7*/ "BRD_ID_0","BRD_ID_1","BRD_ID_2","BRD_ID_3", 130 "PCIE_DISCONNECTED","USB_DISCONNECTED","SPARE_0","SPARE_1", 131 /*I0-I7*/ "","","","","","","","", 132 /*J0-J7*/ "","","","","","","","", 133 /*K0-K7*/ "","","","","","","","", 134 /*L0-L7*/ "","","","","","","","", 135 /*M0-M7*/ "ASSERT_PWR_BTN","ASSERT_RST_BTN","ASSERT_NMI_BTN", 136 "ASSERT_LOCAL_LOCK","ASSERT_P0_PROCHOT","ASSERT_P1_PROCHOT", 137 "ASSERT_CLR_CMOS","ASSERT_BMC_READY", 138 /*N0-N7*/ "","","","","","","","", 139 /*O0-O7*/ "","","","","","","","", 140 /*P0-P7*/ "P0_VDD_CORE_RUN_VRHOT","P0_VDD_SOC_RUN_VRHOT", 141 "P0_VDD_MEM_ABCD_SUS_VRHOT","P0_VDD_MEM_EFGH_SUS_VRHOT", 142 "P1_VDD_CORE_RUN_VRHOT","P1_VDD_SOC_RUN_VRHOT", 143 "P1_VDD_MEM_ABCD_SUS_VRHOT","P1_VDD_MEM_EFGH_SUS_VRHOT", 144 /*Q0-Q7*/ "","","","","","","","", 145 /*R0-R7*/ "","","","","","","","", 146 /*S0-S7*/ "","","","","","","","", 147 /*T0-T7*/ "","","","","","","","", 148 /*U0-U7*/ "","","","","","","","", 149 /*V0-V7*/ "","","","","","","","", 150 /*W0-W7*/ "","","","","","","","", 151 /*X0-X7*/ "","","","","","","","", 152 /*Y0-Y7*/ "","","","","","","","", 153 /*Z0-Z7*/ "","","","","","","","", 154 /*AA0-AA7*/ "","SENSOR THERM","","","","","","", 155 /*AB0-AB7*/ "","","","","","","","", 156 /*AC0-AC7*/ "","","","","","","",""; 157}; 158 159//APML for P0 160&i2c0 { 161 status = "okay"; 162}; 163 164//APML for P1 165&i2c1 { 166 status = "okay"; 167}; 168 169//FPGA 170&i2c2 { 171 status = "okay"; 172}; 173 174//24LC128 EEPROM 175&i2c3 { 176 status = "okay"; 177 eeprom@50 { 178 compatible = "atmel,24c128"; 179 reg = <0x50>; 180 pagesize = <64>; 181 }; 182}; 183 184//P0 Power regulators 185&i2c4 { 186 status = "okay"; 187}; 188 189//P1 Power regulators 190&i2c5 { 191 status = "okay"; 192}; 193 194//P0/P1 Thermal diode 195&i2c6 { 196 status = "okay"; 197}; 198 199// Thermal Sensors 200&i2c7 { 201 status = "okay"; 202 203 lm75a@48 { 204 compatible = "national,lm75a"; 205 reg = <0x48>; 206 }; 207 208 lm75a@49 { 209 compatible = "national,lm75a"; 210 reg = <0x49>; 211 }; 212 213 lm75a@4a { 214 compatible = "national,lm75a"; 215 reg = <0x4a>; 216 }; 217 218 lm75a@4b { 219 compatible = "national,lm75a"; 220 reg = <0x4b>; 221 }; 222 223 lm75a@4c { 224 compatible = "national,lm75a"; 225 reg = <0x4c>; 226 }; 227 228 lm75a@4d { 229 compatible = "national,lm75a"; 230 reg = <0x4d>; 231 }; 232 233 lm75a@4e { 234 compatible = "national,lm75a"; 235 reg = <0x4e>; 236 }; 237 238 lm75a@4f { 239 compatible = "national,lm75a"; 240 reg = <0x4f>; 241 }; 242}; 243 244//BMC I2C 245&i2c8 { 246 status = "okay"; 247}; 248 249&kcs1 { 250 status = "okay"; 251 aspeed,lpc-io-reg = <0x60>; 252}; 253 254&kcs2 { 255 status = "okay"; 256 aspeed,lpc-io-reg = <0x62>; 257}; 258 259&kcs3 { 260 status = "okay"; 261 aspeed,lpc-io-reg = <0xCA2>; 262}; 263 264&kcs4 { 265 status = "okay"; 266 aspeed,lpc-io-reg = <0x97DE>; 267}; 268 269&lpc_snoop { 270 status = "okay"; 271 snoop-ports = <0x80>, <0x81>; 272}; 273 274&lpc_ctrl { 275 //Enable lpc clock 276 status = "okay"; 277}; 278 279&vuart { 280 status = "okay"; 281 aspeed,lpc-io-reg = <0x3f8>; 282 aspeed,lpc-interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; 283}; 284 285&pwm_tacho { 286 status = "okay"; 287 pinctrl-names = "default"; 288 pinctrl-0 = <&pinctrl_pwm0_default 289 &pinctrl_pwm1_default 290 &pinctrl_pwm2_default 291 &pinctrl_pwm3_default 292 &pinctrl_pwm4_default 293 &pinctrl_pwm5_default 294 &pinctrl_pwm6_default 295 &pinctrl_pwm7_default>; 296 297 fan@0 { 298 reg = <0x00>; 299 aspeed,fan-tach-ch = /bits/ 8 <0x00>; 300 }; 301 302 fan@1 { 303 reg = <0x01>; 304 aspeed,fan-tach-ch = /bits/ 8 <0x01>; 305 }; 306 307 fan@2 { 308 reg = <0x02>; 309 aspeed,fan-tach-ch = /bits/ 8 <0x02>; 310 }; 311 312 fan@3 { 313 reg = <0x03>; 314 aspeed,fan-tach-ch = /bits/ 8 <0x03>; 315 }; 316 317 fan@4 { 318 reg = <0x04>; 319 aspeed,fan-tach-ch = /bits/ 8 <0x04>; 320 }; 321 322 fan@5 { 323 reg = <0x05>; 324 aspeed,fan-tach-ch = /bits/ 8 <0x05>; 325 }; 326 327 fan@6 { 328 reg = <0x06>; 329 aspeed,fan-tach-ch = /bits/ 8 <0x06>; 330 }; 331 332 fan@7 { 333 reg = <0x07>; 334 aspeed,fan-tach-ch = /bits/ 8 <0x07>; 335 }; 336}; 337 338&video { 339 status = "okay"; 340 memory-region = <&video_engine_memory>; 341}; 342 343&vhub { 344 status = "okay"; 345}; 346 347