xref: /freebsd/sys/contrib/device-tree/src/arm/amlogic/meson8m2.dtsi (revision 56b17de1e8360fe131d425de20b5e75ff3ea897c) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
4 */
5
6#include "meson8.dtsi"
7
8/ {
9	model = "Amlogic Meson8m2 SoC";
10	compatible = "amlogic,meson8m2";
11}; /* end of / */
12
13&clkc {
14	compatible = "amlogic,meson8m2-clkc", "amlogic,meson8-clkc";
15};
16
17&dmcbus {
18	/* the offset of the canvas registers has changed compared to Meson8 */
19	/delete-node/ video-lut@20;
20
21	canvas: video-lut@48 {
22		compatible = "amlogic,meson8m2-canvas", "amlogic,canvas";
23		reg = <0x48 0x14>;
24	};
25};
26
27&ethmac {
28	compatible = "amlogic,meson8m2-dwmac", "snps,dwmac";
29	reg = <0xc9410000 0x10000
30		0xc1108140 0x8>;
31	clocks = <&clkc CLKID_ETH>,
32		 <&clkc CLKID_MPLL2>,
33		 <&clkc CLKID_MPLL2>,
34		 <&clkc CLKID_FCLK_DIV2>;
35	clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
36	resets = <&reset RESET_ETHERNET>;
37	reset-names = "stmmaceth";
38};
39
40&pinctrl_aobus {
41	compatible = "amlogic,meson8m2-aobus-pinctrl",
42		     "amlogic,meson8-aobus-pinctrl";
43};
44
45&pinctrl_cbus {
46	compatible = "amlogic,meson8m2-cbus-pinctrl",
47		     "amlogic,meson8-cbus-pinctrl";
48
49	eth_rgmii_pins: ethernet {
50		mux {
51			groups = "eth_tx_clk_50m", "eth_tx_en",
52				 "eth_txd3", "eth_txd2",
53				 "eth_txd1", "eth_txd0",
54				 "eth_rx_clk_in", "eth_rx_dv",
55				 "eth_rxd3", "eth_rxd2",
56				 "eth_rxd1", "eth_rxd0",
57				 "eth_mdio", "eth_mdc";
58			function = "ethernet";
59			bias-disable;
60		};
61	};
62};
63
64&pwrc {
65	compatible = "amlogic,meson8m2-pwrc";
66	resets = <&reset RESET_DBLK>,
67		 <&reset RESET_PIC_DC>,
68		 <&reset RESET_HDMI_APB>,
69		 <&reset RESET_HDMI_SYSTEM_RESET>,
70		 <&reset RESET_VENCI>,
71		 <&reset RESET_VENCP>,
72		 <&reset RESET_VDAC_4>,
73		 <&reset RESET_VENCL>,
74		 <&reset RESET_VIU>,
75		 <&reset RESET_VENC>,
76		 <&reset RESET_RDMA>;
77	reset-names = "dblk", "pic_dc", "hdmi_apb", "hdmi_system", "venci",
78		      "vencp", "vdac", "vencl", "viu", "venc", "rdma";
79	assigned-clocks = <&clkc CLKID_VPU>;
80	assigned-clock-rates = <364000000>;
81};
82
83&saradc {
84	compatible = "amlogic,meson8m2-saradc", "amlogic,meson-saradc";
85};
86
87&sdhc {
88	compatible = "amlogic,meson8m2-sdhc", "amlogic,meson-mx-sdhc";
89};
90
91&usb0_phy {
92	compatible = "amlogic,meson8m2-usb2-phy", "amlogic,meson-mx-usb2-phy";
93};
94
95&usb1_phy {
96	compatible = "amlogic,meson8m2-usb2-phy", "amlogic,meson-mx-usb2-phy";
97};
98
99&wdt {
100	compatible = "amlogic,meson8m2-wdt", "amlogic,meson8b-wdt";
101};
102