1*e67e8565SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*e67e8565SEmmanuel Vadot /* 3*e67e8565SEmmanuel Vadot * Devicetree bindings definitions for tlv320adc3xxx driver. 4*e67e8565SEmmanuel Vadot * 5*e67e8565SEmmanuel Vadot * Copyright (C) 2021 Axis Communications AB 6*e67e8565SEmmanuel Vadot */ 7*e67e8565SEmmanuel Vadot #ifndef __DT_TLV320ADC3XXX_H 8*e67e8565SEmmanuel Vadot #define __DT_TLV320ADC3XXX_H 9*e67e8565SEmmanuel Vadot 10*e67e8565SEmmanuel Vadot #define ADC3XXX_GPIO_DISABLED 0 /* I/O buffers powered down */ 11*e67e8565SEmmanuel Vadot #define ADC3XXX_GPIO_INPUT 1 /* Various non-GPIO inputs */ 12*e67e8565SEmmanuel Vadot #define ADC3XXX_GPIO_GPI 2 /* General purpose input */ 13*e67e8565SEmmanuel Vadot #define ADC3XXX_GPIO_GPO 3 /* General purpose output */ 14*e67e8565SEmmanuel Vadot #define ADC3XXX_GPIO_CLKOUT 4 /* Source set in reg. CLKOUT_MUX */ 15*e67e8565SEmmanuel Vadot #define ADC3XXX_GPIO_INT1 5 /* INT1 output */ 16*e67e8565SEmmanuel Vadot #define ADC3XXX_GPIO_INT2 6 /* INT2 output */ 17*e67e8565SEmmanuel Vadot /* value 7 is reserved */ 18*e67e8565SEmmanuel Vadot #define ADC3XXX_GPIO_SECONDARY_BCLK 8 /* Codec interface secondary BCLK */ 19*e67e8565SEmmanuel Vadot #define ADC3XXX_GPIO_SECONDARY_WCLK 9 /* Codec interface secondary WCLK */ 20*e67e8565SEmmanuel Vadot #define ADC3XXX_GPIO_ADC_MOD_CLK 10 /* Clock output for digital mics */ 21*e67e8565SEmmanuel Vadot /* values 11-15 reserved */ 22*e67e8565SEmmanuel Vadot 23*e67e8565SEmmanuel Vadot #define ADC3XXX_MICBIAS_OFF 0 /* Micbias pin powered off */ 24*e67e8565SEmmanuel Vadot #define ADC3XXX_MICBIAS_2_0V 1 /* Micbias pin set to 2.0V */ 25*e67e8565SEmmanuel Vadot #define ADC3XXX_MICBIAS_2_5V 2 /* Micbias pin set to 2.5V */ 26*e67e8565SEmmanuel Vadot #define ADC3XXX_MICBIAS_AVDD 3 /* Use AVDD voltage for micbias pin */ 27*e67e8565SEmmanuel Vadot 28*e67e8565SEmmanuel Vadot #endif /* __DT_TLV320ADC3XXX_H */ 29