1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. 4*c66ec88fSEmmanuel Vadot */ 5*c66ec88fSEmmanuel Vadot 6*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_SOC_TEGRA_PMC_H 7*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_SOC_TEGRA_PMC_H 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadot #define TEGRA_PMC_CLK_OUT_1 0 10*c66ec88fSEmmanuel Vadot #define TEGRA_PMC_CLK_OUT_2 1 11*c66ec88fSEmmanuel Vadot #define TEGRA_PMC_CLK_OUT_3 2 12*c66ec88fSEmmanuel Vadot #define TEGRA_PMC_CLK_BLINK 3 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel Vadot #define TEGRA_PMC_CLK_MAX 4 15*c66ec88fSEmmanuel Vadot 16*c66ec88fSEmmanuel Vadot #endif /* _DT_BINDINGS_SOC_TEGRA_PMC_H */ 17