xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/reset/stericsson,db8500-prcc-reset.h (revision 8cc087a1eee9ec1ca9f7ac1e63ad51bdb5a682eb)
1*8cc087a1SEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */
2*8cc087a1SEmmanuel Vadot 
3*8cc087a1SEmmanuel Vadot #ifndef _DT_BINDINGS_STE_PRCC_RESET
4*8cc087a1SEmmanuel Vadot #define _DT_BINDINGS_STE_PRCC_RESET
5*8cc087a1SEmmanuel Vadot 
6*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1				1
7*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_2				2
8*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_3				3
9*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_6				6
10*8cc087a1SEmmanuel Vadot 
11*8cc087a1SEmmanuel Vadot /* Reset lines on PRCC 1 */
12*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_UART0		0
13*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_UART1		1
14*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_I2C1		2
15*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_MSP0		3
16*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_MSP1		4
17*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_SDI0		5
18*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_I2C2		6
19*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_SPI3		7
20*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_SLIMBUS0		8
21*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_I2C4		9
22*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_MSP3		10
23*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_PER_MSP3		11
24*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_PER_MSP1		12
25*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_PER_MSP0		13
26*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_PER_SLIMBUS		14
27*8cc087a1SEmmanuel Vadot 
28*8cc087a1SEmmanuel Vadot /* Reset lines on PRCC 2 */
29*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_2_RESET_I2C3		0
30*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_2_RESET_PWL			1
31*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_2_RESET_SDI4		2
32*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_2_RESET_MSP2		3
33*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_2_RESET_SDI1		4
34*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_2_RESET_SDI3		5
35*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_2_RESET_HSIRX		6
36*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_2_RESET_HSITX		7
37*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_1_RESET_PER_MSP2		8
38*8cc087a1SEmmanuel Vadot 
39*8cc087a1SEmmanuel Vadot /* Reset lines on PRCC 3 */
40*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_3_RESET_SSP0		1
41*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_3_RESET_SSP1		2
42*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_3_RESET_I2C0		3
43*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_3_RESET_SDI2		4
44*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_3_RESET_SKE			5
45*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_3_RESET_UART2		6
46*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_3_RESET_SDI5		7
47*8cc087a1SEmmanuel Vadot 
48*8cc087a1SEmmanuel Vadot /* Reset lines on PRCC 6 */
49*8cc087a1SEmmanuel Vadot #define DB8500_PRCC_3_RESET_RNG			0
50*8cc087a1SEmmanuel Vadot 
51*8cc087a1SEmmanuel Vadot #endif
52