1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Realtek RTD1195 reset controllers 4*c66ec88fSEmmanuel Vadot * 5*c66ec88fSEmmanuel Vadot * Copyright (c) 2017 Andreas Färber 6*c66ec88fSEmmanuel Vadot */ 7*c66ec88fSEmmanuel Vadot #ifndef DT_BINDINGS_RESET_RTD1195_H 8*c66ec88fSEmmanuel Vadot #define DT_BINDINGS_RESET_RTD1195_H 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel Vadot /* soft reset 1 */ 11*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_MISC 0 12*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_RNG 1 13*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_USB3_POW 2 14*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_GSPI 3 15*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_USB3_P0_MDIO 4 16*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_VE_H265 5 17*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_USB 6 18*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_USB_PHY0 8 19*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_USB_PHY1 9 20*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_HDMIRX 11 21*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_HDMI 12 22*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_ETN 14 23*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_AIO 15 24*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_GPU 16 25*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_VE_H264 17 26*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_VE_JPEG 18 27*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_TVE 19 28*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_VO 20 29*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_LVDS 21 30*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_SE 22 31*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_DCU 23 32*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_DC_PHY 24 33*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_CP 25 34*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_MD 26 35*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_TP 27 36*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_AE 28 37*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_NF 29 38*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_MIPI 30 39*c66ec88fSEmmanuel Vadot 40*c66ec88fSEmmanuel Vadot /* soft reset 2 */ 41*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_ACPU 0 42*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_VCPU 1 43*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_PCR 9 44*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_CR 10 45*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_EMMC 11 46*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_SDIO 12 47*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_I2C_5 18 48*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_RTC 20 49*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_I2C_4 23 50*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_I2C_3 24 51*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_I2C_2 25 52*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_I2C_1 26 53*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_UR1 28 54*c66ec88fSEmmanuel Vadot 55*c66ec88fSEmmanuel Vadot /* soft reset 3 */ 56*c66ec88fSEmmanuel Vadot #define RTD1195_RSTN_SB2 0 57*c66ec88fSEmmanuel Vadot 58*c66ec88fSEmmanuel Vadot /* iso soft reset */ 59*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_VFD 0 60*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_IR 1 61*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_CEC0 2 62*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_CEC1 3 63*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_DP 4 64*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_CBUSTX 5 65*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_CBUSRX 6 66*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_EFUSE 7 67*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_UR0 8 68*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_GMAC 9 69*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_GPHY 10 70*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_I2C_0 11 71*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_I2C_6 12 72*c66ec88fSEmmanuel Vadot #define RTD1195_ISO_RSTN_CBUS 13 73*c66ec88fSEmmanuel Vadot 74*c66ec88fSEmmanuel Vadot #endif 75