xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/reset/mediatek,mt6735-pericfg.h (revision 5f62a964e9f8abc6a05d8338273fadd154f0a206)
1*5f62a964SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*5f62a964SEmmanuel Vadot 
3*5f62a964SEmmanuel Vadot #ifndef _DT_BINDINGS_RESET_MT6735_PERICFG_H
4*5f62a964SEmmanuel Vadot #define _DT_BINDINGS_RESET_MT6735_PERICFG_H
5*5f62a964SEmmanuel Vadot 
6*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_UART0			0
7*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_UART1			1
8*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_UART2			2
9*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_UART3			3
10*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_UART4			4
11*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_BTIF			5
12*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_DISP_PWM_PERI		6
13*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_PWM			7
14*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_AUXADC			8
15*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_DMA			9
16*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_IRDA			10
17*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_IRTX			11
18*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_THERM			12
19*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_MSDC2			13
20*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_MSDC3			14
21*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_MSDC0			15
22*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_MSDC1			16
23*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_I2C0			17
24*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_I2C1			18
25*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_I2C2			19
26*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_I2C3			20
27*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST0_USB			21
28*5f62a964SEmmanuel Vadot 
29*5f62a964SEmmanuel Vadot #define MT6735_PERI_RST1_SPI0			22
30*5f62a964SEmmanuel Vadot 
31*5f62a964SEmmanuel Vadot #endif
32