1*c9ccf3a3SEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only */ 2*c9ccf3a3SEmmanuel Vadot /* 3*c9ccf3a3SEmmanuel Vadot * Delta TN48M CPLD GPIO driver 4*c9ccf3a3SEmmanuel Vadot * 5*c9ccf3a3SEmmanuel Vadot * Copyright (C) 2021 Sartura Ltd. 6*c9ccf3a3SEmmanuel Vadot * 7*c9ccf3a3SEmmanuel Vadot * Author: Robert Marko <robert.marko@sartura.hr> 8*c9ccf3a3SEmmanuel Vadot */ 9*c9ccf3a3SEmmanuel Vadot 10*c9ccf3a3SEmmanuel Vadot #ifndef _DT_BINDINGS_RESET_TN48M_H 11*c9ccf3a3SEmmanuel Vadot #define _DT_BINDINGS_RESET_TN48M_H 12*c9ccf3a3SEmmanuel Vadot 13*c9ccf3a3SEmmanuel Vadot #define CPU_88F7040_RESET 0 14*c9ccf3a3SEmmanuel Vadot #define CPU_88F6820_RESET 1 15*c9ccf3a3SEmmanuel Vadot #define MAC_98DX3265_RESET 2 16*c9ccf3a3SEmmanuel Vadot #define PHY_88E1680_RESET 3 17*c9ccf3a3SEmmanuel Vadot #define PHY_88E1512_RESET 4 18*c9ccf3a3SEmmanuel Vadot #define POE_RESET 5 19*c9ccf3a3SEmmanuel Vadot 20*c9ccf3a3SEmmanuel Vadot #endif /* _DT_BINDINGS_RESET_TN48M_H */ 21