1*833e5d42SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*833e5d42SEmmanuel Vadot /* 3*833e5d42SEmmanuel Vadot * Copyright (C) 2023-2024 Canaan Bright Sight Co., Ltd 4*833e5d42SEmmanuel Vadot * Copyright (C) 2024-2025 Junhui Liu <junhui.liu@pigmoral.tech> 5*833e5d42SEmmanuel Vadot */ 6*833e5d42SEmmanuel Vadot #ifndef _DT_BINDINGS_CANAAN_K230_RST_H_ 7*833e5d42SEmmanuel Vadot #define _DT_BINDINGS_CANAAN_K230_RST_H_ 8*833e5d42SEmmanuel Vadot 9*833e5d42SEmmanuel Vadot #define RST_CPU0 0 10*833e5d42SEmmanuel Vadot #define RST_CPU1 1 11*833e5d42SEmmanuel Vadot #define RST_CPU0_FLUSH 2 12*833e5d42SEmmanuel Vadot #define RST_CPU1_FLUSH 3 13*833e5d42SEmmanuel Vadot #define RST_AI 4 14*833e5d42SEmmanuel Vadot #define RST_VPU 5 15*833e5d42SEmmanuel Vadot #define RST_HISYS 6 16*833e5d42SEmmanuel Vadot #define RST_HISYS_AHB 7 17*833e5d42SEmmanuel Vadot #define RST_SDIO0 8 18*833e5d42SEmmanuel Vadot #define RST_SDIO1 9 19*833e5d42SEmmanuel Vadot #define RST_SDIO_AXI 10 20*833e5d42SEmmanuel Vadot #define RST_USB0 11 21*833e5d42SEmmanuel Vadot #define RST_USB1 12 22*833e5d42SEmmanuel Vadot #define RST_USB0_AHB 13 23*833e5d42SEmmanuel Vadot #define RST_USB1_AHB 14 24*833e5d42SEmmanuel Vadot #define RST_SPI0 15 25*833e5d42SEmmanuel Vadot #define RST_SPI1 16 26*833e5d42SEmmanuel Vadot #define RST_SPI2 17 27*833e5d42SEmmanuel Vadot #define RST_SEC 18 28*833e5d42SEmmanuel Vadot #define RST_PDMA 19 29*833e5d42SEmmanuel Vadot #define RST_SDMA 20 30*833e5d42SEmmanuel Vadot #define RST_DECOMPRESS 21 31*833e5d42SEmmanuel Vadot #define RST_SRAM 22 32*833e5d42SEmmanuel Vadot #define RST_SHRM_AXIM 23 33*833e5d42SEmmanuel Vadot #define RST_SHRM_AXIS 24 34*833e5d42SEmmanuel Vadot #define RST_NONAI2D 25 35*833e5d42SEmmanuel Vadot #define RST_MCTL 26 36*833e5d42SEmmanuel Vadot #define RST_ISP 27 37*833e5d42SEmmanuel Vadot #define RST_ISP_DW 28 38*833e5d42SEmmanuel Vadot #define RST_DPU 29 39*833e5d42SEmmanuel Vadot #define RST_DISP 30 40*833e5d42SEmmanuel Vadot #define RST_GPU 31 41*833e5d42SEmmanuel Vadot #define RST_AUDIO 32 42*833e5d42SEmmanuel Vadot #define RST_TIMER0 33 43*833e5d42SEmmanuel Vadot #define RST_TIMER1 34 44*833e5d42SEmmanuel Vadot #define RST_TIMER2 35 45*833e5d42SEmmanuel Vadot #define RST_TIMER3 36 46*833e5d42SEmmanuel Vadot #define RST_TIMER4 37 47*833e5d42SEmmanuel Vadot #define RST_TIMER5 38 48*833e5d42SEmmanuel Vadot #define RST_TIMER_APB 39 49*833e5d42SEmmanuel Vadot #define RST_HDI 40 50*833e5d42SEmmanuel Vadot #define RST_WDT0 41 51*833e5d42SEmmanuel Vadot #define RST_WDT1 42 52*833e5d42SEmmanuel Vadot #define RST_WDT0_APB 43 53*833e5d42SEmmanuel Vadot #define RST_WDT1_APB 44 54*833e5d42SEmmanuel Vadot #define RST_TS_APB 45 55*833e5d42SEmmanuel Vadot #define RST_MAILBOX 46 56*833e5d42SEmmanuel Vadot #define RST_STC 47 57*833e5d42SEmmanuel Vadot #define RST_PMU 48 58*833e5d42SEmmanuel Vadot #define RST_LOSYS_APB 49 59*833e5d42SEmmanuel Vadot #define RST_UART0 50 60*833e5d42SEmmanuel Vadot #define RST_UART1 51 61*833e5d42SEmmanuel Vadot #define RST_UART2 52 62*833e5d42SEmmanuel Vadot #define RST_UART3 53 63*833e5d42SEmmanuel Vadot #define RST_UART4 54 64*833e5d42SEmmanuel Vadot #define RST_I2C0 55 65*833e5d42SEmmanuel Vadot #define RST_I2C1 56 66*833e5d42SEmmanuel Vadot #define RST_I2C2 57 67*833e5d42SEmmanuel Vadot #define RST_I2C3 58 68*833e5d42SEmmanuel Vadot #define RST_I2C4 59 69*833e5d42SEmmanuel Vadot #define RST_JAMLINK0_APB 60 70*833e5d42SEmmanuel Vadot #define RST_JAMLINK1_APB 61 71*833e5d42SEmmanuel Vadot #define RST_JAMLINK2_APB 62 72*833e5d42SEmmanuel Vadot #define RST_JAMLINK3_APB 63 73*833e5d42SEmmanuel Vadot #define RST_CODEC_APB 64 74*833e5d42SEmmanuel Vadot #define RST_GPIO_DB 65 75*833e5d42SEmmanuel Vadot #define RST_GPIO_APB 66 76*833e5d42SEmmanuel Vadot #define RST_ADC 67 77*833e5d42SEmmanuel Vadot #define RST_ADC_APB 68 78*833e5d42SEmmanuel Vadot #define RST_PWM_APB 69 79*833e5d42SEmmanuel Vadot #define RST_SHRM_APB 70 80*833e5d42SEmmanuel Vadot #define RST_CSI0 71 81*833e5d42SEmmanuel Vadot #define RST_CSI1 72 82*833e5d42SEmmanuel Vadot #define RST_CSI2 73 83*833e5d42SEmmanuel Vadot #define RST_CSI_DPHY 74 84*833e5d42SEmmanuel Vadot #define RST_ISP_AHB 75 85*833e5d42SEmmanuel Vadot #define RST_M0 76 86*833e5d42SEmmanuel Vadot #define RST_M1 77 87*833e5d42SEmmanuel Vadot #define RST_M2 78 88*833e5d42SEmmanuel Vadot #define RST_SPI2AXI 79 89*833e5d42SEmmanuel Vadot 90*833e5d42SEmmanuel Vadot #endif 91