1c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only */ 2c66ec88fSEmmanuel Vadot /* 3c66ec88fSEmmanuel Vadot * Copyright (C) 2020 BAIKAL ELECTRONICS, JSC 4c66ec88fSEmmanuel Vadot * 5c66ec88fSEmmanuel Vadot * Baikal-T1 CCU reset indices 6c66ec88fSEmmanuel Vadot */ 7c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_RESET_BT1_CCU_H 8c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_RESET_BT1_CCU_H 9c66ec88fSEmmanuel Vadot 10c66ec88fSEmmanuel Vadot #define CCU_AXI_MAIN_RST 0 11c66ec88fSEmmanuel Vadot #define CCU_AXI_DDR_RST 1 12c66ec88fSEmmanuel Vadot #define CCU_AXI_SATA_RST 2 13c66ec88fSEmmanuel Vadot #define CCU_AXI_GMAC0_RST 3 14c66ec88fSEmmanuel Vadot #define CCU_AXI_GMAC1_RST 4 15c66ec88fSEmmanuel Vadot #define CCU_AXI_XGMAC_RST 5 16c66ec88fSEmmanuel Vadot #define CCU_AXI_PCIE_M_RST 6 17c66ec88fSEmmanuel Vadot #define CCU_AXI_PCIE_S_RST 7 18c66ec88fSEmmanuel Vadot #define CCU_AXI_USB_RST 8 19c66ec88fSEmmanuel Vadot #define CCU_AXI_HWA_RST 9 20c66ec88fSEmmanuel Vadot #define CCU_AXI_SRAM_RST 10 21c66ec88fSEmmanuel Vadot 22c66ec88fSEmmanuel Vadot #define CCU_SYS_SATA_REF_RST 0 23c66ec88fSEmmanuel Vadot #define CCU_SYS_APB_RST 1 24*7ef62cebSEmmanuel Vadot #define CCU_SYS_DDR_FULL_RST 2 25*7ef62cebSEmmanuel Vadot #define CCU_SYS_DDR_INIT_RST 3 26*7ef62cebSEmmanuel Vadot #define CCU_SYS_PCIE_PCS_PHY_RST 4 27*7ef62cebSEmmanuel Vadot #define CCU_SYS_PCIE_PIPE0_RST 5 28*7ef62cebSEmmanuel Vadot #define CCU_SYS_PCIE_CORE_RST 6 29*7ef62cebSEmmanuel Vadot #define CCU_SYS_PCIE_PWR_RST 7 30*7ef62cebSEmmanuel Vadot #define CCU_SYS_PCIE_STICKY_RST 8 31*7ef62cebSEmmanuel Vadot #define CCU_SYS_PCIE_NSTICKY_RST 9 32*7ef62cebSEmmanuel Vadot #define CCU_SYS_PCIE_HOT_RST 10 33c66ec88fSEmmanuel Vadot 34c66ec88fSEmmanuel Vadot #endif /* __DT_BINDINGS_RESET_BT1_CCU_H */ 35