1*c66ec88fSEmmanuel Vadot // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 2*c66ec88fSEmmanuel Vadot // 3*c66ec88fSEmmanuel Vadot // Device Tree binding constants for Actions Semi S900 Reset Management Unit 4*c66ec88fSEmmanuel Vadot // 5*c66ec88fSEmmanuel Vadot // Copyright (c) 2018 Linaro Ltd. 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_ACTIONS_S900_RESET_H 8*c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_ACTIONS_S900_RESET_H 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel Vadot #define RESET_CHIPID 0 11*c66ec88fSEmmanuel Vadot #define RESET_CPU_SCNT 1 12*c66ec88fSEmmanuel Vadot #define RESET_SRAMI 2 13*c66ec88fSEmmanuel Vadot #define RESET_DDR_CTL_PHY 3 14*c66ec88fSEmmanuel Vadot #define RESET_DMAC 4 15*c66ec88fSEmmanuel Vadot #define RESET_GPIO 5 16*c66ec88fSEmmanuel Vadot #define RESET_BISP_AXI 6 17*c66ec88fSEmmanuel Vadot #define RESET_CSI0 7 18*c66ec88fSEmmanuel Vadot #define RESET_CSI1 8 19*c66ec88fSEmmanuel Vadot #define RESET_DE 9 20*c66ec88fSEmmanuel Vadot #define RESET_DSI 10 21*c66ec88fSEmmanuel Vadot #define RESET_GPU3D_PA 11 22*c66ec88fSEmmanuel Vadot #define RESET_GPU3D_PB 12 23*c66ec88fSEmmanuel Vadot #define RESET_HDE 13 24*c66ec88fSEmmanuel Vadot #define RESET_I2C0 14 25*c66ec88fSEmmanuel Vadot #define RESET_I2C1 15 26*c66ec88fSEmmanuel Vadot #define RESET_I2C2 16 27*c66ec88fSEmmanuel Vadot #define RESET_I2C3 17 28*c66ec88fSEmmanuel Vadot #define RESET_I2C4 18 29*c66ec88fSEmmanuel Vadot #define RESET_I2C5 19 30*c66ec88fSEmmanuel Vadot #define RESET_IMX 20 31*c66ec88fSEmmanuel Vadot #define RESET_NANDC0 21 32*c66ec88fSEmmanuel Vadot #define RESET_NANDC1 22 33*c66ec88fSEmmanuel Vadot #define RESET_SD0 23 34*c66ec88fSEmmanuel Vadot #define RESET_SD1 24 35*c66ec88fSEmmanuel Vadot #define RESET_SD2 25 36*c66ec88fSEmmanuel Vadot #define RESET_SD3 26 37*c66ec88fSEmmanuel Vadot #define RESET_SPI0 27 38*c66ec88fSEmmanuel Vadot #define RESET_SPI1 28 39*c66ec88fSEmmanuel Vadot #define RESET_SPI2 29 40*c66ec88fSEmmanuel Vadot #define RESET_SPI3 30 41*c66ec88fSEmmanuel Vadot #define RESET_UART0 31 42*c66ec88fSEmmanuel Vadot #define RESET_UART1 32 43*c66ec88fSEmmanuel Vadot #define RESET_UART2 33 44*c66ec88fSEmmanuel Vadot #define RESET_UART3 34 45*c66ec88fSEmmanuel Vadot #define RESET_UART4 35 46*c66ec88fSEmmanuel Vadot #define RESET_UART5 36 47*c66ec88fSEmmanuel Vadot #define RESET_UART6 37 48*c66ec88fSEmmanuel Vadot #define RESET_HDMI 38 49*c66ec88fSEmmanuel Vadot #define RESET_LVDS 39 50*c66ec88fSEmmanuel Vadot #define RESET_EDP 40 51*c66ec88fSEmmanuel Vadot #define RESET_USB2HUB 41 52*c66ec88fSEmmanuel Vadot #define RESET_USB2HSIC 42 53*c66ec88fSEmmanuel Vadot #define RESET_USB3 43 54*c66ec88fSEmmanuel Vadot #define RESET_PCM1 44 55*c66ec88fSEmmanuel Vadot #define RESET_AUDIO 45 56*c66ec88fSEmmanuel Vadot #define RESET_PCM0 46 57*c66ec88fSEmmanuel Vadot #define RESET_SE 47 58*c66ec88fSEmmanuel Vadot #define RESET_GIC 48 59*c66ec88fSEmmanuel Vadot #define RESET_DDR_CTL_PHY_AXI 49 60*c66ec88fSEmmanuel Vadot #define RESET_CMU_DDR 50 61*c66ec88fSEmmanuel Vadot #define RESET_DMM 51 62*c66ec88fSEmmanuel Vadot #define RESET_HDCP2TX 52 63*c66ec88fSEmmanuel Vadot #define RESET_ETHERNET 53 64*c66ec88fSEmmanuel Vadot 65*c66ec88fSEmmanuel Vadot #endif /* __DT_BINDINGS_ACTIONS_S900_RESET_H */ 66