1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 2 #ifndef __DT_BINDINGS_POWER_RK3588_POWER_H__ 3 #define __DT_BINDINGS_POWER_RK3588_POWER_H__ 4 5 /* VD_LITDSU */ 6 #define RK3588_PD_CPU_0 0 7 #define RK3588_PD_CPU_1 1 8 #define RK3588_PD_CPU_2 2 9 #define RK3588_PD_CPU_3 3 10 11 /* VD_BIGCORE0 */ 12 #define RK3588_PD_CPU_4 4 13 #define RK3588_PD_CPU_5 5 14 15 /* VD_BIGCORE1 */ 16 #define RK3588_PD_CPU_6 6 17 #define RK3588_PD_CPU_7 7 18 19 /* VD_NPU */ 20 #define RK3588_PD_NPU 8 21 #define RK3588_PD_NPUTOP 9 22 #define RK3588_PD_NPU1 10 23 #define RK3588_PD_NPU2 11 24 25 /* VD_GPU */ 26 #define RK3588_PD_GPU 12 27 28 /* VD_VCODEC */ 29 #define RK3588_PD_VCODEC 13 30 #define RK3588_PD_RKVDEC0 14 31 #define RK3588_PD_RKVDEC1 15 32 #define RK3588_PD_VENC0 16 33 #define RK3588_PD_VENC1 17 34 35 /* VD_DD01 */ 36 #define RK3588_PD_DDR01 18 37 38 /* VD_DD23 */ 39 #define RK3588_PD_DDR23 19 40 41 /* VD_LOGIC */ 42 #define RK3588_PD_CENTER 20 43 #define RK3588_PD_VDPU 21 44 #define RK3588_PD_RGA30 22 45 #define RK3588_PD_AV1 23 46 #define RK3588_PD_VOP 24 47 #define RK3588_PD_VO0 25 48 #define RK3588_PD_VO1 26 49 #define RK3588_PD_VI 27 50 #define RK3588_PD_ISP1 28 51 #define RK3588_PD_FEC 29 52 #define RK3588_PD_RGA31 30 53 #define RK3588_PD_USB 31 54 #define RK3588_PD_PHP 32 55 #define RK3588_PD_GMAC 33 56 #define RK3588_PD_PCIE 34 57 #define RK3588_PD_NVM 35 58 #define RK3588_PD_NVM0 36 59 #define RK3588_PD_SDIO 37 60 #define RK3588_PD_AUDIO 38 61 #define RK3588_PD_SECURE 39 62 #define RK3588_PD_SDMMC 40 63 #define RK3588_PD_CRYPTO 41 64 #define RK3588_PD_BUS 42 65 66 /* VD_PMU */ 67 #define RK3588_PD_PMU1 43 68 69 #endif 70