1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_POWER_RK3288_POWER_H__ 3*c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_POWER_RK3288_POWER_H__ 4*c66ec88fSEmmanuel Vadot 5*c66ec88fSEmmanuel Vadot /** 6*c66ec88fSEmmanuel Vadot * RK3288 Power Domain and Voltage Domain Summary. 7*c66ec88fSEmmanuel Vadot */ 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadot /* VD_CORE */ 10*c66ec88fSEmmanuel Vadot #define RK3288_PD_A17_0 0 11*c66ec88fSEmmanuel Vadot #define RK3288_PD_A17_1 1 12*c66ec88fSEmmanuel Vadot #define RK3288_PD_A17_2 2 13*c66ec88fSEmmanuel Vadot #define RK3288_PD_A17_3 3 14*c66ec88fSEmmanuel Vadot #define RK3288_PD_SCU 4 15*c66ec88fSEmmanuel Vadot #define RK3288_PD_DEBUG 5 16*c66ec88fSEmmanuel Vadot #define RK3288_PD_MEM 6 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel Vadot /* VD_LOGIC */ 19*c66ec88fSEmmanuel Vadot #define RK3288_PD_BUS 7 20*c66ec88fSEmmanuel Vadot #define RK3288_PD_PERI 8 21*c66ec88fSEmmanuel Vadot #define RK3288_PD_VIO 9 22*c66ec88fSEmmanuel Vadot #define RK3288_PD_ALIVE 10 23*c66ec88fSEmmanuel Vadot #define RK3288_PD_HEVC 11 24*c66ec88fSEmmanuel Vadot #define RK3288_PD_VIDEO 12 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel Vadot /* VD_GPU */ 27*c66ec88fSEmmanuel Vadot #define RK3288_PD_GPU 13 28*c66ec88fSEmmanuel Vadot 29*c66ec88fSEmmanuel Vadot /* VD_PMU */ 30*c66ec88fSEmmanuel Vadot #define RK3288_PD_PMU 14 31*c66ec88fSEmmanuel Vadot 32*c66ec88fSEmmanuel Vadot #endif 33