1*01950c46SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*01950c46SEmmanuel Vadot /* 3*01950c46SEmmanuel Vadot * Copyright (C) 2023 Renesas Electronics Corp. 4*01950c46SEmmanuel Vadot */ 5*01950c46SEmmanuel Vadot #ifndef __DT_BINDINGS_POWER_RENESAS_R8A779H0_SYSC_H__ 6*01950c46SEmmanuel Vadot #define __DT_BINDINGS_POWER_RENESAS_R8A779H0_SYSC_H__ 7*01950c46SEmmanuel Vadot 8*01950c46SEmmanuel Vadot /* 9*01950c46SEmmanuel Vadot * These power domain indices match the Power Domain Register Numbers (PDR) 10*01950c46SEmmanuel Vadot */ 11*01950c46SEmmanuel Vadot 12*01950c46SEmmanuel Vadot #define R8A779H0_PD_A1E0D0C0 0 13*01950c46SEmmanuel Vadot #define R8A779H0_PD_A1E0D0C1 1 14*01950c46SEmmanuel Vadot #define R8A779H0_PD_A1E0D0C2 2 15*01950c46SEmmanuel Vadot #define R8A779H0_PD_A1E0D0C3 3 16*01950c46SEmmanuel Vadot #define R8A779H0_PD_A2E0D0 16 17*01950c46SEmmanuel Vadot #define R8A779H0_PD_A3CR0 21 18*01950c46SEmmanuel Vadot #define R8A779H0_PD_A3CR1 22 19*01950c46SEmmanuel Vadot #define R8A779H0_PD_A3CR2 23 20*01950c46SEmmanuel Vadot #define R8A779H0_PD_A33DGA 24 21*01950c46SEmmanuel Vadot #define R8A779H0_PD_A23DGB 25 22*01950c46SEmmanuel Vadot #define R8A779H0_PD_C4 31 23*01950c46SEmmanuel Vadot #define R8A779H0_PD_A1DSP0 33 24*01950c46SEmmanuel Vadot #define R8A779H0_PD_A2IMP01 34 25*01950c46SEmmanuel Vadot #define R8A779H0_PD_A2PSC 35 26*01950c46SEmmanuel Vadot #define R8A779H0_PD_A2CV0 36 27*01950c46SEmmanuel Vadot #define R8A779H0_PD_A2CV1 37 28*01950c46SEmmanuel Vadot #define R8A779H0_PD_A3IMR0 38 29*01950c46SEmmanuel Vadot #define R8A779H0_PD_A3IMR1 39 30*01950c46SEmmanuel Vadot #define R8A779H0_PD_A3VC 40 31*01950c46SEmmanuel Vadot #define R8A779H0_PD_A2CN0 42 32*01950c46SEmmanuel Vadot #define R8A779H0_PD_A1CN0 44 33*01950c46SEmmanuel Vadot #define R8A779H0_PD_A1DSP1 45 34*01950c46SEmmanuel Vadot #define R8A779H0_PD_A2DMA 47 35*01950c46SEmmanuel Vadot #define R8A779H0_PD_A2CV2 48 36*01950c46SEmmanuel Vadot #define R8A779H0_PD_A2CV3 49 37*01950c46SEmmanuel Vadot #define R8A779H0_PD_A3IMR2 50 38*01950c46SEmmanuel Vadot #define R8A779H0_PD_A3IMR3 51 39*01950c46SEmmanuel Vadot #define R8A779H0_PD_A3PCI 52 40*01950c46SEmmanuel Vadot #define R8A779H0_PD_A2PCIPHY 53 41*01950c46SEmmanuel Vadot #define R8A779H0_PD_A3VIP0 56 42*01950c46SEmmanuel Vadot #define R8A779H0_PD_A3VIP2 58 43*01950c46SEmmanuel Vadot #define R8A779H0_PD_A3ISP0 60 44*01950c46SEmmanuel Vadot #define R8A779H0_PD_A3DUL 62 45*01950c46SEmmanuel Vadot 46*01950c46SEmmanuel Vadot /* Always-on power area */ 47*01950c46SEmmanuel Vadot #define R8A779H0_PD_ALWAYS_ON 64 48*01950c46SEmmanuel Vadot 49*01950c46SEmmanuel Vadot #endif /* __DT_BINDINGS_POWER_RENESAS_R8A779H0_SYSC_H__ */ 50