1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Copyright (C) 2017 Glider bvba 4*c66ec88fSEmmanuel Vadot */ 5*c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_POWER_R8A77995_SYSC_H__ 6*c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_POWER_R8A77995_SYSC_H__ 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel Vadot /* 9*c66ec88fSEmmanuel Vadot * These power domain indices match the numbers of the interrupt bits 10*c66ec88fSEmmanuel Vadot * representing the power areas in the various Interrupt Registers 11*c66ec88fSEmmanuel Vadot * (e.g. SYSCISR, Interrupt Status Register) 12*c66ec88fSEmmanuel Vadot */ 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel Vadot #define R8A77995_PD_CA53_CPU0 5 15*c66ec88fSEmmanuel Vadot #define R8A77995_PD_CA53_SCU 21 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel Vadot /* Always-on power area */ 18*c66ec88fSEmmanuel Vadot #define R8A77995_PD_ALWAYS_ON 32 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel Vadot #endif /* __DT_BINDINGS_POWER_R8A77995_SYSC_H__ */ 21